FreeCalypso > hg > freecalypso-reveng
view bootrom.notes @ 9:7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Fri, 19 Apr 2013 21:31:47 +0000 |
parents | a06573cacb6e |
children | 25b016d16602 |
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Application images in flash: In order for the nCS0 flash content to be considered a valid bootable image (i.e., for the boot ROM to transfer control to it, rather than wait forever for a UART download), the 32-bit word at address 0x2000 (the first word after the ROM-overlaid portion) must contain either 0 or 1, corresponding to two supported environment options: * If the word at 0x2000 equals 0, it signifies an application image that is designed to run with the boot ROM still mapped at 0, with ARM exceptions vectoring through the 7 magic RAM locations at 0x80001C, and possibly through the 2nd level ("user-friendly") vector table at 0x800000 as well. If the word at 0x2000 equals 0, the following word at 0x2004 must contain the absolute address of the boot entry point; the boot ROM will transfer control to that address with the FFFF:FB10 register set to explicitly map the internal boot ROM at 0. It is a BX-style address: setting the least significant bit will result in control being transferred in the Thumb state. * If the word at 0x2000 equals 1, it signifies an application image that is at least conceptually independent of the Calypso boot ROM - one that would, at least in theory, function correctly with nIBOOT tied/pulled/driven HIGH, or even on an older DBB chip with no internal boot ROM. When the boot ROM code sees a 1 in the 0x2000 word, it copies a little piece of code into the internal ROM and runs it there; this code sets the FFFF:FB10 register to disable the internal boot ROM (map the external nCS0 memory at 0, as if nIBOOT were high) and causes the watchdog timer to go off, resetting the ARM core and causing it to execute the external nCS0 reset vector. RAM layout: 800000 7 words: soft-vector pointers: by default the following 7 words at 80001C are filled with ldr-jump instructions, which read from these 7 words and load them into PC 80001C 7 words: hard vectors: the physical vector locations in the ROM contain branch instructions to these 7 RAM addresses 800038: The helper routine for transferring control to type 1 flash images is copied to and run here. 800100: the last word of the above routine 800104: word initialized to 0x0001D4C0 800108: byte initialized to 0x01 800520: byte variable filled every time the 0xfb4 routine is called holds the ID of the UART on which '<' came in, or FF if none 800524: byte variable filled every time the 0xfb4 routine is called filled with a copy of 800534 800534: byte initialized to 0x00, then may be set to 1 by the 0xfb4 routine if it selects /1 clock mode. 8005C0: appears to be the intended low address (bottom) of the stack 80074C: top of the stack (initial value loaded into SP)