view arm7dis/atcommon.c @ 408:14302e075f37 default tip

hr-bits: further conditionalize SID-1-diff
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 22 Jul 2024 10:06:38 +0000
parents c883e60df239
children
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/*
 * Lean and mean ARM7TDMI disassembler
 * Written by Spacefalcon the Outlaw
 */

/* a few disassembly bits common between ARM and Thumb */

char *regnames[16] = {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
			"r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"};

char *condition_decode[16] = {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
				"hi", "ls", "ge", "lt", "gt", "le", "", "INV"};

char *shift_types[4] = {"lsl", "lsr", "asr", "ror"};