.inttext exception vectors:

   40000:	ea0000d0	b	0x40348
   40004:	ea0000d2	b	0x40354
   40008:	ea0000d4	b	0x40360
   4000c:	ea0000d6	b	0x4036c
   40010:	ea0000d8	b	0x40378
   40014:	ea0000bc	b	0x4030c
   40018:	ea0000c5	b	0x40334

_c_int00:
   4001c:	02a102a1
   40020:	028302a1
   40024:	02c00e85
   40028:	002a0040
   4002c:	fffffb00
   40030:	fffef006
   40034:	00000008
   40038:	fffffd00
   4003c:	ffff9800
   40040:	fffffb10
   40044:	ffffff08
   40048:	20021081
   4004c:	f7ff0800
   40050:	00000000
   40054:	00536e48	; cinit

_INT_Initialize:
   40058:	e51f1024	ldr	r1, =0xffff9800	; via 0x4003c
   4005c:	e15f21ba	ldrh	r2, =0x2002	; via 0x4004a
   40060:	e1c120b0	strh	r2, [r1]
   40064:	e5912000	ldr	r2, [r1]
   40068:	e2022001	and	r2, r2, #1
   4006c:	e3520001	cmp	r2, #1
   40070:	0afffffb	beq	0x40064
   40074:	e51f1044	ldr	r1, =0xfffffd00	; via 0x40038
   40078:	e15f23b8	ldrh	r2, =0x1081	; via 0x40048
   4007c:	e1c120b0	strh	r2, [r1]
   40080:	e51f1048	ldr	r1, =0xfffffb10	; via 0x40040
   40084:	e15f23be	ldrh	r2, =0xf7ff	; via 0x4004e
   40088:	e1d100b0	ldrh	r0, [r1]
   4008c:	e0000002	and	r0, r0, r2
   40090:	e1c100b0	strh	r0, [r1]
   40094:	e51f1058	ldr	r1, =0xffffff08	; via 0x40044
   40098:	e15f25b0	ldrh	r2, =0x0	; via 0x40050
   4009c:	e1c120b0	strh	r2, [r1]
   400a0:	e51f107c	ldr	r1, =0xfffffb00	; via 0x4002c
   400a4:	e15f29b0	ldrh	r2, =0x2a1	; via 0x4001c
   400a8:	e1c120b0	strh	r2, [r1]
   400ac:	e15f29b6	ldrh	r2, =0x2a1	; via 0x4001e
   400b0:	e1c120b2	strh	r2, [r1, #2]
   400b4:	e15f29bc	ldrh	r2, =0x2a1	; via 0x40020
   400b8:	e1c120b4	strh	r2, [r1, #4]
   400bc:	e15f2ab2	ldrh	r2, =0x283	; via 0x40022
   400c0:	e1c120b6	strh	r2, [r1, #6]
   400c4:	e15f2ab8	ldrh	r2, =0xe85	; via 0x40024
   400c8:	e1c120ba	strh	r2, [r1, #10]	; 0xa
   400cc:	e15f2abe	ldrh	r2, =0x2c0	; via 0x40026
   400d0:	e1c120bc	strh	r2, [r1, #12]	; 0xc
   400d4:	e15f2bb4	ldrh	r2, =0x40	; via 0x40028
   400d8:	e1c120b8	strh	r2, [r1, #8]
   400dc:	e15f2bba	ldrh	r2, =0x2a	; via 0x4002a
   400e0:	e1c120be	strh	r2, [r1, #14]	; 0xe
   400e4:	e51f10bc	ldr	r1, =0xfffef006	; via 0x40030
   400e8:	e1d120b0	ldrh	r2, [r1]
   400ec:	e51f00c0	ldr	r0, =0x8	; via 0x40034
   400f0:	e1800002	orr	r0, r0, r2
   400f4:	e1c100b0	strh	r0, [r1]
   400f8:	e10f0000	mrs	r0, CPSR
   400fc:	e3c0001f	bic	r0, r0, #31	; 0x1f
   40100:	e3800013	orr	r0, r0, #19	; 0x13
   40104:	e38000c0	orr	r0, r0, #192	; 0xc0
   40108:	e129f000	msr	CPSR_fc, r0
   4010c:	e59f0340	ldr	r0, =0x10000e8	; via 0x40454
   40110:	e3a01e46	mov	r1, #1120	; 0x460
   40114:	e2411004	sub	r1, r1, #4
   40118:	e0802001	add	r2, r0, r1
   4011c:	e1a0d002	mov	sp, r2
   40120:	e92d000f	stmdb	sp!, {r0, r1, r2, r3}
   40124:	e59f0318	ldr	r0, =0x1000be8	; via 0x40444
   40128:	e59f2318	ldr	r2, =0x17751ec	; via 0x40448
   4012c:	e0422000	sub	r2, r2, r0
   40130:	e3a01000	mov	r1, #0
   40134:	eb0000e1	bl	0x404c0		; _INT_memset
   40138:	e59f030c	ldr	r0, =0x800000	; via 0x4044c
   4013c:	e59f230c	ldr	r2, =0x82d1ec	; via 0x40450
   40140:	e0422000	sub	r2, r2, r0
   40144:	e3a01000	mov	r1, #0
   40148:	eb0000dc	bl	0x404c0		; _INT_memset
   4014c:	e8bd000f	ldmia	sp!, {r0, r1, r2, r3}
   40150:	e3a00001	mov	r0, #1
   40154:	e59f12fc	ldr	r1, =0x1775074	; via 0x40458
   40158:	e5810000	str	r0, [r1]
   4015c:	e59f02f0	ldr	r0, =0x10000e8	; via 0x40454
   40160:	e3a01e46	mov	r1, #1120	; 0x460
   40164:	e2411004	sub	r1, r1, #4
   40168:	e0802001	add	r2, r0, r1
   4016c:	e1a0a000	mov	r10, r0
   40170:	e59f32e4	ldr	r3, =0x1775044	; via 0x4045c
   40174:	e583a000	str	r10, [r3]
   40178:	e1a0d002	mov	sp, r2
   4017c:	e59f32dc	ldr	r3, =0x175635c	; via 0x40460
   40180:	e583d000	str	sp, [r3]
   40184:	e3a01080	mov	r1, #128	; 0x80
   40188:	e0822001	add	r2, r2, r1
   4018c:	e10f0000	mrs	r0, CPSR
   40190:	e3c0001f	bic	r0, r0, #31	; 0x1f
   40194:	e3800012	orr	r0, r0, #18	; 0x12
   40198:	e129f000	msr	CPSR_fc, r0
   4019c:	e1a0d002	mov	sp, r2
   401a0:	e3a01c02	mov	r1, #512	; 0x200
   401a4:	e0822001	add	r2, r2, r1
   401a8:	e10f0000	mrs	r0, CPSR
   401ac:	e3c0001f	bic	r0, r0, #31	; 0x1f
   401b0:	e3800011	orr	r0, r0, #17	; 0x11
   401b4:	e129f000	msr	CPSR_fc, r0
   401b8:	e1a0d002	mov	sp, r2
   401bc:	e10f0000	mrs	r0, CPSR
   401c0:	e3c0001f	bic	r0, r0, #31	; 0x1f
   401c4:	e3800017	orr	r0, r0, #23	; 0x17
   401c8:	e129f000	msr	CPSR_fc, r0
   401cc:	e59fd29c	ldr	sp, =0x1000050	; via 0x40470
   401d0:	e10f0000	mrs	r0, CPSR
   401d4:	e3c0001f	bic	r0, r0, #31	; 0x1f
   401d8:	e380001b	orr	r0, r0, #27	; 0x1b
   401dc:	e129f000	msr	CPSR_fc, r0
   401e0:	e59fd288	ldr	sp, =0x1000050	; via 0x40470
   401e4:	e10f0000	mrs	r0, CPSR
   401e8:	e3c0001f	bic	r0, r0, #31	; 0x1f
   401ec:	e3800013	orr	r0, r0, #19	; 0x13
   401f0:	e129f000	msr	CPSR_fc, r0
   401f4:	e59f3268	ldr	r3, =0x176f458	; via 0x40464
   401f8:	e2822004	add	r2, r2, #4
   401fc:	e5832000	str	r2, [r3]
   40200:	e3a01b01	mov	r1, #1024	; 0x400
   40204:	e3c11003	bic	r1, r1, #3
   40208:	e0822001	add	r2, r2, r1
   4020c:	e59f3254	ldr	r3, =0x176f4dc	; via 0x40468
   40210:	e5831000	str	r1, [r3]
   40214:	e3a01002	mov	r1, #2
   40218:	e59f324c	ldr	r3, =0x176f4ec	; via 0x4046c
   4021c:	e5831000	str	r1, [r3]
   40220:	e1a04002	mov	r4, r2
   40224:	eb0e99e4	bl	0x3e69bc	; _f_load_int_mem
   40228:	e1a02004	mov	r2, r4
   4022c:	e59f1228	ldr	r1, =0x1775044	; via 0x4045c
   40230:	e5910000	ldr	r0, [r1]
   40234:	e3a030fe	mov	r3, #254	; 0xfe
   40238:	e5c03000	strb	r3, [r0]
   4023c:	e5c03001	strb	r3, [r0, #1]
   40240:	e5c03002	strb	r3, [r0, #2]
   40244:	e5c03003	strb	r3, [r0, #3]
   40248:	e4903004	ldr	r3, [r0], #4
   4024c:	e4803004	str	r3, [r0], #4
   40250:	e1500002	cmp	r0, r2
   40254:	bafffffc	blt	0x4024c
   40258:	e51f020c	ldr	r0, =0x536e48	; via 0x40054
   4025c:	e3700001	cmn	r0, #1
   40260:	1b000084	blne	0x40478
   40264:	e1a00002	mov	r0, r2
   40268:	ea0eda34	b	0x3f6b40	; _INC_Initialize

$INT_Vectors_Loaded:
   4026c:	4778		bx	pc
   4026e:	46c0		nop			(mov r8, r8)
   40270:	eaffffff	b	0x40274
_INT_Vectors_Loaded:
   40274:	e3a00001	mov	r0, #1
   40278:	e12fff1e	bx	lr

$INT_Setup_Vector:
   4027c:	4778		bx	pc
   4027e:	46c0		nop			(mov r8, r8)
   40280:	eaffffff	b	0x40284
_INT_Setup_Vector:
   40284:	e3a00000	mov	r0, #0
   40288:	e12fff1e	bx	lr

$INT_EnableIRQ:
   4028c:	4778		bx	pc
   4028e:	46c0		nop			(mov r8, r8)
   40290:	e10f0000	mrs	r0, CPSR
   40294:	e3c0001f	bic	r0, r0, #31	; 0x1f
   40298:	e3800012	orr	r0, r0, #18	; 0x12
   4029c:	e129f000	msr	CPSR_fc, r0
   402a0:	e10f0000	mrs	r0, CPSR
   402a4:	e3c000c0	bic	r0, r0, #192	; 0xc0
   402a8:	e129f000	msr	CPSR_fc, r0
   402ac:	e3c0001f	bic	r0, r0, #31	; 0x1f
   402b0:	e3800013	orr	r0, r0, #19	; 0x13
   402b4:	e129f000	msr	CPSR_fc, r0
   402b8:	e28f0001	add	r0, pc, #1
   402bc:	e12fff10	bx	r0
   402c0:	4770		bx	lr

$INT_DisableIRQ:
   402c2:	4778		bx	pc
   402c4:	46c0		nop			(mov r8, r8)
   402c6:	46c0		nop			(mov r8, r8)
   402c8:	e10f0000	mrs	r0, CPSR
   402cc:	e3c0001f	bic	r0, r0, #31	; 0x1f
   402d0:	e3800012	orr	r0, r0, #18	; 0x12
   402d4:	e129f000	msr	CPSR_fc, r0
   402d8:	e10f0000	mrs	r0, CPSR
   402dc:	e38000c0	orr	r0, r0, #192	; 0xc0
   402e0:	e129f000	msr	CPSR_fc, r0
   402e4:	e3c0001f	bic	r0, r0, #31	; 0x1f
   402e8:	e3800013	orr	r0, r0, #19	; 0x13
   402ec:	e129f000	msr	CPSR_fc, r0
   402f0:	e28f0001	add	r0, pc, #1
   402f4:	e12fff10	bx	r0
   402f8:	4770		bx	lr

$INT_Retrieve_Shell:
   402fa:	4778		bx	pc
   402fc:	46c0		nop			(mov r8, r8)
   402fe:	46c0		nop			(mov r8, r8)
   40300:	eaffffff	b	0x40304
_INT_Retrieve_Shell:
   40304:	e3a00000	mov	r0, #0
   40308:	e12fff1e	bx	lr

INT_IRQ:
   4030c:	e92d000f	stmdb	sp!, {r0, r1, r2, r3}
   40310:	e14f0000	mrs	r0, SPSR
   40314:	e3100080	tst	r0, #128	; 0x80
   40318:	1a000003	bne	0x4032c
   4031c:	e24e3004	sub	r3, lr, #4
   40320:	eb1ff729	bl	0x83dfcc	; _TCT_Interrupt_Context_Save
   40324:	eb0e3915	bl	0x3ce780	; _IQ_IRQ_isr
   40328:	ea1ff76e	b	0x83e0e8	; _TCT_Interrupt_Context_Restore
   4032c:	e8bd000f	ldmia	sp!, {r0, r1, r2, r3}
   40330:	e25ef004	subs	pc, lr, #4

INT_FIQ:
   40334:	e92d000f	stmdb	sp!, {r0, r1, r2, r3}
   40338:	e24e3004	sub	r3, lr, #4
   4033c:	eb1ff722	bl	0x83dfcc	; _TCT_Interrupt_Context_Save
   40340:	eb0e3919	bl	0x3ce7ac	; _IQ_FIQ_isr
   40344:	ea1ff767	b	0x83e0e8	; _TCT_Interrupt_Context_Restore

; exception handlers
   40348:	e92d1800	stmdb	sp!, {r11, r12}
   4034c:	e3a0b001	mov	r11, #1
   40350:	ea00000c	b	0x40388
   40354:	e92d1800	stmdb	sp!, {r11, r12}
   40358:	e3a0b002	mov	r11, #2
   4035c:	ea000009	b	0x40388
   40360:	e92d1800	stmdb	sp!, {r11, r12}
   40364:	e3a0b003	mov	r11, #3
   40368:	ea000006	b	0x40388
   4036c:	e92d1800	stmdb	sp!, {r11, r12}
   40370:	e3a0b004	mov	r11, #4
   40374:	ea000003	b	0x40388
   40378:	e59fd0f0	ldr	sp, =0x1000050	; via 0x40470
   4037c:	e92d1800	stmdb	sp!, {r11, r12}
   40380:	e3a0b005	mov	r11, #5
   40384:	eaffffff	b	0x40388
   40388:	e59fc0e4	ldr	r12, =0x1000050	; via 0x40474
   4038c:	e58ce03c	str	lr, [r12, #60]	; 0x3c
   40390:	e88c07ff	stmia	r12, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10}
   40394:	e8bd0003	ldmia	sp!, {r0, r1}
   40398:	e58c002c	str	r0, [r12, #44]	; 0x2c
   4039c:	e58c1030	str	r1, [r12, #48]	; 0x30
   403a0:	e14f0000	mrs	r0, SPSR
   403a4:	e58c0040	str	r0, [r12, #64]	; 0x40
   403a8:	e10f1000	mrs	r1, CPSR
   403ac:	e3c1201f	bic	r2, r1, #31	; 0x1f
   403b0:	e200001f	and	r0, r0, #31	; 0x1f
   403b4:	e0800002	add	r0, r0, r2
   403b8:	e129f000	msr	CPSR_fc, r0
   403bc:	e58cd034	str	sp, [r12, #52]	; 0x34
   403c0:	e58ce038	str	lr, [r12, #56]	; 0x38
   403c4:	e129f001	msr	CPSR_fc, r1
   403c8:	e38ba4de	orr	r10, r11, #3724541952	; 0xde000000
   403cc:	e38aa8ad	orr	r10, r10, #11337728	; 0xad0000
   403d0:	e58ca044	str	r10, [r12, #68]	; 0x44
   403d4:	e1a0000b	mov	r0, r11
   403d8:	ea0eda7a	b	0x3f6dc8	; _dar_exception

$exception:
   403dc:	a000		add	r0, pc, #0
   403de:	4700		bx	r0

_exception:
   403e0:	e59fc08c	ldr	r12, =0x1000050	; via 0x40474
   403e4:	e59cb034	ldr	r11, [r12, #52]	; 0x34
   403e8:	e28cc048	add	r12, r12, #72	; 0x48
   403ec:	e35b0502	cmp	r11, #8388608	; 0x800000
   403f0:	ba00000d	blt	0x4042c
   403f4:	e3a00722	mov	r0, #8912896	; 0x880000
   403f8:	e2400014	sub	r0, r0, #20	; 0x14
   403fc:	e15b0000	cmp	r11, r0
   40400:	ba000005	blt	0x4041c
   40404:	e35b0401	cmp	r11, #16777216	; 0x1000000
   40408:	ba000007	blt	0x4042c
   4040c:	e3a00612	mov	r0, #18874368	; 0x1200000
   40410:	e2400014	sub	r0, r0, #20	; 0x14
   40414:	e15b0000	cmp	r11, r0
   40418:	aa000003	bge	0x4042c
   4041c:	e8bb03ff	ldmia	r11!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9}
   40420:	e8ac03ff	stmia	r12!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9}
   40424:	e8bb03ff	ldmia	r11!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9}
   40428:	e8ac03ff	stmia	r12!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9}
   4042c:	e59f0020	ldr	r0, =0x10000e8	; via 0x40454
   40430:	e3a01eae	mov	r1, #2784	; 0xae0
   40434:	e2811080	add	r1, r1, #128	; 0x80
   40438:	e0802001	add	r2, r0, r1
   4043c:	e1a0d002	mov	sp, r2
   40440:	ea0eda66	b	0x3f6de0	; _dar_reset

   40444:	01000be8	.bss
   40448:	017751ec	end
   4044c:	00800000	_S_D_Mem
   40450:	0082d1ec	_E_D_Mem
   40454:	010000e8	stack_segment
   40458:	01775074	_INT_Loaded_Flag
   4045c:	01775044	_TCT_System_Limit
   40460:	0175635c	_TCD_System_Stack
   40464:	0176f458	_TMD_HISR_Stack_Ptr
   40468:	0176f4dc	_TMD_HISR_Stack_Size
   4046c:	0176f4ec	_TMD_HISR_Priority
   40470:	01000050	exception_stack
   40474:	01000050	_xdump_buffer

_auto_init:
   40478:	ea00000c	b	0x404b0
   4047c:	e4901004	ldr	r1, [r0], #4
   40480:	e3530003	cmp	r3, #3
   40484:	84904004	ldrhi	r4, [r0], #4
   40488:	84814004	strhi	r4, [r1], #4
   4048c:	82433004	subhi	r3, r3, #4
   40490:	94d04001	ldrlsb	r4, [r0], #1
   40494:	94c14001	strlsb	r4, [r1], #1
   40498:	92433001	subls	r3, r3, #1
   4049c:	e3530000	cmp	r3, #0
   404a0:	1afffff6	bne	0x40480
   404a4:	e2103003	ands	r3, r0, #3
   404a8:	12633004	rsbne	r3, r3, #4
   404ac:	10800003	addne	r0, r0, r3
   404b0:	e4903004	ldr	r3, [r0], #4
   404b4:	e3530000	cmp	r3, #0
   404b8:	1affffef	bne	0x4047c
   404bc:	e1a0f00e	mov	pc, lr

_INT_memset:
   404c0:	e92d4001	stmdb	sp!, {r0, lr}
   404c4:	e3100003	tst	r0, #3
   404c8:	0a000006	beq	0x404e8
   404cc:	e3520000	cmp	r2, #0
   404d0:	84c01001	strhib	r1, [r0], #1
   404d4:	82522001	subhis	r2, r2, #1
   404d8:	83100003	tsthi	r0, #3
   404dc:	1afffffb	bne	0x404d0
   404e0:	e3520000	cmp	r2, #0
   404e4:	08bd8001	ldmeqia	sp!, {r0, pc}
   404e8:	e20110ff	and	r1, r1, #255	; 0xff
   404ec:	e1811401	orr	r1, r1, r1, lsl #8
   404f0:	e3520004	cmp	r2, #4
   404f4:	3a000012	bcc	0x40544
   404f8:	e1811801	orr	r1, r1, r1, lsl #16
   404fc:	e3520008	cmp	r2, #8
   40500:	3a00000d	bcc	0x4053c
   40504:	e1a0e001	mov	lr, r1
   40508:	e3520010	cmp	r2, #16	; 0x10
   4050c:	3a000008	bcc	0x40534
   40510:	e92d0010	stmdb	sp!, {r4}
   40514:	e1a04001	mov	r4, r1
   40518:	e1a0c001	mov	r12, r1
   4051c:	e242300f	sub	r3, r2, #15	; 0xf
   40520:	e202200f	and	r2, r2, #15	; 0xf
   40524:	e8a05012	stmia	r0!, {r1, r4, r12, lr}
   40528:	e2533010	subs	r3, r3, #16	; 0x10
   4052c:	8afffffc	bhi	0x40524
   40530:	e8bd0010	ldmia	sp!, {r4}
   40534:	e3120008	tst	r2, #8
   40538:	18a04002	stmneia	r0!, {r1, lr}
   4053c:	e3120004	tst	r2, #4
   40540:	14801004	strne	r1, [r0], #4
   40544:	e3120002	tst	r2, #2
   40548:	10c010b2	strneh	r1, [r0], #2
   4054c:	e3120001	tst	r2, #1
   40550:	15c01000	strneb	r1, [r0]
   40554:	e8bd8001	ldmia	sp!, {r0, pc}

_INT_memcpy:
   40558:	e3520000	cmp	r2, #0
   4055c:	012fff1e	bxeq	lr
   40560:	e92d4001	stmdb	sp!, {r0, lr}
   40564:	e3110003	tst	r1, #3
   40568:	1a00002b	bne	0x4061c
   4056c:	e3100003	tst	r0, #3
   40570:	1a00002f	bne	0x40634
   40574:	e3520010	cmp	r2, #16	; 0x10
   40578:	3a000008	bcc	0x405a0
   4057c:	e92d0010	stmdb	sp!, {r4}
   40580:	e2422010	sub	r2, r2, #16	; 0x10
   40584:	e8b15018	ldmia	r1!, {r3, r4, r12, lr}
   40588:	e8a05018	stmia	r0!, {r3, r4, r12, lr}
   4058c:	e2522010	subs	r2, r2, #16	; 0x10
   40590:	2afffffb	bcs	0x40584
   40594:	e8bd0010	ldmia	sp!, {r4}
   40598:	e2922010	adds	r2, r2, #16	; 0x10
   4059c:	08bd8001	ldmeqia	sp!, {r0, pc}
   405a0:	e212300c	ands	r3, r2, #12	; 0xc
   405a4:	0a00000d	beq	0x405e0
   405a8:	e3d2200c	bics	r2, r2, #12	; 0xc
   405ac:	e24fc010	sub	r12, pc, #16	; 0x10
   405b0:	e08cf103	add	pc, r12, r3, lsl #2
   405b4:	e4913004	ldr	r3, [r1], #4
   405b8:	e4803004	str	r3, [r0], #4
   405bc:	08bd8001	ldmeqia	sp!, {r0, pc}
   405c0:	ea000006	b	0x405e0
   405c4:	e8b11008	ldmia	r1!, {r3, r12}
   405c8:	e8a01008	stmia	r0!, {r3, r12}
   405cc:	08bd8001	ldmeqia	sp!, {r0, pc}
   405d0:	ea000002	b	0x405e0
   405d4:	e8b15008	ldmia	r1!, {r3, r12, lr}
   405d8:	e8a05008	stmia	r0!, {r3, r12, lr}
   405dc:	08bd8001	ldmeqia	sp!, {r0, pc}
   405e0:	e2522001	subs	r2, r2, #1
   405e4:	124f3004	subne	r3, pc, #4
   405e8:	1083f202	addne	pc, r3, r2, lsl #4
   405ec:	e4d13001	ldrb	r3, [r1], #1
   405f0:	e4c03001	strb	r3, [r0], #1
   405f4:	e8bd8001	ldmia	sp!, {r0, pc}
   405f8:	e0d130b2	ldrh	r3, [r1], #2
   405fc:	e0c030b2	strh	r3, [r0], #2
   40600:	e8bd8001	ldmia	sp!, {r0, pc}
   40604:	e1a00000	mov	r0, r0
   40608:	e0d130b2	ldrh	r3, [r1], #2
   4060c:	e0c030b2	strh	r3, [r0], #2
   40610:	e4d13001	ldrb	r3, [r1], #1
   40614:	e4c03001	strb	r3, [r0], #1
   40618:	e8bd8001	ldmia	sp!, {r0, pc}
   4061c:	e4d13001	ldrb	r3, [r1], #1
   40620:	e4c03001	strb	r3, [r0], #1
   40624:	e2522001	subs	r2, r2, #1
   40628:	08bd8001	ldmeqia	sp!, {r0, pc}
   4062c:	e3110003	tst	r1, #3
   40630:	1afffff9	bne	0x4061c
   40634:	e3100001	tst	r0, #1
   40638:	1a000013	bne	0x4068c
   4063c:	e3100002	tst	r0, #2
   40640:	0affffcb	beq	0x40574
   40644:	e2522004	subs	r2, r2, #4
   40648:	3a000007	bcc	0x4066c
   4064c:	e4913004	ldr	r3, [r1], #4
   40650:	e0c030b4	strh	r3, [r0], #4
   40654:	e1a03823	mov	r3, r3, lsr #16
   40658:	e14030b2	strh	r3, [r0, #-2]
   4065c:	e2522004	subs	r2, r2, #4
   40660:	2afffff9	bcs	0x4064c
   40664:	e3720004	cmn	r2, #4
   40668:	08bd8001	ldmeqia	sp!, {r0, pc}
   4066c:	e2922002	adds	r2, r2, #2
   40670:	20d130b2	ldrcsh	r3, [r1], #2
   40674:	20c030b2	strcsh	r3, [r0], #2
   40678:	22422002	subcs	r2, r2, #2
   4067c:	e2922001	adds	r2, r2, #1
   40680:	24d13001	ldrcsb	r3, [r1], #1
   40684:	24c03001	strcsb	r3, [r0], #1
   40688:	e8bd8001	ldmia	sp!, {r0, pc}
   4068c:	e2522004	subs	r2, r2, #4
   40690:	3a000009	bcc	0x406bc
   40694:	e4913004	ldr	r3, [r1], #4
   40698:	e4c03004	strb	r3, [r0], #4
   4069c:	e1a03423	mov	r3, r3, lsr #8
   406a0:	e5403003	strb	r3, [r0, #-3]
   406a4:	e1a03423	mov	r3, r3, lsr #8
   406a8:	e5403002	strb	r3, [r0, #-2]
   406ac:	e1a03423	mov	r3, r3, lsr #8
   406b0:	e5403001	strb	r3, [r0, #-1]
   406b4:	e2522004	subs	r2, r2, #4
   406b8:	2afffff5	bcs	0x40694
   406bc:	e2922004	adds	r2, r2, #4
   406c0:	08bd8001	ldmeqia	sp!, {r0, pc}
   406c4:	e4d13001	ldrb	r3, [r1], #1
   406c8:	e4c03001	strb	r3, [r0], #1
   406cc:	e2522001	subs	r2, r2, #1
   406d0:	1afffffb	bne	0x406c4
   406d4:	e8bd8001	ldmia	sp!, {r0, pc}

  2e21bc:	b510		push	{r4, lr}
  2e21be:	2400		mov	r4, #0
  2e21c0:	489d		ldr	r0, =0x8036a8	; via 0x2e2438
  2e21c2:	6800		ldr	r0, [r0, #0]
  2e21c4:	2802		cmp	r0, #2
  2e21c6:	d804		bhi	0x2e21d2
  2e21c8:	f0d1 ff6d	bl	0x3b40a6
  2e21cc:	2800		cmp	r0, #0
  2e21ce:	d100		bne	0x2e21d2
  2e21d0:	2401		mov	r4, #1
  2e21d2:	1c20		add	r0, r4, #0
  2e21d4:	bd10		pop	{r4, pc}

$pwr_start_CI_charging:
  2e21d6:	b510		push	{r4, lr}
  2e21d8:	b083		sub	sp, #12	; 0xc
  2e21da:	1c04		add	r4, r0, #0
  2e21dc:	4997		ldr	r1, =0x1774b7a	; via 0x2e243c
  2e21de:	2000		mov	r0, #0
  2e21e0:	8008		strh	r0, [r1, #0]
; start of MV100-matching code
  2e21e2:	48f8		ldr	r0, =0xa0020	; via 0x2e25c4
  2e21e4:	9000		str	r0, [sp, #0]
  2e21e6:	a0f9		add	r0, pc, #996	; 0x3e4
  2e21e8:	2111		mov	r1, #17	; 0x11
  2e21ea:	2200		mov	r2, #0
  2e21ec:	43d2		mvn	r2, r2
  2e21ee:	2305		mov	r3, #5
  2e21f0:	f0f8 fd20	bl	0x3dac34
  2e21f4:	207d		mov	r0, #125	; 0x7d
  2e21f6:	00c0		lsl	r0, r0, #3
  2e21f8:	4344		mul	r4, r0
  2e21fa:	1c20		add	r0, r4, #0
  2e21fc:	4990		ldr	r1, =0x357	; via 0x2e2440
  2e21fe:	f115 f815	bl	0x3f722c	; I$DIV
  2e2202:	4668		mov	r0, sp
  2e2204:	8101		strh	r1, [r0, #8]
  2e2206:	2001		mov	r0, #1
  2e2208:	213a		mov	r1, #58	; 0x3a
  2e220a:	2202		mov	r2, #2
  2e220c:	f066 fffe	bl	0x34920c
  2e2210:	2001		mov	r0, #1
  2e2212:	2132		mov	r1, #50	; 0x32
  2e2214:	466a		mov	r2, sp
  2e2216:	8912		ldrh	r2, [r2, #8]
  2e2218:	f066 fff8	bl	0x34920c
  2e221c:	2001		mov	r0, #1
  2e221e:	213a		mov	r1, #58	; 0x3a
  2e2220:	2203		mov	r2, #3
  2e2222:	f066 fff3	bl	0x34920c
  2e2226:	48e8		ldr	r0, =0x1774e70	; via 0x2e25c8
  2e2228:	6800		ldr	r0, [r0, #0]
  2e222a:	2102		mov	r1, #2
  2e222c:	6041		str	r1, [r0, #4]
; end of MV100-matching code
  2e222e:	4985		ldr	r1, =0x17749b8	; via 0x2e2444
  2e2230:	2001		mov	r0, #1
  2e2232:	7008		strb	r0, [r1, #0]
  2e2234:	b003		add	sp, #12	; 0xc
  2e2236:	bd10		pop	{r4, pc}

$pwr_start_CV_charging:
  2e2238:	b510		push	{r4, lr}
  2e223a:	b083		sub	sp, #12	; 0xc
  2e223c:	1c04		add	r4, r0, #0
  2e223e:	497f		ldr	r1, =0x1774b7a	; via 0x2e243c
  2e2240:	2001		mov	r0, #1
  2e2242:	8008		strh	r0, [r1, #0]
  2e2244:	48df		ldr	r0, =0xa0020	; via 0x2e25c4
  2e2246:	9000		str	r0, [sp, #0]
  2e2248:	a0e5		add	r0, pc, #916	; 0x394
  2e224a:	2111		mov	r1, #17	; 0x11
  2e224c:	2200		mov	r2, #0
  2e224e:	43d2		mvn	r2, r2
  2e2250:	2305		mov	r3, #5
  2e2252:	f0f8 fcef	bl	0x3dac34
  2e2256:	3414		add	r4, #20	; 0x14
  2e2258:	0420		lsl	r0, r4, #16
  2e225a:	0c02		lsr	r2, r0, #16
  2e225c:	497a		ldr	r1, =0x801746	; via 0x2e2448
  2e225e:	2000		mov	r0, #0
  2e2260:	5e08		ldrsh	r0, [r1, r0]
  2e2262:	1a10		sub	r0, r2, r0
  2e2264:	0280		lsl	r0, r0, #10
  2e2266:	4979		ldr	r1, =0x801734	; via 0x2e244c
  2e2268:	8809		ldrh	r1, [r1, #0]
  2e226a:	f114 ffc7	bl	0x3f71fc
  2e226e:	4668		mov	r0, sp
  2e2270:	8101		strh	r1, [r0, #8]
  2e2272:	8900		ldrh	r0, [r0, #8]
  2e2274:	4976		ldr	r1, =0x17749ca	; via 0x2e2450
  2e2276:	8008		strh	r0, [r1, #0]
  2e2278:	4976		ldr	r1, =0x17749c6	; via 0x2e2454
  2e227a:	8008		strh	r0, [r1, #0]
  2e227c:	2000		mov	r0, #0
  2e227e:	4976		ldr	r1, =0x17749c8	; via 0x2e2458
  2e2280:	8008		strh	r0, [r1, #0]
  2e2282:	4976		ldr	r1, =0x17749c0	; via 0x2e245c
  2e2284:	8008		strh	r0, [r1, #0]
  2e2286:	4a76		ldr	r2, =0x17749c4	; via 0x2e2460
  2e2288:	2103		mov	r1, #3
  2e228a:	8011		strh	r1, [r2, #0]
  2e228c:	4975		ldr	r1, =0x17749c2	; via 0x2e2464
  2e228e:	8008		strh	r0, [r1, #0]
  2e2290:	4668		mov	r0, sp
  2e2292:	8902		ldrh	r2, [r0, #8]
  2e2294:	48cb		ldr	r0, =0xa0020	; via 0x2e25c4
  2e2296:	9000		str	r0, [sp, #0]
  2e2298:	a0d6		add	r0, pc, #856	; 0x358
  2e229a:	2113		mov	r1, #19	; 0x13
  2e229c:	2305		mov	r3, #5
  2e229e:	f0f8 fcc9	bl	0x3dac34
  2e22a2:	2001		mov	r0, #1
  2e22a4:	213a		mov	r1, #58	; 0x3a
  2e22a6:	2200		mov	r2, #0
  2e22a8:	f066 ffb0	bl	0x34920c
  2e22ac:	2001		mov	r0, #1
  2e22ae:	2132		mov	r1, #50	; 0x32
  2e22b0:	466a		mov	r2, sp
  2e22b2:	8912		ldrh	r2, [r2, #8]
  2e22b4:	f066 ffaa	bl	0x34920c
  2e22b8:	2001		mov	r0, #1
  2e22ba:	213a		mov	r1, #58	; 0x3a
  2e22bc:	2201		mov	r2, #1
  2e22be:	f066 ffa5	bl	0x34920c
  2e22c2:	48c1		ldr	r0, =0x1774e70	; via 0x2e25c8
  2e22c4:	6801		ldr	r1, [r0, #0]
  2e22c6:	2003		mov	r0, #3
  2e22c8:	6048		str	r0, [r1, #4]
  2e22ca:	f04b ffbc	bl	0x32e246
  2e22ce:	2002		mov	r0, #2
  2e22d0:	f7cf fae5	bl	0x2b189e
  2e22d4:	2001		mov	r0, #1
  2e22d6:	2122		mov	r1, #34	; 0x22
  2e22d8:	2200		mov	r2, #0
  2e22da:	f066 ff97	bl	0x34920c
  2e22de:	2002		mov	r0, #2
  2e22e0:	f7cf fadd	bl	0x2b189e
  2e22e4:	4857		ldr	r0, =0x17749b8	; via 0x2e2444
  2e22e6:	2101		mov	r1, #1
  2e22e8:	7001		strb	r1, [r0, #0]
  2e22ea:	b003		add	sp, #12	; 0xc
  2e22ec:	bd10		pop	{r4, pc}

$pwr_stop_charging:
  2e22ee:	b500		push	{lr}
  2e22f0:	b082		sub	sp, #8
  2e22f2:	48b4		ldr	r0, =0xa0020	; via 0x2e25c4
  2e22f4:	9000		str	r0, [sp, #0]
  2e22f6:	a0eb		add	r0, pc, #940	; 0x3ac
  2e22f8:	2115		mov	r1, #21	; 0x15
  2e22fa:	2200		mov	r2, #0
  2e22fc:	43d2		mvn	r2, r2
  2e22fe:	2305		mov	r3, #5
  2e2300:	f0f8 fc98	bl	0x3dac34
  2e2304:	2001		mov	r0, #1
  2e2306:	213a		mov	r1, #58	; 0x3a
  2e2308:	2200		mov	r2, #0
  2e230a:	f066 ff7f	bl	0x34920c
  2e230e:	48ae		ldr	r0, =0x1774e70	; via 0x2e25c8
  2e2310:	6800		ldr	r0, [r0, #0]
  2e2312:	2100		mov	r1, #0
  2e2314:	6041		str	r1, [r0, #4]
; additional code beyond MV100 version
  2e2316:	48bc		ldr	r0, =0x1774b78	; via 0x2e2608
  2e2318:	80c1		strh	r1, [r0, #6]
  2e231a:	8101		strh	r1, [r0, #8]
  2e231c:	4849		ldr	r0, =0x17749b8	; via 0x2e2444
  2e231e:	7001		strb	r1, [r0, #0]
  2e2320:	b002		add	sp, #8
  2e2322:	bd00		pop	{pc}

$pwr_current_loop_cal:
  2e2324:	b500		push	{lr}
  2e2326:	b082		sub	sp, #8
; "Current loop calibration" trace
  2e2328:	48a6		ldr	r0, =0xa0020	; via 0x2e25c4
  2e232a:	9000		str	r0, [sp, #0]
  2e232c:	a0e3		add	r0, pc, #908	; 0x38c
  2e232e:	2118		mov	r1, #24	; 0x18
  2e2330:	2200		mov	r2, #0
  2e2332:	43d2		mvn	r2, r2
  2e2334:	2305		mov	r3, #5
  2e2336:	f0f8 fc7d	bl	0x3dac34
; same as MV100 version
  2e233a:	2001		mov	r0, #1
  2e233c:	213a		mov	r1, #58	; 0x3a
  2e233e:	2210		mov	r2, #16	; 0x10
  2e2340:	f066 ff64	bl	0x34920c
  2e2344:	2001		mov	r0, #1
  2e2346:	213a		mov	r1, #58	; 0x3a
  2e2348:	2219		mov	r2, #25	; 0x19
  2e234a:	f066 ff5f	bl	0x34920c
; TIMER0 run for 22 ticks (probably 100 ms intended)
  2e234e:	2000		mov	r0, #0
  2e2350:	2116		mov	r1, #22	; 0x16
  2e2352:	2200		mov	r2, #0
  2e2354:	f048 fd90	bl	0x32ae78
  2e2358:	b002		add	sp, #8
  2e235a:	bd00		pop	{pc}

$pwr_calibration_process:
  2e235c:	b500		push	{lr}
  2e235e:	2138		mov	r1, #56	; 0x38
  2e2360:	4899		ldr	r0, =0x1774e70	; via 0x2e25c8
  2e2362:	6800		ldr	r0, [r0, #0]
  2e2364:	5e08		ldrsh	r0, [r1, r0]
  2e2366:	f04b fbda	bl	0x32db1e	; $pwr_bat_temp_within_limits
  2e236a:	2800		cmp	r0, #0
  2e236c:	d111		bne	0x2e2392
; failure code path
  2e236e:	2000		mov	r0, #0
  2e2370:	f0b2 fda7	bl	0x394ec2
  2e2374:	2132		mov	r1, #50	; 0x32
  2e2376:	48ca		ldr	r0, =0x1774e38	; via 0x2e26a0
  2e2378:	6800		ldr	r0, [r0, #0]
  2e237a:	5c08		ldrb	r0, [r1, r0]
  2e237c:	2800		cmp	r0, #0
  2e237e:	d105		bne	0x2e238c
  2e2380:	2001		mov	r0, #1
  2e2382:	213c		mov	r1, #60	; 0x3c
  2e2384:	2201		mov	r2, #1
  2e2386:	f066 ff41	bl	0x34920c
  2e238a:	bd00		pop	{pc}
  2e238c:	f0d1 fc11	bl	0x3b3bb2
  2e2390:	bd00		pop	{pc}
; good path
  2e2392:	488d		ldr	r0, =0x1774e70	; via 0x2e25c8
  2e2394:	6801		ldr	r1, [r0, #0]
  2e2396:	2005		mov	r0, #5
  2e2398:	6308		str	r0, [r1, #48]	; 0x30
  2e239a:	f7ff ffc3	bl	0x2e2324	; $pwr_current_loop_cal
  2e239e:	bd00		pop	{pc}

$pwr_battery_qualification:
  2e23a0:	b500		push	{lr}
  2e23a2:	b082		sub	sp, #8
; "Battery qualification" trace
  2e23a4:	4887		ldr	r0, =0xa0020	; via 0x2e25c4
  2e23a6:	9000		str	r0, [sp, #0]
  2e23a8:	a0cb		add	r0, pc, #812	; 0x32c
  2e23aa:	2115		mov	r1, #21	; 0x15
  2e23ac:	2200		mov	r2, #0
  2e23ae:	43d2		mvn	r2, r2
  2e23b0:	2305		mov	r3, #5
  2e23b2:	f0f8 fc3f	bl	0x3dac34
; pwr_env_ctrl_blk->timer0_state = BATTERY_SHORT_TEST;
  2e23b6:	4884		ldr	r0, =0x1774e70	; via 0x2e25c8
  2e23b8:	6800		ldr	r0, [r0, #0]
  2e23ba:	2101		mov	r1, #1
  2e23bc:	6301		str	r1, [r0, #48]	; 0x30
; CONSTANT_CURRENT_VALUE = 522 mA
  2e23be:	4893		ldr	r0, =0x20a	; via 0x2e260c
  2e23c0:	f7ff ff09	bl	0x2e21d6	; $pwr_start_CI_charging
; TIMER0 to 300 ms
  2e23c4:	2000		mov	r0, #0
  2e23c6:	2141		mov	r1, #65	; 0x41
  2e23c8:	2200		mov	r2, #0
  2e23ca:	f048 fd55	bl	0x32ae78
  2e23ce:	b002		add	sp, #8
  2e23d0:	bd00		pop	{pc}

$pwr_start_fast_charge:
  2e23d2:	b500		push	{lr}
  2e23d4:	f0b2 fcca	bl	0x394d6c	; $pwr_send_CI_charge_start_event ?
  2e23d8:	2001		mov	r0, #1
  2e23da:	2138		mov	r1, #56	; 0x38
  2e23dc:	2201		mov	r2, #1
  2e23de:	f066 ff15	bl	0x34920c
  2e23e2:	4817		ldr	r0, =0x357	; via 0x2e2440
  2e23e4:	4978		ldr	r1, =0x1774e70	; via 0x2e25c8
  2e23e6:	6809		ldr	r1, [r1, #0]
  2e23e8:	8909		ldrh	r1, [r1, #8]
  2e23ea:	4348		mul	r0, r1
  2e23ec:	217d		mov	r1, #125	; 0x7d
  2e23ee:	00c9		lsl	r1, r1, #3
  2e23f0:	f114 ff1c	bl	0x3f722c	; I$DIV
; diff from MV100 version begins
  2e23f4:	0408		lsl	r0, r1, #16
  2e23f6:	0c00		lsr	r0, r0, #16
  2e23f8:	f113 ff88	bl	0x3f630c	; U$TOFD
  2e23fc:	a2bc		add	r2, pc, #752	; 0x2f0
  2e23fe:	ca0c		ldmia	r2!, {r2, r3}
  2e2400:	f101 fb1d	bl	0x3e3a3e	; FD$ADD
  2e2404:	f112 fd5a	bl	0x3f4ebc	; FD$TOU
  2e2408:	0400		lsl	r0, r0, #16
  2e240a:	0c00		lsr	r0, r0, #16
  2e240c:	f7ff fee3	bl	0x2e21d6	; $pwr_start_CI_charging
  2e2410:	f04b ff19	bl	0x32e246
  2e2414:	2002		mov	r0, #2
  2e2416:	f7cf fa42	bl	0x2b189e	; rvf_delay()
  2e241a:	2001		mov	r0, #1
  2e241c:	2122		mov	r1, #34	; 0x22
  2e241e:	2200		mov	r2, #0
  2e2420:	f066 fef4	bl	0x34920c	; $ABB_Write_Register_on_page
  2e2424:	2002		mov	r0, #2
  2e2426:	f7cf fa3a	bl	0x2b189e
; same TIMER1 setting as in MV100
  2e242a:	2001		mov	r0, #1
  2e242c:	49b2		ldr	r1, =0x363	; via 0x2e26f8
  2e242e:	2200		mov	r2, #0
  2e2430:	f048 fd22	bl	0x32ae78
  2e2434:	bd00		pop	{pc}
  2e2436:	46c0		nop			(mov r8, r8)

$pwr_short_test_timer_process:
  2e2468:	b570		push	{r4, r5, r6, lr}
; not in MV100: additional checks to see if the state is something other than
; CHARGE_STOPPED and that the charging power source is still there
  2e246a:	b082		sub	sp, #8
  2e246c:	f066 ff4e	bl	0x34930c	; $ABB_Read_Status
  2e2470:	4955		ldr	r1, =0x1774e70	; via 0x2e25c8
  2e2472:	6809		ldr	r1, [r1, #0]
  2e2474:	6849		ldr	r1, [r1, #4]
  2e2476:	2900		cmp	r1, #0
  2e2478:	d100		bne	0x2e247c
  2e247a:	e0a1		b	0x2e25c0
  2e247c:	09c0		lsr	r0, r0, #7
  2e247e:	d200		bcs	0x2e2482
  2e2480:	e09e		b	0x2e25c0
; trace
  2e2482:	4850		ldr	r0, =0xa0020	; via 0x2e25c4
  2e2484:	9000		str	r0, [sp, #0]
  2e2486:	a0c8		add	r0, pc, #800	; 0x320
  2e2488:	211f		mov	r1, #31	; 0x1f
  2e248a:	2200		mov	r2, #0
  2e248c:	43d2		mvn	r2, r2
  2e248e:	2302		mov	r3, #2
  2e2490:	f0f8 fbd0	bl	0x3dac34
  2e2494:	2002		mov	r0, #2
  2e2496:	f7cf fa02	bl	0x2b189e	; rvf_delay()
  2e249a:	2001		mov	r0, #1
  2e249c:	2122		mov	r1, #34	; 0x22
  2e249e:	2200		mov	r2, #0
  2e24a0:	f066 feb4	bl	0x34920c
  2e24a4:	2002		mov	r0, #2
  2e24a6:	f7cf f9fa	bl	0x2b189e
; read and trace-dump VBAT, VCHG and ICHG
  2e24aa:	2001		mov	r0, #1
  2e24ac:	211e		mov	r1, #30	; 0x1e
  2e24ae:	f066 fed4	bl	0x34925a
  2e24b2:	1c05		add	r5, r0, #0
  2e24b4:	4843		ldr	r0, =0xa0020	; via 0x2e25c4
  2e24b6:	9000		str	r0, [sp, #0]
  2e24b8:	a0c3		add	r0, pc, #780	; 0x30c
  2e24ba:	2111		mov	r1, #17	; 0x11
  2e24bc:	1c2a		add	r2, r5, #0
  2e24be:	2302		mov	r3, #2
  2e24c0:	f0f8 fbb8	bl	0x3dac34
  2e24c4:	2001		mov	r0, #1
  2e24c6:	2120		mov	r1, #32	; 0x20
  2e24c8:	f066 fec7	bl	0x34925a
  2e24cc:	1c06		add	r6, r0, #0
  2e24ce:	483d		ldr	r0, =0xa0020	; via 0x2e25c4
  2e24d0:	9000		str	r0, [sp, #0]
  2e24d2:	a0c2		add	r0, pc, #776	; 0x308
  2e24d4:	2111		mov	r1, #17	; 0x11
  2e24d6:	1c32		add	r2, r6, #0
  2e24d8:	2302		mov	r3, #2
  2e24da:	f0f8 fbab	bl	0x3dac34
  2e24de:	2001		mov	r0, #1
  2e24e0:	2122		mov	r1, #34	; 0x22
  2e24e2:	f066 feba	bl	0x34925a
  2e24e6:	1c04		add	r4, r0, #0
  2e24e8:	4836		ldr	r0, =0xa0020	; via 0x2e25c4
  2e24ea:	9000		str	r0, [sp, #0]
  2e24ec:	a0c0		add	r0, pc, #768	; 0x300
  2e24ee:	211b		mov	r1, #27	; 0x1b
  2e24f0:	1c22		add	r2, r4, #0
  2e24f2:	2305		mov	r3, #5
  2e24f4:	f0f8 fb9e	bl	0x3dac34
; end of the read-and-dump
  2e24f8:	f7ff fef9	bl	0x2e22ee	; $pwr_stop_charging
  2e24fc:	20ff		mov	r0, #255	; 0xff
  2e24fe:	30b7		add	r0, #183	; 0xb7
  2e2500:	4285		cmp	r5, r0
  2e2502:	dd21		ble	0x2e2548
  2e2504:	205f		mov	r0, #95	; 0x5f
  2e2506:	00c0		lsl	r0, r0, #3
  2e2508:	4286		cmp	r6, r0
  2e250a:	da1d		bge	0x2e2548
; "Battery OK" trace
  2e250c:	482d		ldr	r0, =0xa0020	; via 0x2e25c4
  2e250e:	9000		str	r0, [sp, #0]
  2e2510:	a0be		add	r0, pc, #760	; 0x2f8
  2e2512:	210a		mov	r1, #10	; 0xa
  2e2514:	2200		mov	r2, #0
  2e2516:	43d2		mvn	r2, r2
  2e2518:	2305		mov	r3, #5
  2e251a:	f0f8 fb8b	bl	0x3dac34
  2e251e:	4c2a		ldr	r4, =0x1774e70	; via 0x2e25c8
  2e2520:	6821		ldr	r1, [r4, #0]
; setting the time limit for the overall charging process: 7200 s
  2e2522:	20e1		mov	r0, #225	; 0xe1
  2e2524:	0140		lsl	r0, r0, #5
  2e2526:	8748		strh	r0, [r1, #58]	; 0x3a
; elapsed time init to 0
  2e2528:	6821		ldr	r1, [r4, #0]
  2e252a:	2000		mov	r0, #0
  2e252c:	8788		strh	r0, [r1, #60]	; 0x3c
; mystery var init
  2e252e:	48c0		ldr	r0, =0x1775040	; via 0x2e2830
  2e2530:	2165		mov	r1, #101	; 0x65
  2e2532:	7001		strb	r1, [r0, #0]
  2e2534:	f048 fc96	bl	0x32ae64	; $rvf_get_tick_count
  2e2538:	49be		ldr	r1, =0x17749bc	; via 0x2e2834
  2e253a:	6008		str	r0, [r1, #0]
; pwr_env_ctrl_blk->charging_state = TESTING_BATTERY;
  2e253c:	6821		ldr	r1, [r4, #0]
  2e253e:	2001		mov	r0, #1
  2e2540:	6048		str	r0, [r1, #4]
  2e2542:	f04b fb7d	bl	0x32dc40	; $pwr_get_battery_temperature
  2e2546:	e03b		b	0x2e25c0	; return
; failure code path
  2e2548:	481e		ldr	r0, =0xa0020	; via 0x2e25c4
  2e254a:	9000		str	r0, [sp, #0]
  2e254c:	a0b2		add	r0, pc, #712	; 0x2c8
  2e254e:	2117		mov	r1, #23	; 0x17
  2e2550:	2200		mov	r2, #0
  2e2552:	43d2		mvn	r2, r2
  2e2554:	2302		mov	r3, #2
  2e2556:	f0f8 fb6d	bl	0x3dac34
  2e255a:	20ff		mov	r0, #255	; 0xff
  2e255c:	30b7		add	r0, #183	; 0xb7
  2e255e:	4285		cmp	r5, r0
  2e2560:	dd19		ble	0x2e2596
  2e2562:	20a3		mov	r0, #163	; 0xa3
  2e2564:	0080		lsl	r0, r0, #2
  2e2566:	4285		cmp	r5, r0
  2e2568:	da13		bge	0x2e2592
  2e256a:	2c46		cmp	r4, #70	; 0x46
  2e256c:	dd0f		ble	0x2e258e
  2e256e:	205f		mov	r0, #95	; 0x5f
  2e2570:	00c0		lsl	r0, r0, #3
  2e2572:	4286		cmp	r6, r0
  2e2574:	da01		bge	0x2e257a
  2e2576:	2108		mov	r1, #8
  2e2578:	e00e		b	0x2e2598
  2e257a:	4823		ldr	r0, =0x1774b78	; via 0x2e2608
  2e257c:	210b		mov	r1, #11	; 0xb
  2e257e:	43c9		mvn	r1, r1
  2e2580:	8001		strh	r1, [r0, #0]
  2e2582:	2001		mov	r0, #1
  2e2584:	213a		mov	r1, #58	; 0x3a
  2e2586:	2280		mov	r2, #128	; 0x80
  2e2588:	f066 fe40	bl	0x34920c
  2e258c:	e007		b	0x2e259e
  2e258e:	2102		mov	r1, #2
  2e2590:	e002		b	0x2e2598
  2e2592:	2107		mov	r1, #7
  2e2594:	e000		b	0x2e2598
  2e2596:	2101		mov	r1, #1
  2e2598:	43c9		mvn	r1, r1
  2e259a:	481b		ldr	r0, =0x1774b78	; via 0x2e2608
  2e259c:	8001		strh	r1, [r0, #0]
  2e259e:	2002		mov	r0, #2
  2e25a0:	f0b2 fc8f	bl	0x394ec2
  2e25a4:	2032		mov	r0, #50	; 0x32
  2e25a6:	493e		ldr	r1, =0x1774e38	; via 0x2e26a0
  2e25a8:	6809		ldr	r1, [r1, #0]
  2e25aa:	5c40		ldrb	r0, [r0, r1]
  2e25ac:	2800		cmp	r0, #0
  2e25ae:	d105		bne	0x2e25bc
  2e25b0:	2001		mov	r0, #1
  2e25b2:	213c		mov	r1, #60	; 0x3c
  2e25b4:	2201		mov	r2, #1
  2e25b6:	f066 fe29	bl	0x34920c
  2e25ba:	e001		b	0x2e25c0
  2e25bc:	f0d1 faf9	bl	0x3b3bb2
  2e25c0:	b002		add	sp, #8
  2e25c2:	bd70		pop	{r4, r5, r6, pc}

$pwr_open_test_timer_process:
  2e2610:	b510		push	{r4, lr}
  2e2612:	b082		sub	sp, #8
  2e2614:	48e5		ldr	r0, =0xa0020	; via 0x2e29ac
  2e2616:	9000		str	r0, [sp, #0]
  2e2618:	a0e6		add	r0, pc, #920	; 0x398
  2e261a:	2119		mov	r1, #25	; 0x19
  2e261c:	2200		mov	r2, #0
  2e261e:	43d2		mvn	r2, r2
  2e2620:	2302		mov	r3, #2
  2e2622:	f0f8 fb07	bl	0x3dac34
  2e2626:	2001		mov	r0, #1
  2e2628:	2122		mov	r1, #34	; 0x22
  2e262a:	f066 fe16	bl	0x34925a
  2e262e:	1c04		add	r4, r0, #0
  2e2630:	48de		ldr	r0, =0xa0020	; via 0x2e29ac
  2e2632:	9000		str	r0, [sp, #0]
  2e2634:	a06e		add	r0, pc, #440	; 0x1b8
  2e2636:	211b		mov	r1, #27	; 0x1b
  2e2638:	1c22		add	r2, r4, #0
  2e263a:	2305		mov	r3, #5
  2e263c:	f0f8 fafa	bl	0x3dac34
  2e2640:	f7ff fe55	bl	0x2e22ee
  2e2644:	2c00		cmp	r4, #0
  2e2646:	d11a		bne	0x2e267e
  2e2648:	48d8		ldr	r0, =0xa0020	; via 0x2e29ac
  2e264a:	9000		str	r0, [sp, #0]
  2e264c:	a0e0		add	r0, pc, #896	; 0x380
  2e264e:	210c		mov	r1, #12	; 0xc
  2e2650:	2200		mov	r2, #0
  2e2652:	43d2		mvn	r2, r2
  2e2654:	2302		mov	r3, #2
  2e2656:	f0f8 faed	bl	0x3dac34
  2e265a:	2001		mov	r0, #1
  2e265c:	f0b2 fc31	bl	0x394ec2
  2e2660:	2132		mov	r1, #50	; 0x32
  2e2662:	480f		ldr	r0, =0x1774e38	; via 0x2e26a0
  2e2664:	6800		ldr	r0, [r0, #0]
  2e2666:	5c08		ldrb	r0, [r1, r0]
  2e2668:	2800		cmp	r0, #0
  2e266a:	d105		bne	0x2e2678
  2e266c:	2001		mov	r0, #1
  2e266e:	213c		mov	r1, #60	; 0x3c
  2e2670:	2201		mov	r2, #1
  2e2672:	f066 fdcb	bl	0x34920c
  2e2676:	e011		b	0x2e269c
  2e2678:	f0d1 fa9b	bl	0x3b3bb2
  2e267c:	e00e		b	0x2e269c
  2e267e:	48cb		ldr	r0, =0xa0020	; via 0x2e29ac
  2e2680:	9000		str	r0, [sp, #0]
  2e2682:	a062		add	r0, pc, #392	; 0x188
  2e2684:	210a		mov	r1, #10	; 0xa
  2e2686:	2200		mov	r2, #0
  2e2688:	43d2		mvn	r2, r2
  2e268a:	2305		mov	r3, #5
  2e268c:	f0f8 fad2	bl	0x3dac34
  2e2690:	48c7		ldr	r0, =0x1774e70	; via 0x2e29b0
  2e2692:	6800		ldr	r0, [r0, #0]
  2e2694:	2101		mov	r1, #1
  2e2696:	6041		str	r1, [r0, #4]
  2e2698:	f04b fad2	bl	0x32dc40
  2e269c:	b002		add	sp, #8
  2e269e:	bd10		pop	{r4, pc}

$pwr_cal_timer_process:
  2e26fc:	b510		push	{r4, lr}
  2e26fe:	b082		sub	sp, #8
; same check for charger presence and active state as seen before
  2e2700:	f066 fe04	bl	0x34930c	; $ABB_Read_Status
  2e2704:	49aa		ldr	r1, =0x1774e70	; via 0x2e29b0
  2e2706:	6809		ldr	r1, [r1, #0]
  2e2708:	6849		ldr	r1, [r1, #4]
  2e270a:	2900		cmp	r1, #0
  2e270c:	d001		beq	0x2e2712
  2e270e:	09c0		lsr	r0, r0, #7
  2e2710:	d205		bcs	0x2e271e
  2e2712:	2001		mov	r0, #1
  2e2714:	2138		mov	r1, #56	; 0x38
  2e2716:	2201		mov	r2, #1
  2e2718:	f066 fd78	bl	0x34920c
  2e271c:	e042		b	0x2e27a4
; checks passed
; "TIMER0: Battery calibration" trace
  2e271e:	48a3		ldr	r0, =0xa0020	; via 0x2e29ac
  2e2720:	9000		str	r0, [sp, #0]
  2e2722:	a0c7		add	r0, pc, #796	; 0x31c
  2e2724:	211b		mov	r1, #27	; 0x1b
  2e2726:	2200		mov	r2, #0
  2e2728:	43d2		mvn	r2, r2
  2e272a:	2302		mov	r3, #2
  2e272c:	f0f8 fa82	bl	0x3dac34
; write 0 into ADIN2REG
  2e2730:	2001		mov	r0, #1
  2e2732:	2128		mov	r1, #40	; 0x28
  2e2734:	2200		mov	r2, #0
  2e2736:	f066 fd69	bl	0x34920c
; delay 2 ticks
  2e273a:	2002		mov	r0, #2
  2e273c:	f7cf f8af	bl	0x2b189e
; back to expected code
  2e2740:	4c9b		ldr	r4, =0x1774e70	; via 0x2e29b0
  2e2742:	2001		mov	r0, #1
  2e2744:	2122		mov	r1, #34	; 0x22
  2e2746:	f066 fd88	bl	0x34925a
  2e274a:	6821		ldr	r1, [r4, #0]
  2e274c:	8108		strh	r0, [r1, #8]
; i2v offset (raw ADC) also stored in this other var
  2e274e:	48a4		ldr	r0, =0x1774b82	; via 0x2e29e0
  2e2750:	6821		ldr	r1, [r4, #0]
  2e2752:	8909		ldrh	r1, [r1, #8]
  2e2754:	8001		strh	r1, [r0, #0]
; back to expected code
; "i2v offset (MADC code) " trace
  2e2756:	6820		ldr	r0, [r4, #0]
  2e2758:	8902		ldrh	r2, [r0, #8]
  2e275a:	4894		ldr	r0, =0xa0020	; via 0x2e29ac
  2e275c:	9000		str	r0, [sp, #0]
  2e275e:	a0bf		add	r0, pc, #764	; 0x2fc
  2e2760:	2117		mov	r1, #23	; 0x17
  2e2762:	2305		mov	r3, #5
  2e2764:	f0f8 fa66	bl	0x3dac34
  2e2768:	f7ff fdc1	bl	0x2e22ee	; $pwr_stop_charging
  2e276c:	6820		ldr	r0, [r4, #0]
  2e276e:	3004		add	r0, #4
  2e2770:	8881		ldrh	r1, [r0, #4]
  2e2772:	2900		cmp	r1, #0
  2e2774:	d109		bne	0x2e278a
; i2v offset is zero
; pwr_env_ctrl_blk->charging_state = TESTING_BATTERY;
  2e2776:	2101		mov	r1, #1
  2e2778:	6001		str	r1, [r0, #0]
; setting BCICONF to 0x18
  2e277a:	2002		mov	r0, #2
  2e277c:	211a		mov	r1, #26	; 0x1a
  2e277e:	2218		mov	r2, #24	; 0x18
  2e2780:	f066 fd44	bl	0x34920c	; $ABB_Write_Register_on_page
  2e2784:	f7ff fdce	bl	0x2e2324	; $pwr_current_loop_cal
  2e2788:	e00c		b	0x2e27a4	; return;
; i2v offset is not zero
  2e278a:	317a		add	r1, #122	; 0x7a
  2e278c:	80c1		strh	r1, [r0, #6]
; "End of charge current (MADC code) " trace
  2e278e:	6820		ldr	r0, [r4, #0]
  2e2790:	8942		ldrh	r2, [r0, #10]	; 0xa
  2e2792:	4886		ldr	r0, =0xa0020	; via 0x2e29ac
  2e2794:	9000		str	r0, [sp, #0]
  2e2796:	a0b7		add	r0, pc, #732	; 0x2dc
  2e2798:	2122		mov	r1, #34	; 0x22
  2e279a:	2305		mov	r3, #5
  2e279c:	f0f8 fa4a	bl	0x3dac34
  2e27a0:	f7ff fe17	bl	0x2e23d2	; $pwr_start_fast_charge
  2e27a4:	b002		add	sp, #8
  2e27a6:	bd10		pop	{r4, pc}

$l1_abb_power_on:
  31c036:	b510		push	{r4, lr}
  31c038:	b084		sub	sp, #16	; 0x10
  31c03a:	2000		mov	r0, #0
  31c03c:	4669		mov	r1, sp
  31c03e:	8008		strh	r0, [r1, #0]
  31c040:	466a		mov	r2, sp
  31c042:	213c		mov	r1, #60	; 0x3c
  31c044:	8051		strh	r1, [r2, #2]
  31c046:	2105		mov	r1, #5
  31c048:	8091		strh	r1, [r2, #4]
  31c04a:	4669		mov	r1, sp
  31c04c:	80c8		strh	r0, [r1, #6]
  31c04e:	2201		mov	r2, #1
  31c050:	810a		strh	r2, [r1, #8]
  31c052:	8148		strh	r0, [r1, #10]	; 0xa
  31c054:	8188		strh	r0, [r1, #12]	; 0xc
  31c056:	4668		mov	r0, sp
  31c058:	f0d3 fcc5	bl	0x3ef9e6	; $SPI_InitDev
  31c05c:	f02d f924	bl	0x3492a8	; $ABB_free_13M
  31c060:	f02d f954	bl	0x34930c	; $ABB_Read_Status
  31c064:	2001		mov	r0, #1
  31c066:	2136		mov	r1, #54	; 0x36
  31c068:	f02d f8f7	bl	0x34925a	; $ABB_Read_Register_on_page
  31c06c:	4cdf		ldr	r4, =0x8029a4	; via 0x31c3ec
  31c06e:	48e0		ldr	r0, =0x15a4	; via 0x31c3f0
  31c070:	5d01		ldrb	r1, [r0, r4]
  31c072:	2005		mov	r0, #5
  31c074:	0340		lsl	r0, r0, #13
  31c076:	f02d f96b	bl	0x349350	; $ABB_on
  31c07a:	20ff		mov	r0, #255	; 0xff
  31c07c:	49ac		ldr	r1, =0x3df	; via 0x31c330
  31c07e:	f02d fa5c	bl	0x34953a	; $ABB_Conf_ADC
  31c082:	48db		ldr	r0, =0x15a4	; via 0x31c3f0
  31c084:	5d00		ldrb	r0, [r0, r4]
  31c086:	2800		cmp	r0, #0
  31c088:	d101		bne	0x31c08e
  31c08a:	f0c0 fc4d	bl	0x3dc928	; $Create_ABB_HISR
  31c08e:	4c24		ldr	r4, =0xffd001a8	; via 0x31c120
  31c090:	48a8		ldr	r0, =0x8028a5	; via 0x31c334
  31c092:	7800		ldrb	r0, [r0, #0]
  31c094:	2800		cmp	r0, #0
  31c096:	d108		bne	0x31c0aa
  31c098:	20ff		mov	r0, #255	; 0xff
  31c09a:	30dd		add	r0, #221	; 0xdd
  31c09c:	1900		add	r0, r0, r4
  31c09e:	2100		mov	r1, #0
  31c0a0:	2200		mov	r2, #0
  31c0a2:	2301		mov	r3, #1
  31c0a4:	f0de f83a	bl	0x3fa11c
  31c0a8:	e007		b	0x31c0ba
  31c0aa:	20ff		mov	r0, #255	; 0xff
  31c0ac:	30dd		add	r0, #221	; 0xdd
  31c0ae:	1900		add	r0, r0, r4
  31c0b0:	2105		mov	r1, #5
  31c0b2:	2205		mov	r2, #5
  31c0b4:	2301		mov	r3, #1
  31c0b6:	f0de f831	bl	0x3fa11c
  31c0ba:	489f		ldr	r0, =0x802868	; via 0x31c338
  31c0bc:	2196		mov	r1, #150	; 0x96
  31c0be:	5a09		ldrh	r1, [r1, r0]
  31c0c0:	8121		strh	r1, [r4, #8]
  31c0c2:	2198		mov	r1, #152	; 0x98
  31c0c4:	5a09		ldrh	r1, [r1, r0]
  31c0c6:	8661		strh	r1, [r4, #50]	; 0x32
  31c0c8:	219a		mov	r1, #154	; 0x9a
  31c0ca:	5a09		ldrh	r1, [r1, r0]
  31c0cc:	86a1		strh	r1, [r4, #52]	; 0x34
  31c0ce:	219c		mov	r1, #156	; 0x9c
  31c0d0:	5a09		ldrh	r1, [r1, r0]
  31c0d2:	86e1		strh	r1, [r4, #54]	; 0x36
  31c0d4:	4a99		ldr	r2, =0xffd001e8	; via 0x31c33c
  31c0d6:	219e		mov	r1, #158	; 0x9e
  31c0d8:	5a09		ldrh	r1, [r1, r0]
  31c0da:	80d1		strh	r1, [r2, #6]
  31c0dc:	21a0		mov	r1, #160	; 0xa0
  31c0de:	5a09		ldrh	r1, [r1, r0]
  31c0e0:	8621		strh	r1, [r4, #48]	; 0x30
  31c0e2:	21a2		mov	r1, #162	; 0xa2
  31c0e4:	5a09		ldrh	r1, [r1, r0]
  31c0e6:	8761		strh	r1, [r4, #58]	; 0x3a
  31c0e8:	21a4		mov	r1, #164	; 0xa4
  31c0ea:	5a09		ldrh	r1, [r1, r0]
  31c0ec:	87a1		strh	r1, [r4, #60]	; 0x3c
  31c0ee:	21a6		mov	r1, #166	; 0xa6
  31c0f0:	5a09		ldrh	r1, [r1, r0]
  31c0f2:	87e1		strh	r1, [r4, #62]	; 0x3e
  31c0f4:	21a8		mov	r1, #168	; 0xa8
  31c0f6:	5a09		ldrh	r1, [r1, r0]
  31c0f8:	8011		strh	r1, [r2, #0]
  31c0fa:	21aa		mov	r1, #170	; 0xaa
  31c0fc:	5a09		ldrh	r1, [r1, r0]
  31c0fe:	8051		strh	r1, [r2, #2]
  31c100:	21ac		mov	r1, #172	; 0xac
  31c102:	5a09		ldrh	r1, [r1, r0]
  31c104:	8091		strh	r1, [r2, #4]
  31c106:	21ae		mov	r1, #174	; 0xae
  31c108:	5a09		ldrh	r1, [r1, r0]
  31c10a:	85e1		strh	r1, [r4, #46]	; 0x2e
  31c10c:	21b0		mov	r1, #176	; 0xb0
  31c10e:	5a09		ldrh	r1, [r1, r0]
  31c110:	8721		strh	r1, [r4, #56]	; 0x38
  31c112:	21b2		mov	r1, #178	; 0xb2
  31c114:	5a08		ldrh	r0, [r1, r0]
  31c116:	85a0		strh	r0, [r4, #44]	; 0x2c
  31c118:	b004		add	sp, #16	; 0x10
  31c11a:	bd10		pop	{r4, pc}

$l1_initialize:
  31c6e4:	b530		push	{r4, r5, lr}
  31c6e6:	1c04		add	r4, r0, #0
  31c6e8:	483f		ldr	r0, =0x803f48	; via 0x31c7e8
  31c6ea:	7800		ldrb	r0, [r0, #0]
  31c6ec:	2800		cmp	r0, #0
  31c6ee:	d101		bne	0x31c6f4
  31c6f0:	f59f fdd1	bl	0xbc296
  31c6f4:	4968		ldr	r1, =0x8029a4	; via 0x31c898
  31c6f6:	4865		ldr	r0, =0x15a4	; via 0x31c88c
  31c6f8:	2500		mov	r5, #0
  31c6fa:	5445		strb	r5, [r0, r1]
  31c6fc:	f0c6 fbf6	bl	0x3e2eec
  31c700:	481c		ldr	r0, =0x802868	; via 0x31c774
  31c702:	7821		ldrb	r1, [r4, #0]
  31c704:	7001		strb	r1, [r0, #0]
  31c706:	213d		mov	r1, #61	; 0x3d
  31c708:	7922		ldrb	r2, [r4, #4]
  31c70a:	540a		strb	r2, [r1, r0]
  31c70c:	88e1		ldrh	r1, [r4, #6]
  31c70e:	87c1		strh	r1, [r0, #62]	; 0x3e
  31c710:	21c0		mov	r1, #192	; 0xc0
  31c712:	540d		strb	r5, [r1, r0]
  31c714:	22c1		mov	r2, #193	; 0xc1
  31c716:	2101		mov	r1, #1
  31c718:	5411		strb	r1, [r2, r0]
  31c71a:	22c2		mov	r2, #194	; 0xc2
  31c71c:	5411		strb	r1, [r2, r0]
  31c71e:	22c3		mov	r2, #195	; 0xc3
  31c720:	5411		strb	r1, [r2, r0]
  31c722:	495e		ldr	r1, =0x802228	; via 0x31c89c
  31c724:	7a22		ldrb	r2, [r4, #8]
  31c726:	700a		strb	r2, [r1, #0]
  31c728:	68e2		ldr	r2, [r4, #12]	; 0xc
  31c72a:	604a		str	r2, [r1, #4]
  31c72c:	213c		mov	r1, #60	; 0x3c
  31c72e:	78e2		ldrb	r2, [r4, #3]
  31c730:	540a		strb	r2, [r1, r0]
  31c732:	f0dd fce3	bl	0x3fa0fc	; $Cust_init_std
  31c736:	f0dd fce9	bl	0x3fa10c	; $Cust_init_params
  31c73a:	f7ff ffb2	bl	0x31c6a2	; $l1_dpll_init_var
  31c73e:	f0dc fd8d	bl	0x3f925c	; $dsp_power_on
  31c742:	f7ff fc78	bl	0x31c036	; $l1_abb_power_on
  31c746:	f7ff fc68	bl	0x31c01a	; $l1_tpu_init
  31c74a:	f7ff fb47	bl	0x31bddc	; $l1_dsp_init
  31c74e:	f7ff fdf9	bl	0x31c344	; $l1_initialize_var
  31c752:	f0dc fccb	bl	0x3f90ec	; $initialize_l1pvar
  31c756:	bd30		pop	{r4, r5, pc}

$rvf_get_tick_count:
  32ae64:	b500		push	{lr}
  32ae66:	f0ce fbb1	bl	0x3f95cc	; $TMT_Retrieve_Clock
  32ae6a:	bd00		pop	{pc}

$rvf_start_timer:
  32ae78:	b500		push	{lr}
  32ae7a:	b085		sub	sp, #20	; 0x14
  32ae7c:	466b		mov	r3, sp
  32ae7e:	741a		strb	r2, [r3, #16]	; 0x10
  32ae80:	9103		str	r1, [sp, #12]	; 0xc
  32ae82:	4669		mov	r1, sp
  32ae84:	7208		strb	r0, [r1, #8]
  32ae86:	f786 fd4c	bl	0x2b1922	; $rvf_get_taskid
  32ae8a:	4669		mov	r1, sp
  32ae8c:	7448		strb	r0, [r1, #17]	; 0x11
  32ae8e:	4668		mov	r0, sp
  32ae90:	7a00		ldrb	r0, [r0, #8]
  32ae92:	2803		cmp	r0, #3
  32ae94:	d003		beq	0x32ae9e
  32ae96:	4668		mov	r0, sp
  32ae98:	7a00		ldrb	r0, [r0, #8]
  32ae9a:	2802		cmp	r0, #2
  32ae9c:	d108		bne	0x32aeb0
  32ae9e:	2000		mov	r0, #0
  32aea0:	9000		str	r0, [sp, #0]
  32aea2:	a0b3		add	r0, pc, #716	; 0x2cc
  32aea4:	2125		mov	r1, #37	; 0x25
  32aea6:	2200		mov	r2, #0
  32aea8:	43d2		mvn	r2, r2
  32aeaa:	2305		mov	r3, #5
  32aeac:	f0af fec2	bl	0x3dac34
  32aeb0:	9803		ldr	r0, [sp, #12]	; 0xc
  32aeb2:	2800		cmp	r0, #0
  32aeb4:	d101		bne	0x32aeba
  32aeb6:	2001		mov	r0, #1
  32aeb8:	9003		str	r0, [sp, #12]	; 0xc
  32aeba:	2044		mov	r0, #68	; 0x44
  32aebc:	4669		mov	r1, sp
  32aebe:	7a09		ldrb	r1, [r1, #8]
  32aec0:	4348		mul	r0, r1
  32aec2:	21ff		mov	r1, #255	; 0xff
  32aec4:	3111		add	r1, #17	; 0x11
  32aec6:	466a		mov	r2, sp
  32aec8:	7c52		ldrb	r2, [r2, #17]	; 0x11
  32aeca:	4351		mul	r1, r2
  32aecc:	1840		add	r0, r0, r1
  32aece:	496d		ldr	r1, =0x1701dbc	; via 0x32b084
  32aed0:	1808		add	r0, r1, r0
  32aed2:	2104		mov	r1, #4
  32aed4:	f0ce fba2	bl	0x3f961c	; $TMSE_Control_Timer
  32aed8:	2244		mov	r2, #68	; 0x44
  32aeda:	4668		mov	r0, sp
  32aedc:	7a00		ldrb	r0, [r0, #8]
  32aede:	4342		mul	r2, r0
  32aee0:	20ff		mov	r0, #255	; 0xff
  32aee2:	3011		add	r0, #17	; 0x11
  32aee4:	4669		mov	r1, sp
  32aee6:	7c49		ldrb	r1, [r1, #17]	; 0x11
  32aee8:	4348		mul	r0, r1
  32aeea:	1810		add	r0, r2, r0
  32aeec:	4965		ldr	r1, =0x1701dbc	; via 0x32b084
  32aeee:	1808		add	r0, r1, r0
  32aef0:	4669		mov	r1, sp
  32aef2:	7c09		ldrb	r1, [r1, #16]	; 0x10
  32aef4:	2900		cmp	r1, #0
  32aef6:	d001		beq	0x32aefc
  32aef8:	9b03		ldr	r3, [sp, #12]	; 0xc
  32aefa:	e000		b	0x32aefe
  32aefc:	2300		mov	r3, #0
  32aefe:	4669		mov	r1, sp
  32af00:	2205		mov	r2, #5
  32af02:	700a		strb	r2, [r1, #0]
  32af04:	4960		ldr	r1, =0x32aad1	; via 0x32b088
  32af06:	9a03		ldr	r2, [sp, #12]	; 0xc
  32af08:	f0ce fb70	bl	0x3f95ec	; $TMSE_Reset_Timer
  32af0c:	b005		add	sp, #20	; 0x14
  32af0e:	bd00		pop	{pc}

$rvf_stop_timer:
  32af64:	b500		push	{lr}
  32af66:	b081		sub	sp, #4
  32af68:	4669		mov	r1, sp
  32af6a:	7008		strb	r0, [r1, #0]
  32af6c:	f786 fcd9	bl	0x2b1922	; $rvf_get_taskid
  32af70:	4669		mov	r1, sp
  32af72:	7048		strb	r0, [r1, #1]
  32af74:	2144		mov	r1, #68	; 0x44
  32af76:	4668		mov	r0, sp
  32af78:	7800		ldrb	r0, [r0, #0]
  32af7a:	4341		mul	r1, r0
  32af7c:	20ff		mov	r0, #255	; 0xff
  32af7e:	3011		add	r0, #17	; 0x11
  32af80:	466a		mov	r2, sp
  32af82:	7852		ldrb	r2, [r2, #1]
  32af84:	4350		mul	r0, r2
  32af86:	1808		add	r0, r1, r0
  32af88:	493e		ldr	r1, =0x1701dbc	; via 0x32b084
  32af8a:	1808		add	r0, r1, r0
  32af8c:	2104		mov	r1, #4
  32af8e:	f0ce fb45	bl	0x3f961c	; $TMSE_Control_Timer
  32af92:	b001		add	sp, #4
  32af94:	bd00		pop	{pc}

; pwr_cust module seems to start here

; The following function takes a raw ADC VBAT measurement
; as input (R0) and returns the mV value per the calibration.
$pwr_adc_to_mvolt:
  32dae8:	498b		ldr	r1, =0x801734	; via 0x32dd18
  32daea:	880a		ldrh	r2, [r1, #0]
  32daec:	4342		mul	r2, r0
  32daee:	0a90		lsr	r0, r2, #10
  32daf0:	8a49		ldrh	r1, [r1, #18]	; 0x12
  32daf2:	1808		add	r0, r1, r0
  32daf4:	0400		lsl	r0, r0, #16
  32daf6:	0c00		lsr	r0, r0, #16
  32daf8:	4770		bx	lr

$pwr_adc_to_mA:
; diff from MV100 version: this version subtracts i2v_madc_offset first
  32dafa:	b500		push	{lr}
  32dafc:	49c2		ldr	r1, =0x1774e70	; via 0x32de08
  32dafe:	6809		ldr	r1, [r1, #0]
  32db00:	8909		ldrh	r1, [r1, #8]
  32db02:	4288		cmp	r0, r1
  32db04:	dc01		bgt	0x32db0a
  32db06:	2000		mov	r0, #0
  32db08:	bd00		pop	{pc}
  32db0a:	1a40		sub	r0, r0, r1
  32db0c:	4983		ldr	r1, =0x357	; via 0x32dd1c
  32db0e:	4348		mul	r0, r1
  32db10:	217d		mov	r1, #125	; 0x7d
  32db12:	00c9		lsl	r1, r1, #3
  32db14:	f0c9 fb8a	bl	0x3f722c	; I$DIV
  32db18:	0408		lsl	r0, r1, #16
  32db1a:	0c00		lsr	r0, r0, #16
  32db1c:	bd00		pop	{pc}

$pwr_bat_temp_within_limits:
; the limits are the same as in MV100 version: 0 to 50 deg C
; 1st diff: if the byte var at offset 0x48 is set to 1, then
; out-of-range T is ignored with a warning trace
; 2nd diff: if T is out of range and no ignore-with-warning flag is set,
; the return code is FALSE like in TI's original, but an additional code
; indicating whether T is too high or too low is written into 16-bit var
; at 0x1774b78
  32db1e:	b510		push	{r4, lr}
  32db20:	b082		sub	sp, #8
  32db22:	1c04		add	r4, r0, #0
  32db24:	48b9		ldr	r0, =0xa0020	; via 0x32de0c
  32db26:	9000		str	r0, [sp, #0]
  32db28:	a0c8		add	r0, pc, #800	; 0x320
  32db2a:	2126		mov	r1, #38	; 0x26
  32db2c:	1c22		add	r2, r4, #0
  32db2e:	2305		mov	r3, #5
  32db30:	f0ad f880	bl	0x3dac34
  32db34:	2c32		cmp	r4, #50	; 0x32
  32db36:	da0c		bge	0x32db52
  32db38:	2c00		cmp	r4, #0
  32db3a:	dd0a		ble	0x32db52
  32db3c:	48b3		ldr	r0, =0xa0020	; via 0x32de0c
  32db3e:	9000		str	r0, [sp, #0]
  32db40:	a0cc		add	r0, pc, #816	; 0x330
  32db42:	2121		mov	r1, #33	; 0x21
  32db44:	2200		mov	r2, #0
  32db46:	43d2		mvn	r2, r2
  32db48:	2305		mov	r3, #5
  32db4a:	f0ad f873	bl	0x3dac34
  32db4e:	2001		mov	r0, #1
  32db50:	e01c		b	0x32db8c
  32db52:	2148		mov	r1, #72	; 0x48
  32db54:	48ac		ldr	r0, =0x1774e70	; via 0x32de08
  32db56:	6800		ldr	r0, [r0, #0]
  32db58:	5c08		ldrb	r0, [r1, r0]
  32db5a:	2801		cmp	r0, #1
  32db5c:	d104		bne	0x32db68
  32db5e:	48ab		ldr	r0, =0xa0020	; via 0x32de0c
  32db60:	9000		str	r0, [sp, #0]
  32db62:	a0cd		add	r0, pc, #820	; 0x334
  32db64:	2117		mov	r1, #23	; 0x17
  32db66:	e7ed		b	0x32db44
  32db68:	2c32		cmp	r4, #50	; 0x32
  32db6a:	db01		blt	0x32db70
  32db6c:	2003		mov	r0, #3
  32db6e:	e000		b	0x32db72
  32db70:	2004		mov	r0, #4
  32db72:	43c0		mvn	r0, r0
  32db74:	49b4		ldr	r1, =0x1774b78	; via 0x32de48
  32db76:	8008		strh	r0, [r1, #0]
  32db78:	48a4		ldr	r0, =0xa0020	; via 0x32de0c
  32db7a:	9000		str	r0, [sp, #0]
  32db7c:	a0cc		add	r0, pc, #816	; 0x330
  32db7e:	2122		mov	r1, #34	; 0x22
  32db80:	2200		mov	r2, #0
  32db82:	43d2		mvn	r2, r2
  32db84:	2304		mov	r3, #4
  32db86:	f0ad f855	bl	0x3dac34
  32db8a:	2000		mov	r0, #0
  32db8c:	b002		add	sp, #8
  32db8e:	bd10		pop	{r4, pc}

$pwr_madc_to_Celsius_conv:
; MV100 version uses 10 uA and 50 uA test currents,
; this version uses 30 uA and 80 uA instead
; not analysed further
  32db90:	b5f0		push	{r4, r5, r6, r7, lr}
  32db92:	b082		sub	sp, #8
  32db94:	2351		mov	r3, #81	; 0x51
  32db96:	1ac0		sub	r0, r0, r3
  32db98:	2800		cmp	r0, #0
  32db9a:	d008		beq	0x32dbae
  32db9c:	3828		sub	r0, #40	; 0x28
  32db9e:	2800		cmp	r0, #0
  32dba0:	d001		beq	0x32dba6
  32dba2:	2000		mov	r0, #0
  32dba4:	e04a		b	0x32dc3c
  32dba6:	4ed2		ldr	r6, =0x52e308	; via 0x32def0
  32dba8:	4dd2		ldr	r5, =0x52e2e4	; via 0x32def4
  32dbaa:	200a		mov	r0, #10	; 0xa
  32dbac:	e002		b	0x32dbb4
  32dbae:	4ed2		ldr	r6, =0x52e2f8	; via 0x32def8
  32dbb0:	4dd2		ldr	r5, =0x52e2d4	; via 0x32defc
  32dbb2:	2008		mov	r0, #8
  32dbb4:	8833		ldrh	r3, [r6, #0]
  32dbb6:	4299		cmp	r1, r3
  32dbb8:	dc05		bgt	0x32dbc6
  32dbba:	0043		lsl	r3, r0, #1
  32dbbc:	18f3		add	r3, r6, r3
  32dbbe:	3b02		sub	r3, #2
  32dbc0:	881b		ldrh	r3, [r3, #0]
  32dbc2:	4299		cmp	r1, r3
  32dbc4:	da08		bge	0x32dbd8
  32dbc6:	1c0a		add	r2, r1, #0
  32dbc8:	4890		ldr	r0, =0xa0020	; via 0x32de0c
  32dbca:	9000		str	r0, [sp, #0]
  32dbcc:	a0c1		add	r0, pc, #772	; 0x304
  32dbce:	211a		mov	r1, #26	; 0x1a
  32dbd0:	2305		mov	r3, #5
  32dbd2:	f0ad f82f	bl	0x3dac34
  32dbd6:	e7e4		b	0x32dba2
  32dbd8:	2800		cmp	r0, #0
  32dbda:	d00d		beq	0x32dbf8
  32dbdc:	2300		mov	r3, #0
  32dbde:	005c		lsl	r4, r3, #1
  32dbe0:	19a7		add	r7, r4, r6
  32dbe2:	1ebf		sub	r7, r7, #2
  32dbe4:	46bc		mov	r12, r7
  32dbe6:	5b37		ldrh	r7, [r6, r4]
  32dbe8:	42b9		cmp	r1, r7
  32dbea:	da0a		bge	0x32dc02
  32dbec:	1c5b		add	r3, r3, #1
  32dbee:	061b		lsl	r3, r3, #24
  32dbf0:	0e1b		lsr	r3, r3, #24
  32dbf2:	3801		sub	r0, #1
  32dbf4:	2800		cmp	r0, #0
  32dbf6:	d1f2		bne	0x32dbde
  32dbf8:	49c1		ldr	r1, =0x1774b80	; via 0x32df00
  32dbfa:	2001		mov	r0, #1
  32dbfc:	0280		lsl	r0, r0, #10
  32dbfe:	8008		strh	r0, [r1, #0]
  32dc00:	e7cf		b	0x32dba2
  32dc02:	2b00		cmp	r3, #0
  32dc04:	d014		beq	0x32dc30
  32dc06:	886b		ldrh	r3, [r5, #2]
  32dc08:	8828		ldrh	r0, [r5, #0]
  32dc0a:	1a18		sub	r0, r3, r0
  32dc0c:	0400		lsl	r0, r0, #16
  32dc0e:	0c00		lsr	r0, r0, #16
  32dc10:	1bc9		sub	r1, r1, r7
  32dc12:	0409		lsl	r1, r1, #16
  32dc14:	0c09		lsr	r1, r1, #16
  32dc16:	4348		mul	r0, r1
  32dc18:	4661		mov	r1, r12
  32dc1a:	8809		ldrh	r1, [r1, #0]
  32dc1c:	1bc9		sub	r1, r1, r7
  32dc1e:	0409		lsl	r1, r1, #16
  32dc20:	0c09		lsr	r1, r1, #16
  32dc22:	f0c9 fb03	bl	0x3f722c
  32dc26:	5b60		ldrh	r0, [r4, r5]
  32dc28:	1a40		sub	r0, r0, r1
  32dc2a:	0400		lsl	r0, r0, #16
  32dc2c:	1400		asr	r0, r0, #16
  32dc2e:	e001		b	0x32dc34
  32dc30:	2000		mov	r0, #0
  32dc32:	5e28		ldrsh	r0, [r5, r0]
  32dc34:	49b2		ldr	r1, =0x1774b80	; via 0x32df00
  32dc36:	8010		strh	r0, [r2, #0]
  32dc38:	8008		strh	r0, [r1, #0]
  32dc3a:	2001		mov	r0, #1
  32dc3c:	b002		add	sp, #8
  32dc3e:	bdf0		pop	{r4, r5, r6, r7, pc}

$pwr_get_battery_temperature:
  32dc40:	b500		push	{lr}
; setting BCICTL1 to THEN_80uA
  32dc42:	2001		mov	r0, #1
  32dc44:	2138		mov	r1, #56	; 0x38
  32dc46:	2279		mov	r2, #121	; 0x79
  32dc48:	f01b fae0	bl	0x34920c	; $ABB_Write_Register_on_page
; setting pwr_env_ctrl_blk->timer0_state, same code as in MV100 version
  32dc4c:	486e		ldr	r0, =0x1774e70	; via 0x32de08
  32dc4e:	6800		ldr	r0, [r0, #0]
  32dc50:	2103		mov	r1, #3
  32dc52:	6301		str	r1, [r0, #48]	; 0x30
; setting TIMER0 to 65 ticks (300 ms)
  32dc54:	2000		mov	r0, #0
  32dc56:	2141		mov	r1, #65	; 0x41
  32dc58:	2200		mov	r2, #0
  32dc5a:	f7fd f90d	bl	0x32ae78	; $rvf_start_timer
  32dc5e:	bd00		pop	{pc}

$pwr_bat_50uA_temp_test_timer_process:
  32dc60:	b510		push	{r4, lr}
  32dc62:	b082		sub	sp, #8
; test if we are in CHARGE_STOPPED state
  32dc64:	4868		ldr	r0, =0x1774e70	; via 0x32de08
  32dc66:	6800		ldr	r0, [r0, #0]
  32dc68:	6840		ldr	r0, [r0, #4]
  32dc6a:	2800		cmp	r0, #0
  32dc6c:	d105		bne	0x32dc7a
; CHARGE_STOPPED state: write 1 (just MESBAT) into BCICTL1
  32dc6e:	2001		mov	r0, #1
  32dc70:	2138		mov	r1, #56	; 0x38
  32dc72:	2201		mov	r2, #1
  32dc74:	f01b faca	bl	0x34920c
  32dc78:	e04b		b	0x32dd12	; return
; not in CHARGE_STOPPED state
  32dc7a:	f000 fb0b	bl	0x32e294
  32dc7e:	2800		cmp	r0, #0
  32dc80:	d147		bne	0x32dd12	; return
; mystery function above must return 0 for normal path to continue
; "TIMER0: Battery coarse temp test" trace emitted here
  32dc82:	4862		ldr	r0, =0xa0020	; via 0x32de0c
  32dc84:	9000		str	r0, [sp, #0]
  32dc86:	a0d1		add	r0, pc, #836	; 0x344
  32dc88:	2120		mov	r1, #32	; 0x20
  32dc8a:	2200		mov	r2, #0
  32dc8c:	43d2		mvn	r2, r2
  32dc8e:	2302		mov	r3, #2
  32dc90:	f0ac ffd0	bl	0x3dac34
; pwr_env_ctrl_blk->bat_celsius_temp = (INT16)(0xFFFF);
  32dc94:	4c5c		ldr	r4, =0x1774e70	; via 0x32de08
  32dc96:	6821		ldr	r1, [r4, #0]
  32dc98:	2000		mov	r0, #0
  32dc9a:	43c0		mvn	r0, r0
  32dc9c:	8708		strh	r0, [r1, #56]	; 0x38
; write 0 into ADIN2REG
  32dc9e:	2001		mov	r0, #1
  32dca0:	2128		mov	r1, #40	; 0x28
  32dca2:	2200		mov	r2, #0
  32dca4:	f01b fab2	bl	0x34920c	; $ABB_Write_Register_on_page
; delay 2 ticks
  32dca8:	2002		mov	r0, #2
  32dcaa:	f783 fdf8	bl	0x2b189e	; rvf_delay()
; now read ADIN2REG
  32dcae:	2001		mov	r0, #1
  32dcb0:	2128		mov	r1, #40	; 0x28
  32dcb2:	f01b fad2	bl	0x34925a	; $ABB_Read_Register_on_page
  32dcb6:	1c01		add	r1, r0, #0
  32dcb8:	6822		ldr	r2, [r4, #0]
  32dcba:	3238		add	r2, #56	; 0x38
  32dcbc:	2079		mov	r0, #121	; 0x79
  32dcbe:	f7ff ff67	bl	0x32db90	; $pwr_madc_to_Celsius_conv
  32dcc2:	2800		cmp	r0, #0
  32dcc4:	d10d		bne	0x32dce2
; outside of the "coarse" range
; set pwr_env_ctrl_blk->timer0_state to the "fine" code, same as in MV100
  32dcc6:	6821		ldr	r1, [r4, #0]
  32dcc8:	2004		mov	r0, #4
  32dcca:	6308		str	r0, [r1, #48]	; 0x30
; set 30 uA current
  32dccc:	2001		mov	r0, #1
  32dcce:	2138		mov	r1, #56	; 0x38
  32dcd0:	2251		mov	r2, #81	; 0x51
  32dcd2:	f01b fa9b	bl	0x34920c
; same 65 ticks (300 ms) as before
  32dcd6:	2000		mov	r0, #0
  32dcd8:	2141		mov	r1, #65	; 0x41
  32dcda:	2200		mov	r2, #0
  32dcdc:	f7fd f8cc	bl	0x32ae78
  32dce0:	e017		b	0x32dd12	; return
; T inside the "coarse" range
; write 1 (just MESBAT) into BCICTL1
  32dce2:	2001		mov	r0, #1
  32dce4:	2138		mov	r1, #56	; 0x38
  32dce6:	2201		mov	r2, #1
  32dce8:	f01b fa90	bl	0x34920c
; dispatch by state
  32dcec:	6820		ldr	r0, [r4, #0]
  32dcee:	6840		ldr	r0, [r0, #4]
  32dcf0:	2802		cmp	r0, #2
  32dcf2:	d00c		beq	0x32dd0e
  32dcf4:	2803		cmp	r0, #3
  32dcf6:	d007		beq	0x32dd08
  32dcf8:	2801		cmp	r0, #1
  32dcfa:	d002		beq	0x32dd02
  32dcfc:	f083 fce0	bl	0x3b16c0	; $pwr_get_bat_info
  32dd00:	e007		b	0x32dd12
  32dd02:	f7b4 fb2b	bl	0x2e235c	; $pwr_calibration_process
  32dd06:	e004		b	0x32dd12
  32dd08:	f7b4 ff04	bl	0x2e2b14	; $pwr_CV_charge_process
  32dd0c:	e001		b	0x32dd12
  32dd0e:	f7b4 fd93	bl	0x2e2838	; $pwr_CI_charge_process
  32dd12:	b002		add	sp, #8
  32dd14:	bd10		pop	{r4, pc}
  32dd16:	46c0		nop			(mov r8, r8)

$pwr_bat_10uA_temp_test_timer_process:
  32dd20:	b510		push	{r4, lr}
  32dd22:	b082		sub	sp, #8
  32dd24:	4838		ldr	r0, =0x1774e70	; via 0x32de08
  32dd26:	6800		ldr	r0, [r0, #0]
  32dd28:	6840		ldr	r0, [r0, #4]
  32dd2a:	2800		cmp	r0, #0
  32dd2c:	d101		bne	0x32dd32
  32dd2e:	2138		mov	r1, #56	; 0x38
  32dd30:	e048		b	0x32ddc4
  32dd32:	f000 faaf	bl	0x32e294
  32dd36:	2800		cmp	r0, #0
  32dd38:	d164		bne	0x32de04
  32dd3a:	4834		ldr	r0, =0xa0020	; via 0x32de0c
  32dd3c:	9000		str	r0, [sp, #0]
  32dd3e:	a0f2		add	r0, pc, #968	; 0x3c8
  32dd40:	211e		mov	r1, #30	; 0x1e
  32dd42:	2200		mov	r2, #0
  32dd44:	43d2		mvn	r2, r2
  32dd46:	2302		mov	r3, #2
  32dd48:	f0ac ff74	bl	0x3dac34
  32dd4c:	4c2e		ldr	r4, =0x1774e70	; via 0x32de08
  32dd4e:	6821		ldr	r1, [r4, #0]
  32dd50:	2000		mov	r0, #0
  32dd52:	43c0		mvn	r0, r0
  32dd54:	8708		strh	r0, [r1, #56]	; 0x38
  32dd56:	2001		mov	r0, #1
  32dd58:	2128		mov	r1, #40	; 0x28
  32dd5a:	2200		mov	r2, #0
  32dd5c:	f01b fa56	bl	0x34920c
  32dd60:	2002		mov	r0, #2
  32dd62:	f783 fd9c	bl	0x2b189e
  32dd66:	2001		mov	r0, #1
  32dd68:	2128		mov	r1, #40	; 0x28
  32dd6a:	f01b fa76	bl	0x34925a
  32dd6e:	1c01		add	r1, r0, #0
  32dd70:	6822		ldr	r2, [r4, #0]
  32dd72:	3238		add	r2, #56	; 0x38
  32dd74:	2051		mov	r0, #81	; 0x51
  32dd76:	f7ff ff0b	bl	0x32db90
  32dd7a:	2800		cmp	r0, #0
  32dd7c:	d12a		bne	0x32ddd4
  32dd7e:	2148		mov	r1, #72	; 0x48
  32dd80:	6820		ldr	r0, [r4, #0]
  32dd82:	5c08		ldrb	r0, [r1, r0]
  32dd84:	2800		cmp	r0, #0
  32dd86:	d125		bne	0x32ddd4
  32dd88:	4820		ldr	r0, =0xa0020	; via 0x32de0c
  32dd8a:	9000		str	r0, [sp, #0]
  32dd8c:	a0e6		add	r0, pc, #920	; 0x398
  32dd8e:	2129		mov	r1, #41	; 0x29
  32dd90:	2200		mov	r2, #0
  32dd92:	43d2		mvn	r2, r2
  32dd94:	2302		mov	r3, #2
  32dd96:	f0ac ff4d	bl	0x3dac34
  32dd9a:	2001		mov	r0, #1
  32dd9c:	2138		mov	r1, #56	; 0x38
  32dd9e:	2201		mov	r2, #1
  32dda0:	f01b fa34	bl	0x34920c
  32dda4:	f7b4 faa3	bl	0x2e22ee
  32dda8:	4927		ldr	r1, =0x1774b78	; via 0x32de48
  32ddaa:	2006		mov	r0, #6
  32ddac:	43c0		mvn	r0, r0
  32ddae:	8008		strh	r0, [r1, #0]
  32ddb0:	2000		mov	r0, #0
  32ddb2:	f067 f886	bl	0x394ec2
  32ddb6:	2132		mov	r1, #50	; 0x32
  32ddb8:	48d2		ldr	r0, =0x1774e38	; via 0x32e104
  32ddba:	6800		ldr	r0, [r0, #0]
  32ddbc:	5c08		ldrb	r0, [r1, r0]
  32ddbe:	2800		cmp	r0, #0
  32ddc0:	d105		bne	0x32ddce
  32ddc2:	213c		mov	r1, #60	; 0x3c
  32ddc4:	2001		mov	r0, #1
  32ddc6:	2201		mov	r2, #1
  32ddc8:	f01b fa20	bl	0x34920c
  32ddcc:	e01a		b	0x32de04
  32ddce:	f085 fef0	bl	0x3b3bb2
  32ddd2:	e017		b	0x32de04
  32ddd4:	2001		mov	r0, #1
  32ddd6:	2138		mov	r1, #56	; 0x38
  32ddd8:	2201		mov	r2, #1
  32ddda:	f01b fa17	bl	0x34920c
  32ddde:	6820		ldr	r0, [r4, #0]
  32dde0:	6840		ldr	r0, [r0, #4]
  32dde2:	2802		cmp	r0, #2
  32dde4:	d00c		beq	0x32de00
  32dde6:	2803		cmp	r0, #3
  32dde8:	d007		beq	0x32ddfa
  32ddea:	2801		cmp	r0, #1
  32ddec:	d002		beq	0x32ddf4
  32ddee:	f083 fc67	bl	0x3b16c0
  32ddf2:	e007		b	0x32de04
  32ddf4:	f7b4 fab2	bl	0x2e235c
  32ddf8:	e004		b	0x32de04
  32ddfa:	f7b4 fe8b	bl	0x2e2b14
  32ddfe:	e001		b	0x32de04
  32de00:	f7b4 fd1a	bl	0x2e2838
  32de04:	b002		add	sp, #8
  32de06:	bd10		pop	{r4, pc}

$pwr_get_battery_type:
  32de10:	b570		push	{r4, r5, r6, lr}
  32de12:	48f0		ldr	r0, =0x1774e70	; via 0x32e1d4
  32de14:	6801		ldr	r1, [r0, #0]
; half-word at offset 0x40 = 0
  32de16:	2340		mov	r3, #64	; 0x40
  32de18:	2200		mov	r2, #0
  32de1a:	525a		strh	r2, [r3, r1]
; word at offset 0x44 = 0
  32de1c:	2400		mov	r4, #0
  32de1e:	644c		str	r4, [r1, #68]	; 0x44
  32de20:	4d09		ldr	r5, =0x1774b78	; via 0x32de48
  32de22:	6806		ldr	r6, [r0, #0]
  32de24:	88a8		ldrh	r0, [r5, #4]
  32de26:	f000 f8e2	bl	0x32dfee
; initial % written into 16-bit var at offset 0x3e
  32de2a:	87f0		strh	r0, [r6, #62]	; 0x3e
; pwr_env_ctrl_blk->timer0_state = BATTERY_TYPE_TEST;
  32de2c:	6334		str	r4, [r6, #48]	; 0x30
; THEN_50uA written into BCICTL1
  32de2e:	2001		mov	r0, #1
  32de30:	2138		mov	r1, #56	; 0x38
  32de32:	2261		mov	r2, #97	; 0x61
  32de34:	f01b f9ea	bl	0x34920c	; $ABB_Write_Register_on_page
; TIMER0 set to 300 ms
  32de38:	2000		mov	r0, #0
  32de3a:	2141		mov	r1, #65	; 0x41
  32de3c:	2200		mov	r2, #0
  32de3e:	f7fd f81b	bl	0x32ae78	; $rvf_start_timer
; 0 into error code var
  32de42:	2000		mov	r0, #0
  32de44:	8028		strh	r0, [r5, #0]
  32de46:	bd70		pop	{r4, r5, r6, pc}

$pwr_type_test_timer_process:
  32df04:	b510		push	{r4, lr}
  32df06:	b082		sub	sp, #8
  32df08:	48e1		ldr	r0, =0xa0020	; via 0x32e290
  32df0a:	9000		str	r0, [sp, #0]
  32df0c:	a0d6		add	r0, pc, #856	; 0x358
  32df0e:	2119		mov	r1, #25	; 0x19
  32df10:	2200		mov	r2, #0
  32df12:	43d2		mvn	r2, r2
  32df14:	2302		mov	r3, #2
  32df16:	f0ac fe8d	bl	0x3dac34
; write 0 into ADIN2REG
  32df1a:	2001		mov	r0, #1
  32df1c:	2128		mov	r1, #40	; 0x28
  32df1e:	2200		mov	r2, #0
  32df20:	f01b f974	bl	0x34920c	; $ABB_Write_Register_on_page
; delay 2 ticks
  32df24:	2002		mov	r0, #2
  32df26:	f783 fcba	bl	0x2b189e	; rvf_delay()
; now read ADIN2REG
  32df2a:	2001		mov	r0, #1
  32df2c:	2128		mov	r1, #40	; 0x28
  32df2e:	f01b f994	bl	0x34925a	; $ABB_Read_Register_on_page
  32df32:	1c04		add	r4, r0, #0
; "bat type" trace
  32df34:	48d6		ldr	r0, =0xa0020	; via 0x32e290
  32df36:	9000		str	r0, [sp, #0]
  32df38:	a0d2		add	r0, pc, #840	; 0x348
  32df3a:	2108		mov	r1, #8
  32df3c:	1c22		add	r2, r4, #0
  32df3e:	2302		mov	r3, #2
  32df40:	f0ac fe78	bl	0x3dac34
; BCICTL1 write turns off current source
  32df44:	2001		mov	r0, #1
  32df46:	2138		mov	r1, #56	; 0x38
  32df48:	2201		mov	r2, #1
  32df4a:	f01b f95f	bl	0x34920c
  32df4e:	2c81		cmp	r4, #129	; 0x81
  32df50:	db03		blt	0x32df5a
  32df52:	202d		mov	r0, #45	; 0x2d
  32df54:	0100		lsl	r0, r0, #4
  32df56:	4284		cmp	r4, r0
  32df58:	dd26		ble	0x32dfa8
; bad result
  32df5a:	489e		ldr	r0, =0x1774e70	; via 0x32e1d4
  32df5c:	6800		ldr	r0, [r0, #0]
  32df5e:	2148		mov	r1, #72	; 0x48
  32df60:	5c09		ldrb	r1, [r1, r0]
  32df62:	2901		cmp	r1, #1
  32df64:	d020		beq	0x32dfa8
  32df66:	2101		mov	r1, #1
  32df68:	6341		str	r1, [r0, #52]	; 0x34
  32df6a:	48c9		ldr	r0, =0xa0020	; via 0x32e290
  32df6c:	9000		str	r0, [sp, #0]
  32df6e:	a0eb		add	r0, pc, #940	; 0x3ac
  32df70:	2110		mov	r1, #16	; 0x10
  32df72:	2200		mov	r2, #0
  32df74:	43d2		mvn	r2, r2
  32df76:	2302		mov	r3, #2
  32df78:	f0ac fe5c	bl	0x3dac34
  32df7c:	48e6		ldr	r0, =0x1774b78	; via 0x32e318
  32df7e:	2100		mov	r1, #0
  32df80:	43c9		mvn	r1, r1
  32df82:	8001		strh	r1, [r0, #0]
  32df84:	2003		mov	r0, #3
  32df86:	f066 ff9c	bl	0x394ec2
  32df8a:	2032		mov	r0, #50	; 0x32
  32df8c:	495d		ldr	r1, =0x1774e38	; via 0x32e104
  32df8e:	6809		ldr	r1, [r1, #0]
  32df90:	5c40		ldrb	r0, [r0, r1]
  32df92:	2800		cmp	r0, #0
  32df94:	d105		bne	0x32dfa2
  32df96:	2001		mov	r0, #1
  32df98:	213c		mov	r1, #60	; 0x3c
  32df9a:	2201		mov	r2, #1
  32df9c:	f01b f936	bl	0x34920c
  32dfa0:	e011		b	0x32dfc6
  32dfa2:	f085 fe06	bl	0x3b3bb2
  32dfa6:	e00e		b	0x32dfc6
; good result
  32dfa8:	488a		ldr	r0, =0x1774e70	; via 0x32e1d4
  32dfaa:	6801		ldr	r1, [r0, #0]
  32dfac:	2000		mov	r0, #0
  32dfae:	6348		str	r0, [r1, #52]	; 0x34
  32dfb0:	48b7		ldr	r0, =0xa0020	; via 0x32e290
  32dfb2:	9000		str	r0, [sp, #0]
  32dfb4:	a0de		add	r0, pc, #888	; 0x378
  32dfb6:	2106		mov	r1, #6
  32dfb8:	2200		mov	r2, #0
  32dfba:	43d2		mvn	r2, r2
  32dfbc:	2302		mov	r3, #2
  32dfbe:	f0ac fe39	bl	0x3dac34
  32dfc2:	f7b4 f9ed	bl	0x2e23a0	; $pwr_battery_qualification
  32dfc6:	b002		add	sp, #8
  32dfc8:	bd10		pop	{r4, pc}
  32dfca:	46c0		nop			(mov r8, r8)

; The following function computes the battery remaining % number
; from the battery mV passed in R0.  It first increases the mV value
; by a factor that depends on the system current draw (it appears
; that they are after the "true" battery voltage before the internal
; resistance), and then does the table look-up for the % number.
  32dfee:	b510		push	{r4, lr}
  32dff0:	b082		sub	sp, #8
  32dff2:	1c04		add	r4, r0, #0
  32dff4:	f000 f9a4	bl	0x32e340
  32dff8:	4669		mov	r1, sp
  32dffa:	8048		strh	r0, [r1, #2]
  32dffc:	48ce		ldr	r0, =0x17729d0	; via 0x32e338
  32dffe:	884a		ldrh	r2, [r1, #2]
  32e000:	8801		ldrh	r1, [r0, #0]
  32e002:	428a		cmp	r2, r1
  32e004:	db1b		blt	0x32e03e
  32e006:	2101		mov	r1, #1
  32e008:	e002		b	0x32e010
  32e00a:	4669		mov	r1, sp
  32e00c:	8809		ldrh	r1, [r1, #0]
  32e00e:	3101		add	r1, #1
  32e010:	466a		mov	r2, sp
  32e012:	8011		strh	r1, [r2, #0]
  32e014:	4669		mov	r1, sp
  32e016:	8809		ldrh	r1, [r1, #0]
  32e018:	2903		cmp	r1, #3
  32e01a:	da07		bge	0x32e02c
  32e01c:	4669		mov	r1, sp
  32e01e:	8809		ldrh	r1, [r1, #0]
  32e020:	0089		lsl	r1, r1, #2
  32e022:	5a41		ldrh	r1, [r0, r1]
  32e024:	466a		mov	r2, sp
  32e026:	8852		ldrh	r2, [r2, #2]
  32e028:	428a		cmp	r2, r1
  32e02a:	daee		bge	0x32e00a
  32e02c:	4669		mov	r1, sp
  32e02e:	8809		ldrh	r1, [r1, #0]
  32e030:	0089		lsl	r1, r1, #2
  32e032:	1840		add	r0, r0, r1
  32e034:	3802		sub	r0, #2
  32e036:	8801		ldrh	r1, [r0, #0]
  32e038:	4668		mov	r0, sp
  32e03a:	8081		strh	r1, [r0, #4]
  32e03c:	e002		b	0x32e044
  32e03e:	4669		mov	r1, sp
  32e040:	2000		mov	r0, #0
  32e042:	8088		strh	r0, [r1, #4]
  32e044:	4668		mov	r0, sp
  32e046:	8880		ldrh	r0, [r0, #4]
  32e048:	1900		add	r0, r0, r4
  32e04a:	0400		lsl	r0, r0, #16
  32e04c:	0c04		lsr	r4, r0, #16
  32e04e:	4abb		ldr	r2, =0x177297c	; via 0x32e33c
  32e050:	8810		ldrh	r0, [r2, #0]
  32e052:	4284		cmp	r4, r0
  32e054:	db01		blt	0x32e05a
  32e056:	7890		ldrb	r0, [r2, #2]
  32e058:	e022		b	0x32e0a0
  32e05a:	2001		mov	r0, #1
  32e05c:	e002		b	0x32e064
  32e05e:	4668		mov	r0, sp
  32e060:	8800		ldrh	r0, [r0, #0]
  32e062:	3001		add	r0, #1
  32e064:	4669		mov	r1, sp
  32e066:	8008		strh	r0, [r1, #0]
  32e068:	4668		mov	r0, sp
  32e06a:	8800		ldrh	r0, [r0, #0]
  32e06c:	2815		cmp	r0, #21	; 0x15
  32e06e:	db0c		blt	0x32e08a
  32e070:	4668		mov	r0, sp
  32e072:	8800		ldrh	r0, [r0, #0]
  32e074:	2815		cmp	r0, #21	; 0x15
  32e076:	d106		bne	0x32e086
  32e078:	4668		mov	r0, sp
  32e07a:	8800		ldrh	r0, [r0, #0]
  32e07c:	0080		lsl	r0, r0, #2
  32e07e:	1810		add	r0, r2, r0
  32e080:	3802		sub	r0, #2
  32e082:	7800		ldrb	r0, [r0, #0]
  32e084:	e00c		b	0x32e0a0
  32e086:	2000		mov	r0, #0
  32e088:	e00a		b	0x32e0a0
  32e08a:	4668		mov	r0, sp
  32e08c:	8800		ldrh	r0, [r0, #0]
  32e08e:	0080		lsl	r0, r0, #2
  32e090:	5a10		ldrh	r0, [r2, r0]
  32e092:	4284		cmp	r4, r0
  32e094:	dde3		ble	0x32e05e
  32e096:	4668		mov	r0, sp
  32e098:	8800		ldrh	r0, [r0, #0]
  32e09a:	0080		lsl	r0, r0, #2
  32e09c:	1810		add	r0, r2, r0
  32e09e:	7880		ldrb	r0, [r0, #2]
  32e0a0:	b002		add	sp, #8
  32e0a2:	bd10		pop	{r4, pc}

; This function seems to be in charge of enforcing some kind of time limit
; on the charging process, with non-understood handling when this limit
; is exceeded and the "Charge Process exceeds .!!" trace is emitted.
  32e294:	b510		push	{r4, lr}
  32e296:	b082		sub	sp, #8
  32e298:	4871		ldr	r0, =0x1774e70	; via 0x32e460
  32e29a:	6800		ldr	r0, [r0, #0]
  32e29c:	2148		mov	r1, #72	; 0x48
  32e29e:	5c09		ldrb	r1, [r1, r0]
  32e2a0:	2901		cmp	r1, #1
  32e2a2:	d101		bne	0x32e2a8
  32e2a4:	2400		mov	r4, #0
  32e2a6:	e034		b	0x32e312
  32e2a8:	8f81		ldrh	r1, [r0, #60]	; 0x3c
  32e2aa:	8f40		ldrh	r0, [r0, #58]	; 0x3a
  32e2ac:	4281		cmp	r1, r0
  32e2ae:	ddf9		ble	0x32e2a4
  32e2b0:	486c		ldr	r0, =0xa0020	; via 0x32e464
  32e2b2:	9000		str	r0, [sp, #0]
  32e2b4:	a05e		add	r0, pc, #376	; 0x178
  32e2b6:	211a		mov	r1, #26	; 0x1a
  32e2b8:	2200		mov	r2, #0
  32e2ba:	43d2		mvn	r2, r2
  32e2bc:	2302		mov	r3, #2
  32e2be:	f0ac fcb9	bl	0x3dac34
  32e2c2:	2001		mov	r0, #1
  32e2c4:	2138		mov	r1, #56	; 0x38
  32e2c6:	2201		mov	r2, #1
  32e2c8:	f01a ffa0	bl	0x34920c
  32e2cc:	4812		ldr	r0, =0x1774b78	; via 0x32e318
  32e2ce:	2105		mov	r1, #5
  32e2d0:	43c9		mvn	r1, r1
  32e2d2:	8001		strh	r1, [r0, #0]
  32e2d4:	8880		ldrh	r0, [r0, #4]
  32e2d6:	4961		ldr	r1, =0xf3c	; via 0x32e45c
  32e2d8:	4288		cmp	r0, r1
  32e2da:	dc07		bgt	0x32e2ec
  32e2dc:	4860		ldr	r0, =0x1774e70	; via 0x32e460
  32e2de:	6800		ldr	r0, [r0, #0]
  32e2e0:	2101		mov	r1, #1
  32e2e2:	6341		str	r1, [r0, #52]	; 0x34
  32e2e4:	2003		mov	r0, #3
  32e2e6:	f066 fdec	bl	0x394ec2
  32e2ea:	e001		b	0x32e2f0
  32e2ec:	f066 fdb0	bl	0x394e50
  32e2f0:	f7b3 fffd	bl	0x2e22ee
  32e2f4:	2401		mov	r4, #1
  32e2f6:	2132		mov	r1, #50	; 0x32
  32e2f8:	4857		ldr	r0, =0x1774e38	; via 0x32e458
  32e2fa:	6800		ldr	r0, [r0, #0]
  32e2fc:	5c08		ldrb	r0, [r1, r0]
  32e2fe:	2800		cmp	r0, #0
  32e300:	d105		bne	0x32e30e
  32e302:	2001		mov	r0, #1
  32e304:	213c		mov	r1, #60	; 0x3c
  32e306:	2201		mov	r2, #1
  32e308:	f01a ff80	bl	0x34920c
  32e30c:	e001		b	0x32e312
  32e30e:	f085 fc50	bl	0x3b3bb2
  32e312:	1c20		add	r0, r4, #0
  32e314:	b002		add	sp, #8
  32e316:	bd10		pop	{r4, pc}

; The following function seems to compute the system's current draw.
; It starts with the display backlight's current draw from 0x1775138,
; converts it from ADC units to mA per the fixed *855/1000 formula,
; and then throws in a ton of other factors which are impractical
; to follow in this totally unknown fw.
  32e340:	b510		push	{r4, lr}
  32e342:	b08c		sub	sp, #48	; 0x30
; function returns the value of 16-bit var in 0x1775138
  32e344:	f0b0 ffbd	bl	0x3df2c2
  32e348:	1c04		add	r4, r0, #0
  32e34a:	484a		ldr	r0, =0x357	; via 0x32e474
  32e34c:	4360		mul	r0, r4
  32e34e:	217d		mov	r1, #125	; 0x7d
  32e350:	00c9		lsl	r1, r1, #3
  32e352:	f0c8 ff6b	bl	0x3f722c	; I$DIV
  32e356:	0408		lsl	r0, r1, #16
  32e358:	1404		asr	r4, r0, #16
  32e35a:	f085 fea4	bl	0x3b40a6
  32e35e:	2800		cmp	r0, #0
  32e360:	d002		beq	0x32e368
  32e362:	34e6		add	r4, #230	; 0xe6
  32e364:	0420		lsl	r0, r4, #16
  32e366:	1404		asr	r4, r0, #16
  32e368:	483f		ldr	r0, =0x8036a8	; via 0x32e468
  32e36a:	6800		ldr	r0, [r0, #0]
  32e36c:	2802		cmp	r0, #2
  32e36e:	d805		bhi	0x32e37c
  32e370:	f085 fe99	bl	0x3b40a6
  32e374:	2800		cmp	r0, #0
  32e376:	d14a		bne	0x32e40e
  32e378:	3432		add	r4, #50	; 0x32
  32e37a:	e046		b	0x32e40a
  32e37c:	4668		mov	r0, sp
  32e37e:	f0c9 fe35	bl	0x3f7fec
  32e382:	4668		mov	r0, sp
  32e384:	7800		ldrb	r0, [r0, #0]
  32e386:	2800		cmp	r0, #0
  32e388:	d137		bne	0x32e3fa
  32e38a:	4668		mov	r0, sp
  32e38c:	7880		ldrb	r0, [r0, #2]
  32e38e:	1ec0		sub	r0, r0, #3
  32e390:	2800		cmp	r0, #0
  32e392:	d00b		beq	0x32e3ac
  32e394:	3801		sub	r0, #1
  32e396:	2800		cmp	r0, #0
  32e398:	d015		beq	0x32e3c6
  32e39a:	3801		sub	r0, #1
  32e39c:	2800		cmp	r0, #0
  32e39e:	d00c		beq	0x32e3ba
  32e3a0:	3801		sub	r0, #1
  32e3a2:	2800		cmp	r0, #0
  32e3a4:	d004		beq	0x32e3b0
  32e3a6:	3802		sub	r0, #2
  32e3a8:	2800		cmp	r0, #0
  32e3aa:	d10a		bne	0x32e3c2
  32e3ac:	2202		mov	r2, #2
  32e3ae:	e00b		b	0x32e3c8
  32e3b0:	4668		mov	r0, sp
  32e3b2:	8980		ldrh	r0, [r0, #12]	; 0xc
  32e3b4:	28af		cmp	r0, #175	; 0xaf
  32e3b6:	db04		blt	0x32e3c2
  32e3b8:	e005		b	0x32e3c6
  32e3ba:	4668		mov	r0, sp
  32e3bc:	8980		ldrh	r0, [r0, #12]	; 0xc
  32e3be:	287d		cmp	r0, #125	; 0x7d
  32e3c0:	da01		bge	0x32e3c6
  32e3c2:	2200		mov	r2, #0
  32e3c4:	e000		b	0x32e3c8
  32e3c6:	2201		mov	r2, #1
  32e3c8:	4668		mov	r0, sp
  32e3ca:	7d00		ldrb	r0, [r0, #20]	; 0x14
  32e3cc:	2814		cmp	r0, #20	; 0x14
  32e3ce:	db02		blt	0x32e3d6
  32e3d0:	2013		mov	r0, #19	; 0x13
  32e3d2:	4669		mov	r1, sp
  32e3d4:	7508		strb	r0, [r1, #20]	; 0x14
  32e3d6:	4669		mov	r1, sp
  32e3d8:	7c89		ldrb	r1, [r1, #18]	; 0x12
  32e3da:	2900		cmp	r1, #0
  32e3dc:	d004		beq	0x32e3e8
  32e3de:	2114		mov	r1, #20	; 0x14
  32e3e0:	4351		mul	r1, r2
  32e3e2:	1840		add	r0, r0, r1
  32e3e4:	4921		ldr	r1, =0x52e31c	; via 0x32e46c
  32e3e6:	e003		b	0x32e3f0
  32e3e8:	2114		mov	r1, #20	; 0x14
  32e3ea:	4351		mul	r1, r2
  32e3ec:	1840		add	r0, r0, r1
  32e3ee:	4920		ldr	r1, =0x52e394	; via 0x32e470
  32e3f0:	0040		lsl	r0, r0, #1
  32e3f2:	5a08		ldrh	r0, [r1, r0]
  32e3f4:	1900		add	r0, r0, r4
  32e3f6:	0400		lsl	r0, r0, #16
  32e3f8:	e001		b	0x32e3fe
  32e3fa:	3496		add	r4, #150	; 0x96
  32e3fc:	0420		lsl	r0, r4, #16
  32e3fe:	1404		asr	r4, r0, #16
  32e400:	f085 fe51	bl	0x3b40a6
  32e404:	2800		cmp	r0, #0
  32e406:	d002		beq	0x32e40e
  32e408:	3c32		sub	r4, #50	; 0x32
  32e40a:	0420		lsl	r0, r4, #16
  32e40c:	1404		asr	r4, r0, #16
  32e40e:	0420		lsl	r0, r4, #16
  32e410:	0c00		lsr	r0, r0, #16
  32e412:	b00c		add	sp, #48	; 0x30
  32e414:	bd10		pop	{r4, pc}
  32e416:	46c0		nop			(mov r8, r8)

$ABB_Sem_Create:
  3491ee:	b500		push	{lr}
  3491f0:	48f2		ldr	r0, =0x17741e0	; via 0x3495bc
  3491f2:	a1f0		add	r1, pc, #960	; 0x3c0
  3491f4:	2201		mov	r2, #1
  3491f6:	2306		mov	r3, #6
  3491f8:	f0b0 fb88	bl	0x3f990c	; $SMCE_Create_Semaphore
  3491fc:	bd00		pop	{pc}

$ABB_Wait_IBIC_Access:
  3491fe:	b500		push	{lr}
  349200:	48ef		ldr	r0, =0x33450	; via 0x3495c0
  349202:	f099 fe6c	bl	0x3e2ede	; $convert_nanosec_to_cycles
  349206:	f099 fee4	bl	0x3e2fd2	; $wait_ARM_cycles
  34920a:	bd00		pop	{pc}

$ABB_Write_Register_on_page:
  34920c:	b500		push	{lr}
  34920e:	b082		sub	sp, #8
  349210:	466b		mov	r3, sp
  349212:	809a		strh	r2, [r3, #4]
  349214:	466a		mov	r2, sp
  349216:	8051		strh	r1, [r2, #2]
  349218:	4669		mov	r1, sp
  34921a:	8008		strh	r0, [r1, #0]
  34921c:	48e7		ldr	r0, =0x17741e0	; via 0x3495bc
  34921e:	2100		mov	r1, #0
  349220:	43c9		mvn	r1, r1
  349222:	f0b0 fb63	bl	0x3f98ec	; $SMCE_Obtain_Semaphore
  349226:	49f9		ldr	r1, =0xfffe3000	; via 0x34960c
  349228:	2011		mov	r0, #17	; 0x11
  34922a:	880a		ldrh	r2, [r1, #0]
  34922c:	4310		orr	r0, r2
  34922e:	8008		strh	r0, [r1, #0]
  349230:	4668		mov	r0, sp
  349232:	4995		ldr	r1, =0xfffe3006	; via 0x349488
  349234:	8809		ldrh	r1, [r1, #0]
  349236:	80c1		strh	r1, [r0, #6]
  349238:	8800		ldrh	r0, [r0, #0]
  34923a:	f7ff ff4c	bl	0x3490d6
  34923e:	4668		mov	r0, sp
  349240:	8840		ldrh	r0, [r0, #2]
  349242:	4669		mov	r1, sp
  349244:	8889		ldrh	r1, [r1, #4]
  349246:	f7ff ff6a	bl	0x34911e
  34924a:	2001		mov	r0, #1
  34924c:	f7ff ff43	bl	0x3490d6
  349250:	48da		ldr	r0, =0x17741e0	; via 0x3495bc
  349252:	f0b0 fb43	bl	0x3f98dc	; $SMCE_Release_Semaphore
  349256:	b002		add	sp, #8
  349258:	bd00		pop	{pc}

$ABB_Read_Register_on_page:
  34925a:	b500		push	{lr}
  34925c:	b082		sub	sp, #8
  34925e:	466a		mov	r2, sp
  349260:	8051		strh	r1, [r2, #2]
  349262:	4669		mov	r1, sp
  349264:	8008		strh	r0, [r1, #0]
  349266:	48d5		ldr	r0, =0x17741e0	; via 0x3495bc
  349268:	2100		mov	r1, #0
  34926a:	43c9		mvn	r1, r1
  34926c:	f0b0 fb3e	bl	0x3f98ec
  349270:	49e6		ldr	r1, =0xfffe3000	; via 0x34960c
  349272:	2031		mov	r0, #49	; 0x31
  349274:	880a		ldrh	r2, [r1, #0]
  349276:	4310		orr	r0, r2
  349278:	8008		strh	r0, [r1, #0]
  34927a:	4668		mov	r0, sp
  34927c:	4982		ldr	r1, =0xfffe3006	; via 0x349488
  34927e:	8809		ldrh	r1, [r1, #0]
  349280:	8081		strh	r1, [r0, #4]
  349282:	8800		ldrh	r0, [r0, #0]
  349284:	f7ff ff27	bl	0x3490d6
  349288:	4668		mov	r0, sp
  34928a:	8840		ldrh	r0, [r0, #2]
  34928c:	f7ff ff6d	bl	0x34916a
  349290:	4669		mov	r1, sp
  349292:	80c8		strh	r0, [r1, #6]
  349294:	2001		mov	r0, #1
  349296:	f7ff ff1e	bl	0x3490d6
  34929a:	48c8		ldr	r0, =0x17741e0	; via 0x3495bc
  34929c:	f0b0 fb1e	bl	0x3f98dc
  3492a0:	4668		mov	r0, sp
  3492a2:	88c0		ldrh	r0, [r0, #6]
  3492a4:	b002		add	sp, #8
  3492a6:	bd00		pop	{pc}

$ABB_free_13M:
  3492a8:	b500		push	{lr}
  3492aa:	b081		sub	sp, #4
  3492ac:	49d7		ldr	r1, =0xfffe3000	; via 0x34960c
  3492ae:	2011		mov	r0, #17	; 0x11
  3492b0:	880a		ldrh	r2, [r1, #0]
  3492b2:	4310		orr	r0, r2
  3492b4:	8008		strh	r0, [r1, #0]
  3492b6:	4669		mov	r1, sp
  3492b8:	4873		ldr	r0, =0xfffe3006	; via 0x349488
  3492ba:	8800		ldrh	r0, [r0, #0]
  3492bc:	8008		strh	r0, [r1, #0]
  3492be:	2001		mov	r0, #1
  3492c0:	f7ff ff09	bl	0x3490d6
  3492c4:	200a		mov	r0, #10	; 0xa
  3492c6:	2108		mov	r1, #8
  3492c8:	f7ff ff29	bl	0x34911e
  3492cc:	f7ff ff97	bl	0x3491fe
  3492d0:	200a		mov	r0, #10	; 0xa
  3492d2:	2108		mov	r1, #8
  3492d4:	f7ff ff23	bl	0x34911e
  3492d8:	f7ff ff91	bl	0x3491fe
  3492dc:	b001		add	sp, #4
  3492de:	bd00		pop	{pc}

$ABB_stop_13M:
  3492e0:	b500		push	{lr}
  3492e2:	b081		sub	sp, #4
  3492e4:	49c9		ldr	r1, =0xfffe3000	; via 0x34960c
  3492e6:	2011		mov	r0, #17	; 0x11
  3492e8:	880a		ldrh	r2, [r1, #0]
  3492ea:	4310		orr	r0, r2
  3492ec:	8008		strh	r0, [r1, #0]
  3492ee:	4669		mov	r1, sp
  3492f0:	4865		ldr	r0, =0xfffe3006	; via 0x349488
  3492f2:	8800		ldrh	r0, [r0, #0]
  3492f4:	8008		strh	r0, [r1, #0]
  3492f6:	2001		mov	r0, #1
  3492f8:	f7ff feed	bl	0x3490d6
  3492fc:	200a		mov	r0, #10	; 0xa
  3492fe:	2104		mov	r1, #4
  349300:	f7ff ff0d	bl	0x34911e
  349304:	f7ff ff7b	bl	0x3491fe
  349308:	b001		add	sp, #4
  34930a:	bd00		pop	{pc}

$ABB_Read_Status:
  34930c:	b500		push	{lr}
  34930e:	b081		sub	sp, #4
  349310:	48aa		ldr	r0, =0x17741e0	; via 0x3495bc
  349312:	2100		mov	r1, #0
  349314:	43c9		mvn	r1, r1
  349316:	f0b0 fae9	bl	0x3f98ec	; $SMCE_Obtain_Semaphore
  34931a:	49bc		ldr	r1, =0xfffe3000	; via 0x34960c
  34931c:	2011		mov	r0, #17	; 0x11
  34931e:	880a		ldrh	r2, [r1, #0]
  349320:	4310		orr	r0, r2
  349322:	8008		strh	r0, [r1, #0]
  349324:	4669		mov	r1, sp
  349326:	4858		ldr	r0, =0xfffe3006	; via 0x349488
  349328:	8800		ldrh	r0, [r0, #0]
  34932a:	8008		strh	r0, [r1, #0]
  34932c:	2001		mov	r0, #1
  34932e:	f7ff fed2	bl	0x3490d6
  349332:	2001		mov	r0, #1
  349334:	f7ff fecf	bl	0x3490d6
  349338:	203e		mov	r0, #62	; 0x3e
  34933a:	f7ff ff16	bl	0x34916a
  34933e:	4669		mov	r1, sp
  349340:	8048		strh	r0, [r1, #2]
  349342:	489e		ldr	r0, =0x17741e0	; via 0x3495bc
  349344:	f0b0 faca	bl	0x3f98dc	; $SMCE_Release_Semaphore
  349348:	4668		mov	r0, sp
  34934a:	8840		ldrh	r0, [r0, #2]
  34934c:	b001		add	sp, #4
  34934e:	bd00		pop	{pc}

$ABB_on:
  349350:	b500		push	{lr}
  349352:	b083		sub	sp, #12	; 0xc
  349354:	466a		mov	r2, sp
  349356:	7091		strb	r1, [r2, #2]
  349358:	4669		mov	r1, sp
  34935a:	8008		strh	r0, [r1, #0]
  34935c:	4897		ldr	r0, =0x17741e0	; via 0x3495bc
  34935e:	2100		mov	r1, #0
  349360:	43c9		mvn	r1, r1
  349362:	f0b0 fac3	bl	0x3f98ec
  349366:	4668		mov	r0, sp
  349368:	7880		ldrb	r0, [r0, #2]
  34936a:	2800		cmp	r0, #0
  34936c:	d003		beq	0x349376
  34936e:	f7ff ff9b	bl	0x3492a8
  349372:	f7ff ff99	bl	0x3492a8
  349376:	49a5		ldr	r1, =0xfffe3000	; via 0x34960c
  349378:	2031		mov	r0, #49	; 0x31
  34937a:	880a		ldrh	r2, [r1, #0]
  34937c:	4310		orr	r0, r2
  34937e:	8008		strh	r0, [r1, #0]
  349380:	4669		mov	r1, sp
  349382:	4841		ldr	r0, =0xfffe3006	; via 0x349488
  349384:	8800		ldrh	r0, [r0, #0]
  349386:	8088		strh	r0, [r1, #4]
  349388:	2001		mov	r0, #1
  34938a:	f7ff fea4	bl	0x3490d6
  34938e:	2008		mov	r0, #8
  349390:	21ff		mov	r1, #255	; 0xff
  349392:	3156		add	r1, #86	; 0x56
  349394:	f7ff fec3	bl	0x34911e
  349398:	2002		mov	r0, #2
  34939a:	f7ff fe9c	bl	0x3490d6
  34939e:	202a		mov	r0, #42	; 0x2a
  3493a0:	2101		mov	r1, #1
  3493a2:	f7ff febc	bl	0x34911e
  3493a6:	2026		mov	r0, #38	; 0x26
  3493a8:	2101		mov	r1, #1
  3493aa:	f7ff feb8	bl	0x34911e
  3493ae:	2028		mov	r0, #40	; 0x28
  3493b0:	211b		mov	r1, #27	; 0x1b
  3493b2:	f7ff feb4	bl	0x34911e
  3493b6:	2010		mov	r0, #16	; 0x10
  3493b8:	f7ff fe8d	bl	0x3490d6
  3493bc:	203c		mov	r0, #60	; 0x3c
  3493be:	2107		mov	r1, #7
  3493c0:	f7ff fead	bl	0x34911e
  3493c4:	2002		mov	r0, #2
  3493c6:	f7ff fe86	bl	0x3490d6
  3493ca:	2028		mov	r0, #40	; 0x28
  3493cc:	2101		mov	r1, #1
  3493ce:	f7ff fea6	bl	0x34911e
  3493d2:	2026		mov	r0, #38	; 0x26
  3493d4:	2100		mov	r1, #0
  3493d6:	f7ff fea2	bl	0x34911e
  3493da:	201a		mov	r0, #26	; 0x1a
  3493dc:	2160		mov	r1, #96	; 0x60
  3493de:	f7ff fe9e	bl	0x34911e
  3493e2:	2026		mov	r0, #38	; 0x26
  3493e4:	2101		mov	r1, #1
  3493e6:	f7ff fe9a	bl	0x34911e
  3493ea:	2028		mov	r0, #40	; 0x28
  3493ec:	211a		mov	r1, #26	; 0x1a
  3493ee:	f7ff fe96	bl	0x34911e
  3493f2:	2001		mov	r0, #1
  3493f4:	f7ff fe6f	bl	0x3490d6
  3493f8:	4668		mov	r0, sp
  3493fa:	8800		ldrh	r0, [r0, #0]
  3493fc:	0980		lsr	r0, r0, #6
  3493fe:	0400		lsl	r0, r0, #16
  349400:	0c01		lsr	r1, r0, #16
  349402:	2008		mov	r0, #8
  349404:	f7ff fe8b	bl	0x34911e
  349408:	4668		mov	r0, sp
  34940a:	8800		ldrh	r0, [r0, #0]
  34940c:	0c00		lsr	r0, r0, #16
  34940e:	d303		bcc	0x349418
  349410:	2038		mov	r0, #56	; 0x38
  349412:	2101		mov	r1, #1
  349414:	f7ff fe83	bl	0x34911e
  349418:	2002		mov	r0, #2
  34941a:	f7ff fe5c	bl	0x3490d6
  34941e:	203c		mov	r0, #60	; 0x3c
  349420:	f7ff fea3	bl	0x34916a
  349424:	05c0		lsl	r0, r0, #23
  349426:	0f00		lsr	r0, r0, #28
  349428:	0140		lsl	r0, r0, #5
  34942a:	9002		str	r0, [sp, #8]
  34942c:	201f		mov	r0, #31	; 0x1f
  34942e:	9902		ldr	r1, [sp, #8]
  349430:	4308		orr	r0, r1
  349432:	0400		lsl	r0, r0, #16
  349434:	0c01		lsr	r1, r0, #16
  349436:	203c		mov	r0, #60	; 0x3c
  349438:	f7ff fe71	bl	0x34911e
  34943c:	203e		mov	r0, #62	; 0x3e
  34943e:	f7ff fe94	bl	0x34916a
  349442:	05c0		lsl	r0, r0, #23
  349444:	0f00		lsr	r0, r0, #28
  349446:	0140		lsl	r0, r0, #5
  349448:	9002		str	r0, [sp, #8]
  34944a:	4668		mov	r0, sp
  34944c:	8901		ldrh	r1, [r0, #8]
  34944e:	203e		mov	r0, #62	; 0x3e
  349450:	f7ff fe65	bl	0x34911e
  349454:	2001		mov	r0, #1
  349456:	f7ff fe3e	bl	0x3490d6
  34945a:	2008		mov	r0, #8
  34945c:	210a		mov	r1, #10	; 0xa
  34945e:	f7ff fe5e	bl	0x34911e
  349462:	48e5		ldr	r0, =0xf4240	; via 0x3497f8
  349464:	f099 fd3b	bl	0x3e2ede
  349468:	f099 fdb3	bl	0x3e2fd2
  34946c:	2008		mov	r0, #8
  34946e:	2105		mov	r1, #5
  349470:	f7ff fe55	bl	0x34911e
  349474:	4851		ldr	r0, =0x17741e0	; via 0x3495bc
  349476:	f0b0 fa31	bl	0x3f98dc
  34947a:	b003		add	sp, #12	; 0xc
  34947c:	bd00		pop	{pc}
  34947e:	46c0		nop			(mov r8, r8)

  349480:	fffe300c
  349484:	fffe300e
  349488:	fffe3006
  34948c:	fffe3004
  349490:	fffe300a
  349494:	0000021b

$ABB_Read_ADC:
  349498:	b500		push	{lr}
  34949a:	b082		sub	sp, #8
  34949c:	9000		str	r0, [sp, #0]
  34949e:	4847		ldr	r0, =0x17741e0	; via 0x3495bc
  3494a0:	2100		mov	r1, #0
  3494a2:	43c9		mvn	r1, r1
  3494a4:	f0b0 fa22	bl	0x3f98ec
  3494a8:	4958		ldr	r1, =0xfffe3000	; via 0x34960c
  3494aa:	2031		mov	r0, #49	; 0x31
  3494ac:	880a		ldrh	r2, [r1, #0]
  3494ae:	4310		orr	r0, r2
  3494b0:	8008		strh	r0, [r1, #0]
  3494b2:	4669		mov	r1, sp
  3494b4:	48ef		ldr	r0, =0xfffe3006	; via 0x349874
  3494b6:	8800		ldrh	r0, [r0, #0]
  3494b8:	8088		strh	r0, [r1, #4]
  3494ba:	2001		mov	r0, #1
  3494bc:	f7ff fe0b	bl	0x3490d6
  3494c0:	201e		mov	r0, #30	; 0x1e
  3494c2:	f7ff fe52	bl	0x34916a
  3494c6:	9900		ldr	r1, [sp, #0]
  3494c8:	1c8a		add	r2, r1, #2
  3494ca:	9200		str	r2, [sp, #0]
  3494cc:	8008		strh	r0, [r1, #0]
  3494ce:	2020		mov	r0, #32	; 0x20
  3494d0:	f7ff fe4b	bl	0x34916a
  3494d4:	9900		ldr	r1, [sp, #0]
  3494d6:	1c8a		add	r2, r1, #2
  3494d8:	9200		str	r2, [sp, #0]
  3494da:	8008		strh	r0, [r1, #0]
  3494dc:	2022		mov	r0, #34	; 0x22
  3494de:	f7ff fe44	bl	0x34916a
  3494e2:	9900		ldr	r1, [sp, #0]
  3494e4:	1c8a		add	r2, r1, #2
  3494e6:	9200		str	r2, [sp, #0]
  3494e8:	8008		strh	r0, [r1, #0]
  3494ea:	2024		mov	r0, #36	; 0x24
  3494ec:	f7ff fe3d	bl	0x34916a
  3494f0:	9900		ldr	r1, [sp, #0]
  3494f2:	1c8a		add	r2, r1, #2
  3494f4:	9200		str	r2, [sp, #0]
  3494f6:	8008		strh	r0, [r1, #0]
  3494f8:	2026		mov	r0, #38	; 0x26
  3494fa:	f7ff fe36	bl	0x34916a
  3494fe:	9900		ldr	r1, [sp, #0]
  349500:	1c8a		add	r2, r1, #2
  349502:	9200		str	r2, [sp, #0]
  349504:	8008		strh	r0, [r1, #0]
  349506:	2028		mov	r0, #40	; 0x28
  349508:	f7ff fe2f	bl	0x34916a
  34950c:	9900		ldr	r1, [sp, #0]
  34950e:	1c8a		add	r2, r1, #2
  349510:	9200		str	r2, [sp, #0]
  349512:	8008		strh	r0, [r1, #0]
  349514:	202a		mov	r0, #42	; 0x2a
  349516:	f7ff fe28	bl	0x34916a
  34951a:	9900		ldr	r1, [sp, #0]
  34951c:	1c8a		add	r2, r1, #2
  34951e:	9200		str	r2, [sp, #0]
  349520:	8008		strh	r0, [r1, #0]
  349522:	202c		mov	r0, #44	; 0x2c
  349524:	f7ff fe21	bl	0x34916a
  349528:	9900		ldr	r1, [sp, #0]
  34952a:	1c8a		add	r2, r1, #2
  34952c:	9200		str	r2, [sp, #0]
  34952e:	8008		strh	r0, [r1, #0]
  349530:	4822		ldr	r0, =0x17741e0	; via 0x3495bc
  349532:	f0b0 f9d3	bl	0x3f98dc
  349536:	b002		add	sp, #8
  349538:	bd00		pop	{pc}

$ABB_Conf_ADC:
  34953a:	b500		push	{lr}
  34953c:	b082		sub	sp, #8
  34953e:	466a		mov	r2, sp
  349540:	8051		strh	r1, [r2, #2]
  349542:	4669		mov	r1, sp
  349544:	8008		strh	r0, [r1, #0]
  349546:	481d		ldr	r0, =0x17741e0	; via 0x3495bc
  349548:	2100		mov	r1, #0
  34954a:	43c9		mvn	r1, r1
  34954c:	f0b0 f9ce	bl	0x3f98ec
  349550:	492e		ldr	r1, =0xfffe3000	; via 0x34960c
  349552:	2031		mov	r0, #49	; 0x31
  349554:	880a		ldrh	r2, [r1, #0]
  349556:	4310		orr	r0, r2
  349558:	8008		strh	r0, [r1, #0]
  34955a:	4669		mov	r1, sp
  34955c:	48c5		ldr	r0, =0xfffe3006	; via 0x349874
  34955e:	8800		ldrh	r0, [r0, #0]
  349560:	8088		strh	r0, [r1, #4]
  349562:	2001		mov	r0, #1
  349564:	f7ff fdb7	bl	0x3490d6
  349568:	201a		mov	r0, #26	; 0x1a
  34956a:	4669		mov	r1, sp
  34956c:	8809		ldrh	r1, [r1, #0]
  34956e:	f7ff fdd6	bl	0x34911e
  349572:	2034		mov	r0, #52	; 0x34
  349574:	f7ff fdf9	bl	0x34916a
  349578:	4669		mov	r1, sp
  34957a:	80c8		strh	r0, [r1, #6]
  34957c:	4668		mov	r0, sp
  34957e:	8840		ldrh	r0, [r0, #2]
  349580:	49cb		ldr	r1, =0x3df	; via 0x3498b0
  349582:	4288		cmp	r0, r1
  349584:	d104		bne	0x349590
  349586:	48ca		ldr	r0, =0x3df	; via 0x3498b0
  349588:	4669		mov	r1, sp
  34958a:	88c9		ldrh	r1, [r1, #6]
  34958c:	4008		and	r0, r1
  34958e:	e007		b	0x3495a0
  349590:	4668		mov	r0, sp
  349592:	8840		ldrh	r0, [r0, #2]
  349594:	2820		cmp	r0, #32	; 0x20
  349596:	d108		bne	0x3495aa
  349598:	2020		mov	r0, #32	; 0x20
  34959a:	4669		mov	r1, sp
  34959c:	88c9		ldrh	r1, [r1, #6]
  34959e:	4308		orr	r0, r1
  3495a0:	0400		lsl	r0, r0, #16
  3495a2:	0c01		lsr	r1, r0, #16
  3495a4:	2034		mov	r0, #52	; 0x34
  3495a6:	f7ff fdba	bl	0x34911e
  3495aa:	4804		ldr	r0, =0x17741e0	; via 0x3495bc
  3495ac:	f0b0 f996	bl	0x3f98dc
  3495b0:	b002		add	sp, #8
  3495b2:	bd00		pop	{pc}

$spi_abb_read_int_reg_callback:
  39efc4:	b510		push	{r4, lr}
  39efc6:	b089		sub	sp, #36	; 0x24
  39efc8:	9002		str	r0, [sp, #8]
  39efca:	9802		ldr	r0, [sp, #8]
  39efcc:	8800		ldrh	r0, [r0, #0]
  39efce:	08c0		lsr	r0, r0, #3
  39efd0:	d344		bcc	0x39f05c
  39efd2:	2014		mov	r0, #20	; 0x14
  39efd4:	f05a fbba	bl	0x3f974c
  39efd8:	f7aa f998	bl	0x34930c
  39efdc:	2110		mov	r1, #16	; 0x10
  39efde:	4001		and	r1, r0
  39efe0:	4668		mov	r0, sp
  39efe2:	81c1		strh	r1, [r0, #14]	; 0xe
  39efe4:	89c0		ldrh	r0, [r0, #14]	; 0xe
  39efe6:	2800		cmp	r0, #0
  39efe8:	d000		beq	0x39efec
  39efea:	e15d		b	0x39f2a8
  39efec:	f04b fa6a	bl	0x3ea4c4
  39eff0:	4669		mov	r1, sp
  39eff2:	2000		mov	r0, #0
  39eff4:	8188		strh	r0, [r1, #12]	; 0xc
  39eff6:	4668		mov	r0, sp
  39eff8:	8980		ldrh	r0, [r0, #12]	; 0xc
  39effa:	2808		cmp	r0, #8
  39effc:	da18		bge	0x39f030
  39effe:	4668		mov	r0, sp
  39f000:	89c0		ldrh	r0, [r0, #14]	; 0xe
  39f002:	2800		cmp	r0, #0
  39f004:	d114		bne	0x39f030
  39f006:	2036		mov	r0, #54	; 0x36
  39f008:	f05a fba0	bl	0x3f974c
  39f00c:	f7aa f97e	bl	0x34930c
  39f010:	2110		mov	r1, #16	; 0x10
  39f012:	4001		and	r1, r0
  39f014:	4668		mov	r0, sp
  39f016:	81c1		strh	r1, [r0, #14]	; 0xe
  39f018:	4669		mov	r1, sp
  39f01a:	8980		ldrh	r0, [r0, #12]	; 0xc
  39f01c:	3001		add	r0, #1
  39f01e:	8188		strh	r0, [r1, #12]	; 0xc
  39f020:	4668		mov	r0, sp
  39f022:	8980		ldrh	r0, [r0, #12]	; 0xc
  39f024:	2808		cmp	r0, #8
  39f026:	da03		bge	0x39f030
  39f028:	4668		mov	r0, sp
  39f02a:	89c0		ldrh	r0, [r0, #14]	; 0xe
  39f02c:	2800		cmp	r0, #0
  39f02e:	d0ea		beq	0x39f006
  39f030:	4668		mov	r0, sp
  39f032:	89c0		ldrh	r0, [r0, #14]	; 0xe
  39f034:	2800		cmp	r0, #0
  39f036:	d000		beq	0x39f03a
  39f038:	e136		b	0x39f2a8
  39f03a:	48d9		ldr	r0, =0x1774ccf	; via 0x39f3a0
  39f03c:	7800		ldrb	r0, [r0, #0]
  39f03e:	2800		cmp	r0, #0
  39f040:	d100		bne	0x39f044
  39f042:	e131		b	0x39f2a8
  39f044:	48d7		ldr	r0, =0xa0010	; via 0x39f3a4
  39f046:	9000		str	r0, [sp, #0]
  39f048:	a09a		add	r0, pc, #616	; 0x268
  39f04a:	2119		mov	r1, #25	; 0x19
  39f04c:	2200		mov	r2, #0
  39f04e:	43d2		mvn	r2, r2
  39f050:	2305		mov	r3, #5
  39f052:	f03b fdef	bl	0x3dac34
  39f056:	f002 f9f1	bl	0x3a143c	; $Power_OFF_Button
  39f05a:	e125		b	0x39f2a8
; end of PUSHOFF_IT_STS handling
  39f05c:	9802		ldr	r0, [sp, #8]
  39f05e:	8800		ldrh	r0, [r0, #0]
  39f060:	0880		lsr	r0, r0, #2
  39f062:	d30b		bcc	0x39f07c
  39f064:	48cf		ldr	r0, =0xa0010	; via 0x39f3a4
  39f066:	9000		str	r0, [sp, #0]
  39f068:	a099		add	r0, pc, #612	; 0x264
  39f06a:	2120		mov	r1, #32	; 0x20
  39f06c:	2200		mov	r2, #0
  39f06e:	43d2		mvn	r2, r2
  39f070:	2305		mov	r3, #5
  39f072:	f03b fddf	bl	0x3dac34
  39f076:	f002 fa9c	bl	0x3a15b2	; $Power_OFF_Remote
  39f07a:	e115		b	0x39f2a8
; end of REMOT_IT_STS handling
  39f07c:	9802		ldr	r0, [sp, #8]
  39f07e:	8800		ldrh	r0, [r0, #0]
  39f080:	0980		lsr	r0, r0, #6
  39f082:	d200		bcs	0x39f086
  39f084:	e0ed		b	0x39f262
; The following write of 0 into byte var at 0x1775041
; is a Foxconn/Pirelli addition.
  39f086:	49c8		ldr	r1, =0x1775041	; via 0x39f3a8
  39f088:	2000		mov	r0, #0
  39f08a:	7008		strb	r0, [r1, #0]
  39f08c:	48c5		ldr	r0, =0xa0010	; via 0x39f3a4
  39f08e:	9000		str	r0, [sp, #0]
  39f090:	a098		add	r0, pc, #608	; 0x260
  39f092:	210f		mov	r1, #15	; 0xf
  39f094:	2200		mov	r2, #0
  39f096:	43d2		mvn	r2, r2
  39f098:	2305		mov	r3, #5
  39f09a:	f03b fdcb	bl	0x3dac34	; rvf_send_trace()
  39f09e:	48c3		ldr	r0, =0x1774e38	; via 0x39f3ac
  39f0a0:	6800		ldr	r0, [r0, #0]
  39f0a2:	3004		add	r0, #4
  39f0a4:	f7aa f9f8	bl	0x349498	; $ABB_Read_ADC
  39f0a8:	48c0		ldr	r0, =0x1774e38	; via 0x39f3ac
  39f0aa:	6800		ldr	r0, [r0, #0]
  39f0ac:	8dc0		ldrh	r0, [r0, #46]	; 0x2e
  39f0ae:	2806		cmp	r0, #6
  39f0b0:	db03		blt	0x39f0ba
  39f0b2:	48be		ldr	r0, =0x1774e38	; via 0x39f3ac
  39f0b4:	6801		ldr	r1, [r0, #0]
  39f0b6:	2000		mov	r0, #0
  39f0b8:	85c8		strh	r0, [r1, #46]	; 0x2e
  39f0ba:	48bc		ldr	r0, =0x1774e38	; via 0x39f3ac
  39f0bc:	6800		ldr	r0, [r0, #0]
  39f0be:	8dc0		ldrh	r0, [r0, #46]	; 0x2e
  39f0c0:	0040		lsl	r0, r0, #1
  39f0c2:	49ba		ldr	r1, =0x1774e38	; via 0x39f3ac
  39f0c4:	6809		ldr	r1, [r1, #0]
  39f0c6:	1840		add	r0, r0, r1
  39f0c8:	49b8		ldr	r1, =0x1774e38	; via 0x39f3ac
  39f0ca:	6809		ldr	r1, [r1, #0]
  39f0cc:	8889		ldrh	r1, [r1, #4]
  39f0ce:	8281		strh	r1, [r0, #20]	; 0x14
  39f0d0:	48b6		ldr	r0, =0x1774e38	; via 0x39f3ac
  39f0d2:	6800		ldr	r0, [r0, #0]
  39f0d4:	302e		add	r0, #46	; 0x2e
  39f0d6:	8801		ldrh	r1, [r0, #0]
  39f0d8:	3101		add	r1, #1
  39f0da:	8001		strh	r1, [r0, #0]
  39f0dc:	2133		mov	r1, #51	; 0x33
  39f0de:	48b3		ldr	r0, =0x1774e38	; via 0x39f3ac
  39f0e0:	6800		ldr	r0, [r0, #0]
  39f0e2:	5c08		ldrb	r0, [r1, r0]
  39f0e4:	2801		cmp	r0, #1
  39f0e6:	d000		beq	0x39f0ea
  39f0e8:	e0de		b	0x39f2a8
  39f0ea:	2010		mov	r0, #16	; 0x10
  39f0ec:	f7f8 ff53	bl	0x397f96	; $osx_alloc_prim
  39f0f0:	9004		str	r0, [sp, #16]	; 0x10
  39f0f2:	9804		ldr	r0, [sp, #16]	; 0x10
  39f0f4:	2800		cmp	r0, #0
  39f0f6:	d022		beq	0x39f13e
  39f0f8:	9904		ldr	r1, [sp, #16]	; 0x10
  39f0fa:	2069		mov	r0, #105	; 0x69
  39f0fc:	6008		str	r0, [r1, #0]
  39f0fe:	4669		mov	r1, sp
  39f100:	2000		mov	r0, #0
  39f102:	7508		strb	r0, [r1, #20]	; 0x14
  39f104:	4668		mov	r0, sp
  39f106:	7d00		ldrb	r0, [r0, #20]	; 0x14
  39f108:	2808		cmp	r0, #8
  39f10a:	da14		bge	0x39f136
  39f10c:	4668		mov	r0, sp
  39f10e:	7d00		ldrb	r0, [r0, #20]	; 0x14
  39f110:	0042		lsl	r2, r0, #1
  39f112:	9804		ldr	r0, [sp, #16]	; 0x10
  39f114:	6901		ldr	r1, [r0, #16]	; 0x10
  39f116:	4668		mov	r0, sp
  39f118:	7d00		ldrb	r0, [r0, #20]	; 0x14
  39f11a:	0043		lsl	r3, r0, #1
  39f11c:	48a3		ldr	r0, =0x1774e38	; via 0x39f3ac
  39f11e:	6800		ldr	r0, [r0, #0]
  39f120:	1818		add	r0, r3, r0
  39f122:	8880		ldrh	r0, [r0, #4]
  39f124:	5250		strh	r0, [r2, r1]
  39f126:	4668		mov	r0, sp
  39f128:	4669		mov	r1, sp
  39f12a:	7d09		ldrb	r1, [r1, #20]	; 0x14
  39f12c:	3101		add	r1, #1
  39f12e:	7501		strb	r1, [r0, #20]	; 0x14
  39f130:	7d00		ldrb	r0, [r0, #20]	; 0x14
  39f132:	2808		cmp	r0, #8
  39f134:	dbea		blt	0x39f10c
  39f136:	9804		ldr	r0, [sp, #16]	; 0x10
  39f138:	2102		mov	r1, #2
  39f13a:	f7f8 fe9a	bl	0x397e72	; $osx_send_prim
; checking GPIO 6 input
  39f13e:	2400		mov	r4, #0
  39f140:	2005		mov	r0, #5
  39f142:	f030 fed8	bl	0x3cfef6
  39f146:	2800		cmp	r0, #0
  39f148:	d100		bne	0x39f14c
  39f14a:	2401		mov	r4, #1
  39f14c:	a808		add	r0, sp, #32	; 0x20
  39f14e:	7004		strb	r4, [r0, #0]
  39f150:	4897		ldr	r0, =0x17750fc	; via 0x39f3b0
  39f152:	7800		ldrb	r0, [r0, #0]
  39f154:	a908		add	r1, sp, #32	; 0x20
  39f156:	7809		ldrb	r1, [r1, #0]
  39f158:	4288		cmp	r0, r1
  39f15a:	d017		beq	0x39f18c
  39f15c:	f7b0 ffc4	bl	0x3500e8
  39f160:	2801		cmp	r0, #1
  39f162:	d10a		bne	0x39f17a
  39f164:	4893		ldr	r0, =0x17750fe	; via 0x39f3b4
  39f166:	2101		mov	r1, #1
  39f168:	7001		strb	r1, [r0, #0]
  39f16a:	4991		ldr	r1, =0x17750fc	; via 0x39f3b0
  39f16c:	a808		add	r0, sp, #32	; 0x20
  39f16e:	7800		ldrb	r0, [r0, #0]
  39f170:	7008		strb	r0, [r1, #0]
  39f172:	488c		ldr	r0, =0xa0010	; via 0x39f3a4
  39f174:	9000		str	r0, [sp, #0]
  39f176:	a063		add	r0, pc, #396	; 0x18c
  39f178:	e002		b	0x39f180
  39f17a:	488a		ldr	r0, =0xa0010	; via 0x39f3a4
  39f17c:	9000		str	r0, [sp, #0]
  39f17e:	a063		add	r0, pc, #396	; 0x18c
  39f180:	2107		mov	r1, #7
  39f182:	2200		mov	r2, #0
  39f184:	43d2		mvn	r2, r2
  39f186:	2305		mov	r3, #5
  39f188:	f03b fd54	bl	0x3dac34
; end of GPIO 6 check code
  39f18c:	488a		ldr	r0, =0x17751e8	; via 0x39f3b8
  39f18e:	7800		ldrb	r0, [r0, #0]
  39f190:	2800		cmp	r0, #0
  39f192:	d019		beq	0x39f1c8
  39f194:	f69e f9ce	bl	0x23d534
  39f198:	2802		cmp	r0, #2
  39f19a:	dd15		ble	0x39f1c8
  39f19c:	4883		ldr	r0, =0x1774e38	; via 0x39f3ac
  39f19e:	6800		ldr	r0, [r0, #0]
  39f1a0:	8a41		ldrh	r1, [r0, #18]	; 0x12
  39f1a2:	2049		mov	r0, #73	; 0x49
  39f1a4:	00c0		lsl	r0, r0, #3
  39f1a6:	4281		cmp	r1, r0
  39f1a8:	dd0e		ble	0x39f1c8
  39f1aa:	4983		ldr	r1, =0x17751e8	; via 0x39f3b8
  39f1ac:	2000		mov	r0, #0
  39f1ae:	7008		strb	r0, [r1, #0]
  39f1b0:	4882		ldr	r0, =0x17751e9	; via 0x39f3bc
  39f1b2:	2101		mov	r1, #1
  39f1b4:	7001		strb	r1, [r0, #0]
  39f1b6:	487b		ldr	r0, =0xa0010	; via 0x39f3a4
  39f1b8:	9000		str	r0, [sp, #0]
  39f1ba:	a060		add	r0, pc, #384	; 0x180
  39f1bc:	2103		mov	r1, #3
  39f1be:	2200		mov	r2, #0
  39f1c0:	43d2		mvn	r2, r2
  39f1c2:	2305		mov	r3, #5
  39f1c4:	f03b fd36	bl	0x3dac34
  39f1c8:	4879		ldr	r0, =0x17750fc	; via 0x39f3b0
  39f1ca:	7800		ldrb	r0, [r0, #0]
  39f1cc:	2800		cmp	r0, #0
  39f1ce:	d110		bne	0x39f1f2
  39f1d0:	487b		ldr	r0, =0x1774db8	; via 0x39f3c0
  39f1d2:	6800		ldr	r0, [r0, #0]
  39f1d4:	2801		cmp	r0, #1
  39f1d6:	d003		beq	0x39f1e0
  39f1d8:	4879		ldr	r0, =0x1774db8	; via 0x39f3c0
  39f1da:	6800		ldr	r0, [r0, #0]
  39f1dc:	2802		cmp	r0, #2
  39f1de:	d108		bne	0x39f1f2
  39f1e0:	4872		ldr	r0, =0x1774e38	; via 0x39f3ac
  39f1e2:	6800		ldr	r0, [r0, #0]
  39f1e4:	8a41		ldrh	r1, [r0, #18]	; 0x12
  39f1e6:	2049		mov	r0, #73	; 0x49
  39f1e8:	00c0		lsl	r0, r0, #3
  39f1ea:	4281		cmp	r1, r0
  39f1ec:	dc04		bgt	0x39f1f8
  39f1ee:	2101		mov	r1, #1
  39f1f0:	e000		b	0x39f1f4
  39f1f2:	2100		mov	r1, #0
  39f1f4:	4870		ldr	r0, =0x17751e8	; via 0x39f3b8
  39f1f6:	7001		strb	r1, [r0, #0]
  39f1f8:	486e		ldr	r0, =0x17750fe	; via 0x39f3b4
  39f1fa:	7800		ldrb	r0, [r0, #0]
  39f1fc:	2800		cmp	r0, #0
  39f1fe:	d103		bne	0x39f208
  39f200:	486e		ldr	r0, =0x17751e9	; via 0x39f3bc
  39f202:	7800		ldrb	r0, [r0, #0]
  39f204:	2800		cmp	r0, #0
  39f206:	d04f		beq	0x39f2a8
  39f208:	486e		ldr	r0, =0x1775098	; via 0x39f3c4
  39f20a:	6800		ldr	r0, [r0, #0]
  39f20c:	8800		ldrh	r0, [r0, #0]
  39f20e:	2110		mov	r1, #16	; 0x10
  39f210:	aa07		add	r2, sp, #28	; 0x1c
  39f212:	f625 fbd9	bl	0x1c49c8
  39f216:	9006		str	r0, [sp, #24]	; 0x18
  39f218:	9806		ldr	r0, [sp, #24]	; 0x18
  39f21a:	2802		cmp	r0, #2
  39f21c:	d015		beq	0x39f24a
  39f21e:	9907		ldr	r1, [sp, #28]	; 0x1c
  39f220:	4869		ldr	r0, =0xd809	; via 0x39f3c8
  39f222:	6008		str	r0, [r1, #0]
  39f224:	9907		ldr	r1, [sp, #28]	; 0x1c
  39f226:	2000		mov	r0, #0
  39f228:	43c0		mvn	r0, r0
  39f22a:	7308		strb	r0, [r1, #12]	; 0xc
  39f22c:	9806		ldr	r0, [sp, #24]	; 0x18
  39f22e:	2800		cmp	r0, #0
  39f230:	d101		bne	0x39f236
  39f232:	2101		mov	r1, #1
  39f234:	e000		b	0x39f238
  39f236:	2100		mov	r1, #0
  39f238:	9807		ldr	r0, [sp, #28]	; 0x1c
  39f23a:	7341		strb	r1, [r0, #13]	; 0xd
  39f23c:	4861		ldr	r0, =0x1775098	; via 0x39f3c4
  39f23e:	6800		ldr	r0, [r0, #0]
  39f240:	7880		ldrb	r0, [r0, #2]
  39f242:	9907		ldr	r1, [sp, #28]	; 0x1c
  39f244:	f019 feac	bl	0x3b8fa0
  39f248:	e02e		b	0x39f2a8
  39f24a:	4860		ldr	r0, =0xa0008	; via 0x39f3cc
  39f24c:	9000		str	r0, [sp, #0]
  39f24e:	a03c		add	r0, pc, #240	; 0xf0
  39f250:	212e		mov	r1, #46	; 0x2e
  39f252:	2200		mov	r2, #0
  39f254:	43d2		mvn	r2, r2
  39f256:	2301		mov	r3, #1
  39f258:	f03b fcec	bl	0x3dac34
  39f25c:	f00f fe8b	bl	0x3aef76
  39f260:	e022		b	0x39f2a8
  39f262:	9802		ldr	r0, [sp, #8]
  39f264:	8800		ldrh	r0, [r0, #0]
  39f266:	0900		lsr	r0, r0, #4
  39f268:	d31e		bcc	0x39f2a8
  39f26a:	f7aa f84f	bl	0x34930c
  39f26e:	4669		mov	r1, sp
  39f270:	81c8		strh	r0, [r1, #14]	; 0xe
  39f272:	4668		mov	r0, sp
  39f274:	89c0		ldrh	r0, [r0, #14]	; 0xe
  39f276:	09c0		lsr	r0, r0, #7
  39f278:	d30b		bcc	0x39f292
  39f27a:	484a		ldr	r0, =0xa0010	; via 0x39f3a4
  39f27c:	9000		str	r0, [sp, #0]
  39f27e:	a03c		add	r0, pc, #240	; 0xf0
  39f280:	2114		mov	r1, #20	; 0x14
  39f282:	2200		mov	r2, #0
  39f284:	43d2		mvn	r2, r2
  39f286:	2305		mov	r3, #5
  39f288:	f03b fcd4	bl	0x3dac34
  39f28c:	f002 f993	bl	0x3a15b6
  39f290:	e00a		b	0x39f2a8
  39f292:	4844		ldr	r0, =0xa0010	; via 0x39f3a4
  39f294:	9000		str	r0, [sp, #0]
  39f296:	a03c		add	r0, pc, #240	; 0xf0
  39f298:	2116		mov	r1, #22	; 0x16
  39f29a:	2200		mov	r2, #0
  39f29c:	43d2		mvn	r2, r2
  39f29e:	2305		mov	r3, #5
  39f2a0:	f03b fcc8	bl	0x3dac34
  39f2a4:	f002 f99a	bl	0x3a15dc
  39f2a8:	200c		mov	r0, #12	; 0xc
  39f2aa:	f040 fd00	bl	0x3dfcae
  39f2ae:	b009		add	sp, #36	; 0x24
  39f2b0:	bd10		pop	{r4, pc}
  39f2b2:	46c0		nop			(mov r8, r8)

$Power_ON_Button:
  3a13dc:	b570		push	{r4, r5, r6, lr}
  3a13de:	1c05		add	r5, r0, #0
; set is_gsm_on
  3a13e0:	2232		mov	r2, #50	; 0x32
  3a13e2:	48ee		ldr	r0, =0x1774e38	; via 0x3a179c
  3a13e4:	6801		ldr	r1, [r0, #0]
  3a13e6:	2001		mov	r0, #1
  3a13e8:	5450		strb	r0, [r2, r1]
; Kp pointers: are they set?
  3a13ea:	4eed		ldr	r6, =0x1774e98	; via 0x3a17a0
  3a13ec:	6834		ldr	r4, [r6, #0]
  3a13ee:	6830		ldr	r0, [r6, #0]
  3a13f0:	2800		cmp	r0, #0
  3a13f2:	d002		beq	0x3a13fa
  3a13f4:	6870		ldr	r0, [r6, #4]
  3a13f6:	2800		cmp	r0, #0
  3a13f8:	d106		bne	0x3a1408
  3a13fa:	2001		mov	r0, #1
  3a13fc:	f710 fa4f	bl	0x2b189e	; rvf_delay()
  3a1400:	6834		ldr	r4, [r6, #0]
  3a1402:	2c00		cmp	r4, #0
  3a1404:	d1f6		bne	0x3a13f4
  3a1406:	e7f8		b	0x3a13fa
; end of the wait for Kp pointers to be initialized
; different boot causes result in different key codes being sent
  3a1408:	2d01		cmp	r5, #1
  3a140a:	d00d		beq	0x3a1428
  3a140c:	2d04		cmp	r5, #4
  3a140e:	d009		beq	0x3a1424
  3a1410:	2d08		cmp	r5, #8
  3a1412:	d005		beq	0x3a1420
  3a1414:	2d02		cmp	r5, #2
  3a1416:	d001		beq	0x3a141c
  3a1418:	2036		mov	r0, #54	; 0x36
  3a141a:	e006		b	0x3a142a
  3a141c:	2035		mov	r0, #53	; 0x35
  3a141e:	e004		b	0x3a142a
  3a1420:	2034		mov	r0, #52	; 0x34
  3a1422:	e002		b	0x3a142a
  3a1424:	2033		mov	r0, #51	; 0x33
  3a1426:	e000		b	0x3a142a
  3a1428:	2019		mov	r0, #25	; 0x19
  3a142a:	f055 feef	bl	0x3f720c	; $IND_CALL
  3a142e:	2005		mov	r0, #5
  3a1430:	f710 fa35	bl	0x2b189e	; rvf_delay()
  3a1434:	6874		ldr	r4, [r6, #4]
  3a1436:	f055 fee9	bl	0x3f720c	; $IND_CALL
  3a143a:	bd70		pop	{r4, r5, r6, pc}

$Power_OFF_Button:
  3a143c:	b530		push	{r4, r5, lr}
  3a143e:	b082		sub	sp, #8
  3a1440:	f707 f84e	bl	0x2a84e0
  3a1444:	48d7		ldr	r0, =0xa0020	; via 0x3a17a4
  3a1446:	9000		str	r0, [sp, #0]
  3a1448:	a0b9		add	r0, pc, #740	; 0x2e4
  3a144a:	2110		mov	r1, #16	; 0x10
  3a144c:	2200		mov	r2, #0
  3a144e:	43d2		mvn	r2, r2
  3a1450:	2302		mov	r3, #2
  3a1452:	f039 fbef	bl	0x3dac34
  3a1456:	4dd2		ldr	r5, =0x1774e98	; via 0x3a17a0
  3a1458:	2019		mov	r0, #25	; 0x19
  3a145a:	682c		ldr	r4, [r5, #0]
  3a145c:	f055 fed6	bl	0x3f720c	; $IND_CALL
  3a1460:	2005		mov	r0, #5
  3a1462:	f710 fa1c	bl	0x2b189e	; rvf_delay()
  3a1466:	686c		ldr	r4, [r5, #4]
  3a1468:	f055 fed0	bl	0x3f720c	; $IND_CALL
  3a146c:	b002		add	sp, #8
  3a146e:	bd30		pop	{r4, r5, pc}

$Set_Switch_ON_Cause:
  3a1470:	b500		push	{lr}
  3a1472:	f7a7 ff4b	bl	0x34930c
  3a1476:	49cc		ldr	r1, =0x1774cd0	; via 0x3a17a8
  3a1478:	8008		strh	r0, [r1, #0]
  3a147a:	bd00		pop	{pc}

$Switch_ON:
  3a147c:	b5f0		push	{r4, r5, r6, r7, lr}
  3a147e:	b082		sub	sp, #8
  3a1480:	f7a7 ff44	bl	0x34930c	; $ABB_Read_Status
  3a1484:	49c8		ldr	r1, =0x1774cd0	; via 0x3a17a8
  3a1486:	8008		strh	r0, [r1, #0]
  3a1488:	2101		mov	r1, #1
  3a148a:	0902		lsr	r2, r0, #4
  3a148c:	4391		bic	r1, r2
  3a148e:	0609		lsl	r1, r1, #24
  3a1490:	0e0d		lsr	r5, r1, #24
  3a1492:	09c1		lsr	r1, r0, #7
  3a1494:	d309		bcc	0x3a14aa
  3a1496:	2104		mov	r1, #4
  3a1498:	4329		orr	r1, r5
  3a149a:	0609		lsl	r1, r1, #24
  3a149c:	0e0d		lsr	r5, r1, #24
  3a149e:	0840		lsr	r0, r0, #1
  3a14a0:	d303		bcc	0x3a14aa
  3a14a2:	2001		mov	r0, #1
  3a14a4:	4328		orr	r0, r5
  3a14a6:	0600		lsl	r0, r0, #24
  3a14a8:	0e05		lsr	r5, r0, #24
; R5: bit 0 is set if the power button is held down or if
; the ONBSTS bit is set with charging power connected
; bit 2 is set if the charging power is connected
  3a14aa:	4ec0		ldr	r6, =0xfffe1811	; via 0x3a17ac
  3a14ac:	2000		mov	r0, #0
  3a14ae:	5630		ldrsb	r0, [r6, r0]
  3a14b0:	09c0		lsr	r0, r0, #7
  3a14b2:	d308		bcc	0x3a14c6
  3a14b4:	2040		mov	r0, #64	; 0x40
  3a14b6:	2100		mov	r1, #0
  3a14b8:	5671		ldrsb	r1, [r6, r1]
  3a14ba:	4308		orr	r0, r1
  3a14bc:	7030		strb	r0, [r6, #0]
  3a14be:	2008		mov	r0, #8
  3a14c0:	4328		orr	r0, r5
  3a14c2:	0600		lsl	r0, r0, #24
  3a14c4:	0e05		lsr	r5, r0, #24
; bit 3 is set in R5 if an RTC alarm has occurred
; write 0 into ABB VBATREG
  3a14c6:	2001		mov	r0, #1
  3a14c8:	211e		mov	r1, #30	; 0x1e
  3a14ca:	2200		mov	r2, #0
  3a14cc:	f7a7 fe9e	bl	0x34920c	; $ABB_Write_Register_on_page
  3a14d0:	2001		mov	r0, #1
  3a14d2:	f710 f9e4	bl	0x2b189e	; rvf_delay()
  3a14d6:	4fb1		ldr	r7, =0x1774e38	; via 0x3a179c
  3a14d8:	2001		mov	r0, #1
  3a14da:	211e		mov	r1, #30	; 0x1e
  3a14dc:	f7a7 febd	bl	0x34925a	; $ABB_Read_Register_on_page
  3a14e0:	6839		ldr	r1, [r7, #0]
  3a14e2:	8088		strh	r0, [r1, #4]
  3a14e4:	f78c fb00	bl	0x32dae8
  3a14e8:	1c04		add	r4, r0, #0
  3a14ea:	6838		ldr	r0, [r7, #0]
  3a14ec:	1c02		add	r2, r0, #0
  3a14ee:	2106		mov	r1, #6
  3a14f0:	8893		ldrh	r3, [r2, #4]
  3a14f2:	8283		strh	r3, [r0, #20]	; 0x14
  3a14f4:	3002		add	r0, #2
  3a14f6:	3901		sub	r1, #1
  3a14f8:	2900		cmp	r1, #0
  3a14fa:	d1f9		bne	0x3a14f0
; "First bat.voltage (mv):" trace
  3a14fc:	48a9		ldr	r0, =0xa0020	; via 0x3a17a4
  3a14fe:	9000		str	r0, [sp, #0]
  3a1500:	a090		add	r0, pc, #576	; 0x240
  3a1502:	2118		mov	r1, #24	; 0x18
  3a1504:	1c22		add	r2, r4, #0
  3a1506:	2305		mov	r3, #5
  3a1508:	f039 fb94	bl	0x3dac34
; "BatOperationMode =" trace
  3a150c:	48a8		ldr	r0, =0x1774cd4	; via 0x3a17b0
  3a150e:	6802		ldr	r2, [r0, #0]
  3a1510:	48a4		ldr	r0, =0xa0020	; via 0x3a17a4
  3a1512:	9000		str	r0, [sp, #0]
  3a1514:	a092		add	r0, pc, #584	; 0x248
  3a1516:	2113		mov	r1, #19	; 0x13
  3a1518:	2305		mov	r3, #5
  3a151a:	f039 fb8b	bl	0x3dac34
  3a151e:	48a5		ldr	r0, =0x1774b7c	; via 0x3a17b4
  3a1520:	8004		strh	r4, [r0, #0]
  3a1522:	1c20		add	r0, r4, #0
  3a1524:	f78c fd63	bl	0x32dfee
  3a1528:	1c02		add	r2, r0, #0
  3a152a:	48a3		ldr	r0, =0x1774ccc	; via 0x3a17b8
  3a152c:	8002		strh	r2, [r0, #0]
; "First capacity (%):" trace
  3a152e:	489d		ldr	r0, =0xa0020	; via 0x3a17a4
  3a1530:	9000		str	r0, [sp, #0]
  3a1532:	a090		add	r0, pc, #576	; 0x240
  3a1534:	2114		mov	r1, #20	; 0x14
  3a1536:	2305		mov	r3, #5
  3a1538:	f039 fb7c	bl	0x3dac34
  3a153c:	489f		ldr	r0, =0xd2a	; via 0x3a17bc
  3a153e:	4284		cmp	r4, r0
  3a1540:	da03		bge	0x3a154a
  3a1542:	2002		mov	r0, #2
  3a1544:	4328		orr	r0, r5
  3a1546:	0600		lsl	r0, r0, #24
  3a1548:	0e05		lsr	r5, r0, #24
; bit 1 is set in R5 if the battery is critically low
  3a154a:	0928		lsr	r0, r5, #4
  3a154c:	d309		bcc	0x3a1562
  3a154e:	489b		ldr	r0, =0xd2a	; via 0x3a17bc
  3a1550:	4284		cmp	r4, r0
  3a1552:	da06		bge	0x3a1562
  3a1554:	20f7		mov	r0, #247	; 0xf7
  3a1556:	7871		ldrb	r1, [r6, #1]
  3a1558:	4008		and	r0, r1
  3a155a:	7070		strb	r0, [r6, #1]
  3a155c:	f7a8 f98c	bl	0x349878	; $ABB_Power_Off
  3a1560:	e024		b	0x3a15ac
; end of RTC alarm low battery check
; set display backlight to max
  3a1562:	2040		mov	r0, #64	; 0x40
  3a1564:	f03d fe5f	bl	0x3df226
; find the highest set bit in R5
  3a1568:	2107		mov	r1, #7
  3a156a:	2001		mov	r0, #1
  3a156c:	4088		lsl	r0, r1
  3a156e:	4028		and	r0, r5
  3a1570:	0600		lsl	r0, r0, #24
  3a1572:	0e00		lsr	r0, r0, #24
  3a1574:	2800		cmp	r0, #0
  3a1576:	d104		bne	0x3a1582
  3a1578:	1e49		sub	r1, r1, #1
  3a157a:	0409		lsl	r1, r1, #16
  3a157c:	1409		asr	r1, r1, #16
  3a157e:	2900		cmp	r1, #0
  3a1580:	d5f3		bpl	0x3a156a
; end of the find-highest-bit loop
  3a1582:	2200		mov	r2, #0
  3a1584:	2802		cmp	r0, #2
  3a1586:	d000		beq	0x3a158a
  3a1588:	2201		mov	r2, #1
  3a158a:	07e9		lsl	r1, r5, #31
  3a158c:	0fc9		lsr	r1, r1, #31
  3a158e:	4311		orr	r1, r2
  3a1590:	2900		cmp	r1, #0
  3a1592:	d100		bne	0x3a1596
  3a1594:	2000		mov	r0, #0
  3a1596:	08e9		lsr	r1, r5, #3
  3a1598:	d204		bcs	0x3a15a4
; boot path w/o charging power
  3a159a:	f7ff ff1f	bl	0x3a13dc	; $Power_ON_Button
  3a159e:	f012 fa73	bl	0x3b3a88	; $pwr_handle_discharge
  3a15a2:	e003		b	0x3a15ac
; boot path with charging power
  3a15a4:	f7ff ff1a	bl	0x3a13dc	; $Power_ON_Button
  3a15a8:	f000 f805	bl	0x3a15b6	; $PWR_Charger_Plug
  3a15ac:	b002		add	sp, #8
  3a15ae:	bdf0		pop	{r4, r5, r6, r7, pc}

$Power_ON_Remote:
  3a15b0:	4770		bx	lr

$Power_OFF_Remote:
  3a15b2:	4770		bx	lr

$Power_IT_WakeUp:
  3a15b4:	4770		bx	lr

$PWR_Charger_Plug:
  3a15b6:	b500		push	{lr}
  3a15b8:	2132		mov	r1, #50	; 0x32
  3a15ba:	4878		ldr	r0, =0x1774e38	; via 0x3a179c
  3a15bc:	6800		ldr	r0, [r0, #0]
  3a15be:	5c08		ldrb	r0, [r1, r0]
  3a15c0:	2800		cmp	r0, #0
  3a15c2:	d103		bne	0x3a15cc
  3a15c4:	20ff		mov	r0, #255	; 0xff
  3a15c6:	30b2		add	r0, #178	; 0xb2
  3a15c8:	f710 f969	bl	0x2b189e	; rvf_delay()
  3a15cc:	2003		mov	r0, #3
  3a15ce:	f789 fcc9	bl	0x32af64	; $rvf_stop_timer
  3a15d2:	f7f3 fb5d	bl	0x394c90	; $pwr_send_charger_plug_event ?
  3a15d6:	f78c fc1b	bl	0x32de10	; $pwr_get_battery_type
  3a15da:	bd00		pop	{pc}

$PWR_Charger_Unplug:
  3a15dc:	b500		push	{lr}
  3a15de:	b082		sub	sp, #8
  3a15e0:	f7f3 fb8f	bl	0x394d02	; $pwr_send_charger_unplug_event ?
  3a15e4:	486f		ldr	r0, =0xa0020	; via 0x3a17a4
  3a15e6:	9000		str	r0, [sp, #0]
  3a15e8:	a068		add	r0, pc, #416	; 0x1a0
  3a15ea:	210e		mov	r1, #14	; 0xe
  3a15ec:	2200		mov	r2, #0
  3a15ee:	43d2		mvn	r2, r2
  3a15f0:	2305		mov	r3, #5
  3a15f2:	f039 fb1f	bl	0x3dac34
  3a15f6:	4872		ldr	r0, =0x1774cce	; via 0x3a17c0
  3a15f8:	2100		mov	r1, #0
  3a15fa:	7001		strb	r1, [r0, #0]
  3a15fc:	f740 fe77	bl	0x2e22ee
  3a1600:	2032		mov	r0, #50	; 0x32
  3a1602:	4966		ldr	r1, =0x1774e38	; via 0x3a179c
  3a1604:	6809		ldr	r1, [r1, #0]
  3a1606:	5c40		ldrb	r0, [r0, r1]
  3a1608:	2800		cmp	r0, #0
  3a160a:	d00a		beq	0x3a1622
  3a160c:	486d		ldr	r0, =0x1774ccf	; via 0x3a17c4
  3a160e:	7800		ldrb	r0, [r0, #0]
  3a1610:	2800		cmp	r0, #0
  3a1612:	d103		bne	0x3a161c
  3a1614:	486c		ldr	r0, =0x1774cd2	; via 0x3a17c8
  3a1616:	7800		ldrb	r0, [r0, #0]
  3a1618:	2800		cmp	r0, #0
  3a161a:	d102		bne	0x3a1622
  3a161c:	f012 fa34	bl	0x3b3a88	; $pwr_handle_discharge
  3a1620:	e004		b	0x3a162c
  3a1622:	2001		mov	r0, #1
  3a1624:	213c		mov	r1, #60	; 0x3c
  3a1626:	2201		mov	r2, #1
  3a1628:	f7a7 fdf0	bl	0x34920c	; $ABB_Write_Register_on_page
  3a162c:	b002		add	sp, #8
  3a162e:	bd00		pop	{pc}

  3a1630:	4965		ldr	r1, =0x1774cd2	; via 0x3a17c8
  3a1632:	2001		mov	r0, #1
  3a1634:	7008		strb	r0, [r1, #0]
  3a1636:	4770		bx	lr

  3a1638:	4963		ldr	r1, =0x1774cd2	; via 0x3a17c8
  3a163a:	2000		mov	r0, #0
  3a163c:	7008		strb	r0, [r1, #0]
  3a163e:	4770		bx	lr

  3a1640:	b500		push	{lr}
  3a1642:	f7a7 fe63	bl	0x34930c
  3a1646:	0980		lsr	r0, r0, #6
  3a1648:	07c0		lsl	r0, r0, #31
  3a164a:	0fc0		lsr	r0, r0, #31
  3a164c:	0600		lsl	r0, r0, #24
  3a164e:	0e00		lsr	r0, r0, #24
  3a1650:	bd00		pop	{pc}

  3a1652:	b530		push	{r4, r5, lr}
  3a1654:	2800		cmp	r0, #0
  3a1656:	d101		bne	0x3a165c
  3a1658:	203d		mov	r0, #61	; 0x3d
  3a165a:	e000		b	0x3a165e
  3a165c:	203c		mov	r0, #60	; 0x3c
  3a165e:	4d50		ldr	r5, =0x1774e98	; via 0x3a17a0
  3a1660:	682c		ldr	r4, [r5, #0]
  3a1662:	f055 fdd3	bl	0x3f720c	; $IND_CALL
  3a1666:	2005		mov	r0, #5
  3a1668:	f710 f919	bl	0x2b189e	; rvf_delay()
  3a166c:	686c		ldr	r4, [r5, #4]
  3a166e:	f055 fdcd	bl	0x3f720c	; $IND_CALL
  3a1672:	bd30		pop	{r4, r5, pc}

  3a1674:	b500		push	{lr}
  3a1676:	f7a7 fe49	bl	0x34930c
  3a167a:	4a4c		ldr	r2, =0xfffe1811	; via 0x3a17ac
  3a167c:	2100		mov	r1, #0
  3a167e:	5651		ldrsb	r1, [r2, r1]
  3a1680:	4308		orr	r0, r1
  3a1682:	09c0		lsr	r0, r0, #7
  3a1684:	d208		bcs	0x3a1698
  3a1686:	f7a7 fe41	bl	0x34930c
  3a168a:	0940		lsr	r0, r0, #5
  3a168c:	d304		bcc	0x3a1698
  3a168e:	2001		mov	r0, #1
  3a1690:	213c		mov	r1, #60	; 0x3c
  3a1692:	2201		mov	r2, #1
  3a1694:	f7a7 fdba	bl	0x34920c
  3a1698:	bd00		pop	{pc}

  3a169a:	b530		push	{r4, r5, lr}
  3a169c:	b081		sub	sp, #4
  3a169e:	2503		mov	r5, #3
  3a16a0:	4c4a		ldr	r4, =0x536718	; via 0x3a17cc
  3a16a2:	7820		ldrb	r0, [r4, #0]
  3a16a4:	280a		cmp	r0, #10	; 0xa
  3a16a6:	d005		beq	0x3a16b4
  3a16a8:	2850		cmp	r0, #80	; 0x50
  3a16aa:	d134		bne	0x3a1716
  3a16ac:	4669		mov	r1, sp
  3a16ae:	2079		mov	r0, #121	; 0x79
  3a16b0:	8048		strh	r0, [r1, #2]
  3a16b2:	e002		b	0x3a16ba
  3a16b4:	4668		mov	r0, sp
  3a16b6:	2141		mov	r1, #65	; 0x41
  3a16b8:	8041		strh	r1, [r0, #2]
  3a16ba:	2001		mov	r0, #1
  3a16bc:	2138		mov	r1, #56	; 0x38
  3a16be:	466a		mov	r2, sp
  3a16c0:	8852		ldrh	r2, [r2, #2]
  3a16c2:	f7a7 fda3	bl	0x34920c
  3a16c6:	4842		ldr	r0, =0x4c4b40	; via 0x3a17d0
  3a16c8:	f041 fc09	bl	0x3e2ede
  3a16cc:	f041 fc81	bl	0x3e2fd2
  3a16d0:	2001		mov	r0, #1
  3a16d2:	2128		mov	r1, #40	; 0x28
  3a16d4:	2200		mov	r2, #0
  3a16d6:	f7a7 fd99	bl	0x34920c
  3a16da:	483d		ldr	r0, =0x4c4b40	; via 0x3a17d0
  3a16dc:	f041 fbff	bl	0x3e2ede
  3a16e0:	f041 fc77	bl	0x3e2fd2
  3a16e4:	2001		mov	r0, #1
  3a16e6:	2138		mov	r1, #56	; 0x38
  3a16e8:	2201		mov	r2, #1
  3a16ea:	f7a7 fd8f	bl	0x34920c
  3a16ee:	2001		mov	r0, #1
  3a16f0:	2128		mov	r1, #40	; 0x28
  3a16f2:	f7a7 fdb2	bl	0x34925a
  3a16f6:	4669		mov	r1, sp
  3a16f8:	8008		strh	r0, [r1, #0]
  3a16fa:	4668		mov	r0, sp
  3a16fc:	8800		ldrh	r0, [r0, #0]
  3a16fe:	8861		ldrh	r1, [r4, #2]
  3a1700:	4288		cmp	r0, r1
  3a1702:	db08		blt	0x3a1716
  3a1704:	4668		mov	r0, sp
  3a1706:	8801		ldrh	r1, [r0, #0]
  3a1708:	88a0		ldrh	r0, [r4, #4]
  3a170a:	4281		cmp	r1, r0
  3a170c:	dc03		bgt	0x3a1716
  3a170e:	4828		ldr	r0, =0x1774cd4	; via 0x3a17b0
  3a1710:	68a1		ldr	r1, [r4, #8]
  3a1712:	6001		str	r1, [r0, #0]
  3a1714:	e006		b	0x3a1724
  3a1716:	340c		add	r4, #12	; 0xc
  3a1718:	3d01		sub	r5, #1
  3a171a:	2d00		cmp	r5, #0
  3a171c:	d1c1		bne	0x3a16a2
  3a171e:	4924		ldr	r1, =0x1774cd4	; via 0x3a17b0
  3a1720:	2001		mov	r0, #1
  3a1722:	6008		str	r0, [r1, #0]
  3a1724:	b001		add	sp, #4
  3a1726:	bd30		pop	{r4, r5, pc}

  3a1728:	4821		ldr	r0, =0x1774cd4	; via 0x3a17b0
  3a172a:	6800		ldr	r0, [r0, #0]
  3a172c:	4770		bx	lr
  3a172e:	46c0		nop			(mov r8, r8)

  3b40a6:	488c		ldr	r0, =0x1774db0	; via 0x3b42d8
  3b40a8:	6800		ldr	r0, [r0, #0]
  3b40aa:	4770		bx	lr

$Init_Target:
  3bb7d4:	b570		push	{r4, r5, r6, lr}
  3bb7d6:	b081		sub	sp, #4
  3bb7d8:	4c96		ldr	r4, =0xfffef008	; via 0x3bba34
  3bb7da:	4897		ldr	r0, =0x6050	; via 0x3bba38
  3bb7dc:	8020		strh	r0, [r4, #0]
  3bb7de:	f025 ffed	bl	0x3e17bc	; $TM_DisableWatchdog
  3bb7e2:	4896		ldr	r0, =0xfffffd02	; via 0x3bba3c
  3bb7e4:	2105		mov	r1, #5
  3bb7e6:	8802		ldrh	r2, [r0, #0]
  3bb7e8:	4311		orr	r1, r2
  3bb7ea:	8001		strh	r1, [r0, #0]
  3bb7ec:	4994		ldr	r1, =0xff3f	; via 0x3bba40
  3bb7ee:	8802		ldrh	r2, [r0, #0]
  3bb7f0:	4011		and	r1, r2
  3bb7f2:	8001		strh	r1, [r0, #0]
  3bb7f4:	2180		mov	r1, #128	; 0x80
  3bb7f6:	8802		ldrh	r2, [r0, #0]
  3bb7f8:	4311		orr	r1, r2
  3bb7fa:	8001		strh	r1, [r0, #0]
  3bb7fc:	4991		ldr	r1, =0xffdf	; via 0x3bba44
  3bb7fe:	8802		ldrh	r2, [r0, #0]
  3bb800:	4011		and	r1, r2
  3bb802:	8001		strh	r1, [r0, #0]
  3bb804:	4e90		ldr	r6, =0xfffff900	; via 0x3bba48
  3bb806:	20ff		mov	r0, #255	; 0xff
  3bb808:	0200		lsl	r0, r0, #8
  3bb80a:	8030		strh	r0, [r6, #0]
  3bb80c:	4d8f		ldr	r5, =0xffff9800	; via 0x3bba4c
  3bb80e:	4890		ldr	r0, =0xfff3	; via 0x3bba50
  3bb810:	8829		ldrh	r1, [r5, #0]
  3bb812:	4008		and	r0, r1
  3bb814:	8028		strh	r0, [r5, #0]
  3bb816:	8828		ldrh	r0, [r5, #0]
  3bb818:	8028		strh	r0, [r5, #0]
  3bb81a:	488e		ldr	r0, =0xf01f	; via 0x3bba54
  3bb81c:	8829		ldrh	r1, [r5, #0]
  3bb81e:	4008		and	r0, r1
  3bb820:	8028		strh	r0, [r5, #0]
  3bb822:	2001		mov	r0, #1
  3bb824:	0280		lsl	r0, r0, #10
  3bb826:	8829		ldrh	r1, [r5, #0]
  3bb828:	4308		orr	r0, r1
  3bb82a:	8028		strh	r0, [r5, #0]
  3bb82c:	2000		mov	r0, #0
  3bb82e:	2102		mov	r1, #2
  3bb830:	2200		mov	r2, #0
  3bb832:	f027 fb45	bl	0x3e2ec0	; $CLKM_InitARMClock
  3bb836:	4988		ldr	r1, =0xfffffb00	; via 0x3bba58
  3bb838:	20a4		mov	r0, #164	; 0xa4
  3bb83a:	8008		strh	r0, [r1, #0]
  3bb83c:	8048		strh	r0, [r1, #2]
  3bb83e:	22a5		mov	r2, #165	; 0xa5
  3bb840:	808a		strh	r2, [r1, #4]
  3bb842:	80c8		strh	r0, [r1, #6]
  3bb844:	20a7		mov	r0, #167	; 0xa7
  3bb846:	8148		strh	r0, [r1, #10]	; 0xa
  3bb848:	20c0		mov	r0, #192	; 0xc0
  3bb84a:	8188		strh	r0, [r1, #12]	; 0xc
  3bb84c:	2040		mov	r0, #64	; 0x40
  3bb84e:	8108		strh	r0, [r1, #8]
  3bb850:	2020		mov	r0, #32	; 0x20
  3bb852:	8070		strh	r0, [r6, #2]
  3bb854:	2000		mov	r0, #0
  3bb856:	80b0		strh	r0, [r6, #4]
  3bb858:	2010		mov	r0, #16	; 0x10
  3bb85a:	8829		ldrh	r1, [r5, #0]
  3bb85c:	4308		orr	r0, r1
  3bb85e:	8028		strh	r0, [r5, #0]
  3bb860:	487e		ldr	r0, =0xfffffa08	; via 0x3bba5c
  3bb862:	497f		ldr	r1, =0xffff	; via 0x3bba60
  3bb864:	8001		strh	r1, [r0, #0]
  3bb866:	8041		strh	r1, [r0, #2]
  3bb868:	2103		mov	r1, #3
  3bb86a:	8181		strh	r1, [r0, #12]	; 0xc
  3bb86c:	f024 f9be	bl	0x3dfbec	; $IQ_SetupInterrupts
  3bb870:	487c		ldr	r0, =0xfffffc00	; via 0x3bba64
  3bb872:	2124		mov	r1, #36	; 0x24
  3bb874:	8001		strh	r1, [r0, #0]
  3bb876:	210d		mov	r1, #13	; 0xd
  3bb878:	8041		strh	r1, [r0, #2]
  3bb87a:	2500		mov	r5, #0
  3bb87c:	487a		ldr	r0, =0xfffe2016	; via 0x3bba68
  3bb87e:	8005		strh	r5, [r0, #0]
  3bb880:	497a		ldr	r1, =0xfffe2014	; via 0x3bba6c
  3bb882:	2002		mov	r0, #2
  3bb884:	8008		strh	r0, [r1, #0]
  3bb886:	497a		ldr	r1, =0xfffe2002	; via 0x3bba70
  3bb888:	2084		mov	r0, #132	; 0x84
  3bb88a:	8008		strh	r0, [r1, #0]
  3bb88c:	4979		ldr	r1, =0xfffe2000	; via 0x3bba74
  3bb88e:	487a		ldr	r0, =0x3de0	; via 0x3bba78
  3bb890:	8008		strh	r0, [r1, #0]
  3bb892:	4a7a		ldr	r2, =0xfffe2022	; via 0x3bba7c
  3bb894:	200a		mov	r0, #10	; 0xa
  3bb896:	8010		strh	r0, [r2, #0]	; DIFF!
  3bb898:	4879		ldr	r0, =0xfffe2020	; via 0x3bba80
  3bb89a:	4a7a		ldr	r2, =0x45a	; via 0x3bba84
  3bb89c:	8002		strh	r2, [r0, #0]
  3bb89e:	4a7a		ldr	r2, =0xfffe201e	; via 0x3bba88
  3bb8a0:	20ff		mov	r0, #255	; 0xff
  3bb8a2:	304b		add	r0, #75	; 0x4b
  3bb8a4:	8010		strh	r0, [r2, #0]	; DIFF!
  3bb8a6:	4879		ldr	r0, =0xfffe201c	; via 0x3bba8c
  3bb8a8:	221f		mov	r2, #31	; 0x1f
  3bb8aa:	8002		strh	r2, [r0, #0]
  3bb8ac:	4878		ldr	r0, =0xfffe2024	; via 0x3bba90
  3bb8ae:	8005		strh	r5, [r0, #0]
  3bb8b0:	4a78		ldr	r2, =0xfffe2010	; via 0x3bba94
  3bb8b2:	2002		mov	r0, #2
  3bb8b4:	8813		ldrh	r3, [r2, #0]
  3bb8b6:	4318		orr	r0, r3
  3bb8b8:	8010		strh	r0, [r2, #0]
  3bb8ba:	2004		mov	r0, #4
  3bb8bc:	8813		ldrh	r3, [r2, #0]
  3bb8be:	4318		orr	r0, r3
  3bb8c0:	8010		strh	r0, [r2, #0]
  3bb8c2:	2027		mov	r0, #39	; 0x27
  3bb8c4:	80a0		strh	r0, [r4, #4]
  3bb8c6:	8a08		ldrh	r0, [r1, #16]	; 0x10
  3bb8c8:	0840		lsr	r0, r0, #1
  3bb8ca:	d30f		bcc	0x3bb8ec
  3bb8cc:	8a08		ldrh	r0, [r1, #16]	; 0x10
  3bb8ce:	0400		lsl	r0, r0, #16
  3bb8d0:	0c40		lsr	r0, r0, #17
  3bb8d2:	0040		lsl	r0, r0, #1
  3bb8d4:	8208		strh	r0, [r1, #16]	; 0x10
  3bb8d6:	2001		mov	r0, #1
  3bb8d8:	e001		b	0x3bb8de
  3bb8da:	9800		ldr	r0, [sp, #0]
  3bb8dc:	3001		add	r0, #1
  3bb8de:	9000		str	r0, [sp, #0]
  3bb8e0:	9800		ldr	r0, [sp, #0]
  3bb8e2:	2832		cmp	r0, #50	; 0x32
  3bb8e4:	d3f9		bcc	0x3bb8da
  3bb8e6:	8a48		ldrh	r0, [r1, #18]	; 0x12
  3bb8e8:	2800		cmp	r0, #0
  3bb8ea:	d0fc		beq	0x3bb8e6
  3bb8ec:	f027 fbcd	bl	0x3e308a	; $AI_ClockEnable
  3bb8f0:	f027 fbd1	bl	0x3e3096	; $AI_InitIOConfig
  3bb8f4:	2027		mov	r0, #39	; 0x27
  3bb8f6:	0500		lsl	r0, r0, #20
  3bb8f8:	8005		strh	r5, [r0, #0]
  3bb8fa:	2001		mov	r0, #1
  3bb8fc:	f025 ff6c	bl	0x3e17d8	; $TM_EnableTimer
  3bb900:	2002		mov	r0, #2
  3bb902:	f025 ff69	bl	0x3e17d8	; $TM_EnableTimer
  3bb906:	b001		add	sp, #4
  3bb908:	bd70		pop	{r4, r5, r6, pc}

; The following code is a different version of Init_Target(),
; but does not seem to be used, probably defunct but still-compiled
; code in init.c in between the functional Init_Target() and the
; normally-following Init_Drivers().

  3bb90a:	b570		push	{r4, r5, r6, lr}
  3bb90c:	4d49		ldr	r5, =0xfffef008	; via 0x3bba34
  3bb90e:	4862		ldr	r0, =0x6040	; via 0x3bba98
  3bb910:	8028		strh	r0, [r5, #0]
  3bb912:	f025 ff53	bl	0x3e17bc	; $TM_DisableWatchdog
  3bb916:	4849		ldr	r0, =0xfffffd02	; via 0x3bba3c
  3bb918:	2105		mov	r1, #5
  3bb91a:	8802		ldrh	r2, [r0, #0]
  3bb91c:	4311		orr	r1, r2
  3bb91e:	8001		strh	r1, [r0, #0]
  3bb920:	4947		ldr	r1, =0xff3f	; via 0x3bba40
  3bb922:	8802		ldrh	r2, [r0, #0]
  3bb924:	4011		and	r1, r2
  3bb926:	8001		strh	r1, [r0, #0]
  3bb928:	2180		mov	r1, #128	; 0x80
  3bb92a:	8802		ldrh	r2, [r0, #0]
  3bb92c:	4311		orr	r1, r2
  3bb92e:	8001		strh	r1, [r0, #0]
  3bb930:	4e45		ldr	r6, =0xfffff900	; via 0x3bba48
  3bb932:	20ff		mov	r0, #255	; 0xff
  3bb934:	0200		lsl	r0, r0, #8
  3bb936:	8030		strh	r0, [r6, #0]
  3bb938:	4c44		ldr	r4, =0xffff9800	; via 0x3bba4c
  3bb93a:	4845		ldr	r0, =0xfff3	; via 0x3bba50
  3bb93c:	8821		ldrh	r1, [r4, #0]
  3bb93e:	4008		and	r0, r1
  3bb940:	8020		strh	r0, [r4, #0]
  3bb942:	8820		ldrh	r0, [r4, #0]
  3bb944:	8020		strh	r0, [r4, #0]
  3bb946:	4843		ldr	r0, =0xf01f	; via 0x3bba54
  3bb948:	8821		ldrh	r1, [r4, #0]
  3bb94a:	4008		and	r0, r1
  3bb94c:	8020		strh	r0, [r4, #0]
  3bb94e:	2001		mov	r0, #1
  3bb950:	0280		lsl	r0, r0, #10
  3bb952:	8821		ldrh	r1, [r4, #0]
  3bb954:	4308		orr	r0, r1
  3bb956:	8020		strh	r0, [r4, #0]
  3bb958:	2000		mov	r0, #0
  3bb95a:	2102		mov	r1, #2
  3bb95c:	2200		mov	r2, #0
  3bb95e:	f027 faaf	bl	0x3e2ec0	; $CLKM_InitARMClock
  3bb962:	4a3d		ldr	r2, =0xfffffb00	; via 0x3bba58
  3bb964:	20a4		mov	r0, #164	; 0xa4
  3bb966:	8010		strh	r0, [r2, #0]
  3bb968:	8050		strh	r0, [r2, #2]
  3bb96a:	2185		mov	r1, #133	; 0x85
  3bb96c:	8091		strh	r1, [r2, #4]
  3bb96e:	80d0		strh	r0, [r2, #6]
  3bb970:	20a7		mov	r0, #167	; 0xa7
  3bb972:	8150		strh	r0, [r2, #10]	; 0xa
  3bb974:	20c0		mov	r0, #192	; 0xc0
  3bb976:	8190		strh	r0, [r2, #12]	; 0xc
  3bb978:	2040		mov	r0, #64	; 0x40
  3bb97a:	8110		strh	r0, [r2, #8]
  3bb97c:	2020		mov	r0, #32	; 0x20
  3bb97e:	8070		strh	r0, [r6, #2]
  3bb980:	2000		mov	r0, #0
  3bb982:	80b0		strh	r0, [r6, #4]
  3bb984:	2010		mov	r0, #16	; 0x10
  3bb986:	8821		ldrh	r1, [r4, #0]
  3bb988:	4308		orr	r0, r1
  3bb98a:	8020		strh	r0, [r4, #0]
  3bb98c:	f027 fb76	bl	0x3e307c
  3bb990:	2001		mov	r0, #1
  3bb992:	f027 fb50	bl	0x3e3036
  3bb996:	4841		ldr	r0, =0xfffd	; via 0x3bba9c
  3bb998:	8829		ldrh	r1, [r5, #0]
  3bb99a:	4008		and	r0, r1
  3bb99c:	8028		strh	r0, [r5, #0]
  3bb99e:	2001		mov	r0, #1
  3bb9a0:	f027 fb50	bl	0x3e3044
  3bb9a4:	2004		mov	r0, #4
  3bb9a6:	f027 fb46	bl	0x3e3036
  3bb9aa:	2000		mov	r0, #0
  3bb9ac:	f027 fb2e	bl	0x3e300c
  3bb9b0:	2004		mov	r0, #4
  3bb9b2:	f027 fb47	bl	0x3e3044
  3bb9b6:	2007		mov	r0, #7
  3bb9b8:	f027 fb36	bl	0x3e3028
  3bb9bc:	2003		mov	r0, #3
  3bb9be:	f027 fb25	bl	0x3e300c
  3bb9c2:	2007		mov	r0, #7
  3bb9c4:	f027 fb3e	bl	0x3e3044
  3bb9c8:	bd70		pop	{r4, r5, r6, pc}

$Init_Drivers:
  3bb9ca:	b500		push	{lr}
  3bb9cc:	f78d fc0f	bl	0x3491ee	; $ABB_Sem_Create
  3bb9d0:	f5a6 fa25	bl	0x161e1e
  3bb9d4:	f7ad fda3	bl	0x36951e
  3bb9d8:	f039 fb95	bl	0x3f5106
  3bb9dc:	f6f5 f927	bl	0x2b0c2e
  3bb9e0:	f720 fb16	bl	0x2dc010
  3bb9e4:	f7bc fa46	bl	0x377e74
  3bb9e8:	f6ca fcfa	bl	0x2863e0
  3bb9ec:	f001 fd3b	bl	0x3bd466
  3bb9f0:	bd00		pop	{pc}

$Init_Serial_Flows:
  3bb9f2:	b500		push	{lr}
  3bb9f4:	482a		ldr	r0, =0x1773764	; via 0x3bbaa0
  3bb9f6:	f793 fb8f	bl	0x34f118	; $SER_InitSerialConfig
  3bb9fa:	2000		mov	r0, #0
  3bb9fc:	2103		mov	r1, #3
  3bb9fe:	2200		mov	r2, #0
  3bba00:	f793 fc2b	bl	0x34f25a	; $SER_tr_Init
  3bba04:	f793 fc85	bl	0x34f312	; $SER_fd_Initialize
  3bba08:	bd00		pop	{pc}

$Init_Unmask_IT:
  3bba0a:	b500		push	{lr}
  3bba0c:	f484 fc59	bl	0x402c2		; $INT_DisableIRQ
  3bba10:	2004		mov	r0, #4
  3bba12:	f024 f94c	bl	0x3dfcae	; $IQ_Unmask
  3bba16:	2012		mov	r0, #18	; 0x12
  3bba18:	f024 f949	bl	0x3dfcae	; $IQ_Unmask
  3bba1c:	2007		mov	r0, #7
  3bba1e:	f024 f946	bl	0x3dfcae	; $IQ_Unmask
  3bba22:	2008		mov	r0, #8
  3bba24:	f024 f943	bl	0x3dfcae	; $IQ_Unmask
  3bba28:	200f		mov	r0, #15	; 0xf
  3bba2a:	f024 f940	bl	0x3dfcae	; $IQ_Unmask
  3bba2e:	f484 fc2d	bl	0x4028c		; $INT_EnableIRQ
  3bba32:	bd00		pop	{pc}

$spi_get_info:
; perfect match to TCS211 version
  3cd72c:	b500		push	{lr}
  3cd72e:	b081		sub	sp, #4
  3cd730:	9000		str	r0, [sp, #0]
  3cd732:	9900		ldr	r1, [sp, #0]
  3cd734:	2003		mov	r0, #3
  3cd736:	6008		str	r0, [r1, #0]
  3cd738:	9800		ldr	r0, [sp, #0]
  3cd73a:	497e		ldr	r1, =0xa0010	; via 0x3cd934
  3cd73c:	6101		str	r1, [r0, #16]	; 0x10
  3cd73e:	9800		ldr	r0, [sp, #0]
  3cd740:	3004		add	r0, #4
  3cd742:	a153		add	r1, pc, #332	; 0x14c
  3cd744:	2204		mov	r2, #4
  3cd746:	f029 fd79	bl	0x3f723c	; memcpy()
  3cd74a:	9900		ldr	r1, [sp, #0]
  3cd74c:	207d		mov	r0, #125	; 0x7d
  3cd74e:	00c0		lsl	r0, r0, #3
  3cd750:	8288		strh	r0, [r1, #20]	; 0x14
  3cd752:	9900		ldr	r1, [sp, #0]
  3cd754:	2027		mov	r0, #39	; 0x27
  3cd756:	7588		strb	r0, [r1, #22]	; 0x16
  3cd758:	9900		ldr	r1, [sp, #0]
  3cd75a:	2001		mov	r0, #1
  3cd75c:	7708		strb	r0, [r1, #28]	; 0x1c
  3cd75e:	9800		ldr	r0, [sp, #0]
  3cd760:	3020		add	r0, #32	; 0x20
  3cd762:	a14c		add	r1, pc, #304	; 0x130
  3cd764:	2209		mov	r2, #9
  3cd766:	f029 fd69	bl	0x3f723c	; memcpy()
  3cd76a:	9900		ldr	r1, [sp, #0]
  3cd76c:	20ff		mov	r0, #255	; 0xff
  3cd76e:	3001		add	r0, #1
  3cd770:	62c8		str	r0, [r1, #44]	; 0x2c
  3cd772:	9900		ldr	r1, [sp, #0]
  3cd774:	20c8		mov	r0, #200	; 0xc8
  3cd776:	6308		str	r0, [r1, #48]	; 0x30
  3cd778:	205c		mov	r0, #92	; 0x5c
  3cd77a:	9900		ldr	r1, [sp, #0]
  3cd77c:	2200		mov	r2, #0
  3cd77e:	5442		strb	r2, [r0, r1]
; spi_set_info
  3cd780:	2090		mov	r0, #144	; 0x90
  3cd782:	9900		ldr	r1, [sp, #0]
  3cd784:	4a6c		ldr	r2, =0x3cd7bd	; via 0x3cd938
  3cd786:	5042		str	r2, [r0, r1]
; spi_init
  3cd788:	2094		mov	r0, #148	; 0x94
  3cd78a:	9900		ldr	r1, [sp, #0]
  3cd78c:	4a6b		ldr	r2, =0x3cd883	; via 0x3cd93c
  3cd78e:	5042		str	r2, [r0, r1]
; spi_core
  3cd790:	2098		mov	r0, #152	; 0x98
  3cd792:	9900		ldr	r1, [sp, #0]
  3cd794:	4a6a		ldr	r2, =0x3e8ca1	; via 0x3cd940
  3cd796:	5042		str	r2, [r0, r1]
; spi_stop
  3cd798:	209c		mov	r0, #156	; 0x9c
  3cd79a:	9900		ldr	r1, [sp, #0]
  3cd79c:	4a69		ldr	r2, =0x3cd887	; via 0x3cd944
  3cd79e:	5042		str	r2, [r0, r1]
; spi_kill
  3cd7a0:	20a0		mov	r0, #160	; 0xa0
  3cd7a2:	9900		ldr	r1, [sp, #0]
  3cd7a4:	4a68		ldr	r2, =0x3cd88b	; via 0x3cd948
  3cd7a6:	5042		str	r2, [r0, r1]
  3cd7a8:	208c		mov	r0, #140	; 0x8c
  3cd7aa:	9900		ldr	r1, [sp, #0]
  3cd7ac:	2200		mov	r2, #0
  3cd7ae:	5042		str	r2, [r0, r1]
  3cd7b0:	2188		mov	r1, #136	; 0x88
  3cd7b2:	9a00		ldr	r2, [sp, #0]
  3cd7b4:	2000		mov	r0, #0
  3cd7b6:	5488		strb	r0, [r1, r2]
  3cd7b8:	b001		add	sp, #4
  3cd7ba:	bd00		pop	{pc}

T_SPI_GBL_INFO structure:

0x00:	prim_id like in TCS211
0x02:	addr_id (ditto)
0x04:	adc_result[8] array (ditto)
0x14:	array of 6 16-bit words storing consecutive VBAT ADC readings
0x2E:	16-bit var write pointer for the array at offset 0x14
0x32:	assumed is_gsm_on
0x33:	assumed is_adc_on
0x34:	assumed SpiTaskReady

$spi_set_info:
  3cd7bc:	b500		push	{lr}
  3cd7be:	b088		sub	sp, #32	; 0x20
  3cd7c0:	9305		str	r3, [sp, #20]	; 0x14
  3cd7c2:	9204		str	r2, [sp, #16]	; 0x10
  3cd7c4:	9103		str	r1, [sp, #12]	; 0xc
  3cd7c6:	4669		mov	r1, sp
  3cd7c8:	7208		strb	r0, [r1, #8]
  3cd7ca:	485a		ldr	r0, =0xa0010	; via 0x3cd934
  3cd7cc:	9000		str	r0, [sp, #0]
  3cd7ce:	a034		add	r0, pc, #208	; 0xd0
  3cd7d0:	213e		mov	r1, #62	; 0x3e
  3cd7d2:	2200		mov	r2, #0
  3cd7d4:	43d2		mvn	r2, r2
  3cd7d6:	2305		mov	r3, #5
  3cd7d8:	f00d fa2c	bl	0x3dac34	; rvf_send_trace()
  3cd7dc:	9804		ldr	r0, [sp, #16]	; 0x10
  3cd7de:	8800		ldrh	r0, [r0, #0]
; struct allocation size differs from TCS211
  3cd7e0:	2138		mov	r1, #56	; 0x38
  3cd7e2:	4a5a		ldr	r2, =0x1774e38	; via 0x3cd94c
  3cd7e4:	f5f7 f8f0	bl	0x1c49c8	; rvf_get_buf()
  3cd7e8:	9006		str	r0, [sp, #24]	; 0x18
  3cd7ea:	9806		ldr	r0, [sp, #24]	; 0x18
  3cd7ec:	2802		cmp	r0, #2
  3cd7ee:	d10b		bne	0x3cd808
  3cd7f0:	4850		ldr	r0, =0xa0010	; via 0x3cd934
  3cd7f2:	9000		str	r0, [sp, #0]
  3cd7f4:	a03a		add	r0, pc, #232	; 0xe8
  3cd7f6:	2150		mov	r1, #80	; 0x50
  3cd7f8:	2200		mov	r2, #0
  3cd7fa:	43d2		mvn	r2, r2
  3cd7fc:	2301		mov	r3, #1
  3cd7fe:	f00d fa19	bl	0x3dac34	; rvf_send_trace()
  3cd802:	2004		mov	r0, #4
  3cd804:	43c0		mvn	r0, r0
  3cd806:	e03a		b	0x3cd87e
  3cd808:	4951		ldr	r1, =0x1774e3c	; via 0x3cd950
  3cd80a:	9805		ldr	r0, [sp, #20]	; 0x14
  3cd80c:	6008		str	r0, [r1, #0]
  3cd80e:	484f		ldr	r0, =0x1774e38	; via 0x3cd94c
  3cd810:	6801		ldr	r1, [r0, #0]
  3cd812:	9804		ldr	r0, [sp, #16]	; 0x10
  3cd814:	8800		ldrh	r0, [r0, #0]
  3cd816:	8008		strh	r0, [r1, #0]
  3cd818:	484c		ldr	r0, =0x1774e38	; via 0x3cd94c
  3cd81a:	6801		ldr	r1, [r0, #0]
  3cd81c:	4668		mov	r0, sp
  3cd81e:	7a00		ldrb	r0, [r0, #8]
  3cd820:	7088		strb	r0, [r1, #2]
  3cd822:	4669		mov	r1, sp
  3cd824:	2000		mov	r0, #0
  3cd826:	8388		strh	r0, [r1, #28]	; 0x1c
  3cd828:	4668		mov	r0, sp
  3cd82a:	8b80		ldrh	r0, [r0, #28]	; 0x1c
  3cd82c:	2808		cmp	r0, #8
  3cd82e:	da10		bge	0x3cd852
  3cd830:	4668		mov	r0, sp
  3cd832:	8b80		ldrh	r0, [r0, #28]	; 0x1c
  3cd834:	0040		lsl	r0, r0, #1
  3cd836:	4945		ldr	r1, =0x1774e38	; via 0x3cd94c
  3cd838:	6809		ldr	r1, [r1, #0]
  3cd83a:	1840		add	r0, r0, r1
  3cd83c:	2100		mov	r1, #0
  3cd83e:	8081		strh	r1, [r0, #4]
  3cd840:	4669		mov	r1, sp
  3cd842:	4668		mov	r0, sp
  3cd844:	8b80		ldrh	r0, [r0, #28]	; 0x1c
  3cd846:	3001		add	r0, #1
  3cd848:	8388		strh	r0, [r1, #28]	; 0x1c
  3cd84a:	4668		mov	r0, sp
  3cd84c:	8b80		ldrh	r0, [r0, #28]	; 0x1c
  3cd84e:	2808		cmp	r0, #8
  3cd850:	dbee		blt	0x3cd830
; the following 3 half-word writes do not correspond to TI's original version
; they must be Pirelli/Foxconn's additions
  3cd852:	483e		ldr	r0, =0x1774e38	; via 0x3cd94c
  3cd854:	6800		ldr	r0, [r0, #0]
  3cd856:	2100		mov	r1, #0
  3cd858:	85c1		strh	r1, [r0, #46]	; 0x2e
  3cd85a:	483c		ldr	r0, =0x1774e38	; via 0x3cd94c
  3cd85c:	6801		ldr	r1, [r0, #0]
  3cd85e:	2000		mov	r0, #0
  3cd860:	8608		strh	r0, [r1, #48]	; 0x30
  3cd862:	483a		ldr	r0, =0x1774e38	; via 0x3cd94c
  3cd864:	6801		ldr	r1, [r0, #0]
  3cd866:	2000		mov	r0, #0
  3cd868:	8588		strh	r0, [r1, #44]	; 0x2c
; the following two byte writes probably correspond to the clearing
; of is_gsm_on and SpiTaskReady members in TI's original version
  3cd86a:	2232		mov	r2, #50	; 0x32
  3cd86c:	4837		ldr	r0, =0x1774e38	; via 0x3cd94c
  3cd86e:	6800		ldr	r0, [r0, #0]
  3cd870:	2100		mov	r1, #0
  3cd872:	5411		strb	r1, [r2, r0]
  3cd874:	2134		mov	r1, #52	; 0x34
  3cd876:	4835		ldr	r0, =0x1774e38	; via 0x3cd94c
  3cd878:	6802		ldr	r2, [r0, #0]
  3cd87a:	2000		mov	r0, #0
  3cd87c:	5488		strb	r0, [r1, r2]
  3cd87e:	b008		add	sp, #32	; 0x20
  3cd880:	bd00		pop	{pc}

$spi_init:
  3cd882:	2000		mov	r0, #0
  3cd884:	4770		bx	lr

$spi_stop:
  3cd886:	2000		mov	r0, #0
  3cd888:	4770		bx	lr

$spi_kill:
  3cd88a:	2000		mov	r0, #0
  3cd88c:	4770		bx	lr
  3cd88e:	46c0		nop			(mov r8, r8)

$pwr_get_info:
; perfect match to TI's original
  3cd954:	b530		push	{r4, r5, lr}
  3cd956:	1c04		add	r4, r0, #0
  3cd958:	2000		mov	r0, #0
  3cd95a:	6020		str	r0, [r4, #0]
  3cd95c:	487a		ldr	r0, =0xa0020	; via 0x3cdb48
  3cd95e:	6120		str	r0, [r4, #16]	; 0x10
  3cd960:	2004		mov	r0, #4
  3cd962:	1900		add	r0, r0, r4
  3cd964:	a14f		add	r1, pc, #316	; 0x13c
  3cd966:	2204		mov	r2, #4
  3cd968:	f029 fc68	bl	0x3f723c	; memcpy()
  3cd96c:	2188		mov	r1, #136	; 0x88
  3cd96e:	2000		mov	r0, #0
  3cd970:	5108		str	r0, [r1, r4]
  3cd972:	2084		mov	r0, #132	; 0x84
  3cd974:	2100		mov	r1, #0
  3cd976:	5501		strb	r1, [r0, r4]
  3cd978:	2501		mov	r5, #1
  3cd97a:	7625		strb	r5, [r4, #24]	; 0x18
  3cd97c:	201c		mov	r0, #28	; 0x1c
  3cd97e:	1900		add	r0, r0, r4
  3cd980:	a149		add	r1, pc, #292	; 0x124
  3cd982:	2209		mov	r2, #9
  3cd984:	f029 fc5a	bl	0x3f723c	; memcpy()
  3cd988:	207d		mov	r0, #125	; 0x7d
  3cd98a:	00c0		lsl	r0, r0, #3
  3cd98c:	62a0		str	r0, [r4, #40]	; 0x28
  3cd98e:	2019		mov	r0, #25	; 0x19
  3cd990:	0140		lsl	r0, r0, #5
  3cd992:	62e0		str	r0, [r4, #44]	; 0x2c
  3cd994:	2058		mov	r0, #88	; 0x58
  3cd996:	5505		strb	r5, [r0, r4]
  3cd998:	486c		ldr	r0, =0xa0010	; via 0x3cdb4c
  3cd99a:	65e0		str	r0, [r4, #92]	; 0x5c
  3cd99c:	208c		mov	r0, #140	; 0x8c
  3cd99e:	496c		ldr	r1, =0x3cd9bf	; via 0x3cdb50
  3cd9a0:	5101		str	r1, [r0, r4]
  3cd9a2:	2090		mov	r0, #144	; 0x90
  3cd9a4:	496b		ldr	r1, =0x3cda8b	; via 0x3cdb54
  3cd9a6:	5101		str	r1, [r0, r4]
  3cd9a8:	2094		mov	r0, #148	; 0x94
  3cd9aa:	496b		ldr	r1, =0x3cda8f	; via 0x3cdb58
  3cd9ac:	5101		str	r1, [r0, r4]
  3cd9ae:	2098		mov	r0, #152	; 0x98
  3cd9b0:	496a		ldr	r1, =0x3cda93	; via 0x3cdb5c
  3cd9b2:	5101		str	r1, [r0, r4]
  3cd9b4:	219c		mov	r1, #156	; 0x9c
  3cd9b6:	486a		ldr	r0, =0x3cda97	; via 0x3cdb60
  3cd9b8:	5108		str	r0, [r1, r4]
  3cd9ba:	2000		mov	r0, #0
  3cd9bc:	bd30		pop	{r4, r5, pc}

$pwr_set_info:
  3cd9be:	b570		push	{r4, r5, r6, lr}
  3cd9c0:	b082		sub	sp, #8
  3cd9c2:	1c1d		add	r5, r3, #0
  3cd9c4:	1c14		add	r4, r2, #0
  3cd9c6:	4860		ldr	r0, =0xa0020	; via 0x3cdb48
  3cd9c8:	9000		str	r0, [sp, #0]
  3cd9ca:	a03a		add	r0, pc, #232	; 0xe8
  3cd9cc:	213c		mov	r1, #60	; 0x3c
  3cd9ce:	2200		mov	r2, #0
  3cd9d0:	43d2		mvn	r2, r2
  3cd9d2:	2303		mov	r3, #3
  3cd9d4:	f00d f92e	bl	0x3dac34
  3cd9d8:	8820		ldrh	r0, [r4, #0]
; struct allocation size differs from original
  3cd9da:	214c		mov	r1, #76	; 0x4c
  3cd9dc:	4a61		ldr	r2, =0x1774e70	; via 0x3cdb64
  3cd9de:	f5f6 fff3	bl	0x1c49c8
  3cd9e2:	2802		cmp	r0, #2
  3cd9e4:	d10b		bne	0x3cd9fe
  3cd9e6:	4858		ldr	r0, =0xa0020	; via 0x3cdb48
  3cd9e8:	9000		str	r0, [sp, #0]
  3cd9ea:	a042		add	r0, pc, #264	; 0x108
  3cd9ec:	2156		mov	r1, #86	; 0x56
  3cd9ee:	2200		mov	r2, #0
  3cd9f0:	43d2		mvn	r2, r2
  3cd9f2:	2301		mov	r3, #1
  3cd9f4:	f00d f91e	bl	0x3dac34
  3cd9f8:	2004		mov	r0, #4
  3cd9fa:	43c0		mvn	r0, r0
  3cd9fc:	e043		b	0x3cda86
  3cd9fe:	485a		ldr	r0, =0x1774e74	; via 0x3cdb68
  3cda00:	6005		str	r5, [r0, #0]
  3cda02:	4b58		ldr	r3, =0x1774e70	; via 0x3cdb64
  3cda04:	6819		ldr	r1, [r3, #0]
  3cda06:	4859		ldr	r0, =0x1774e38	; via 0x3cdb6c
  3cda08:	6800		ldr	r0, [r0, #0]
  3cda0a:	7880		ldrb	r0, [r0, #2]
  3cda0c:	7088		strb	r0, [r1, #2]
  3cda0e:	6818		ldr	r0, [r3, #0]
  3cda10:	8821		ldrh	r1, [r4, #0]
  3cda12:	8001		strh	r1, [r0, #0]
  3cda14:	2200		mov	r2, #0
  3cda16:	6818		ldr	r0, [r3, #0]
  3cda18:	6042		str	r2, [r0, #4]
  3cda1a:	6819		ldr	r1, [r3, #0]
; end of charge current
  3cda1c:	207a		mov	r0, #122	; 0x7a
  3cda1e:	8148		strh	r0, [r1, #10]	; 0xa
; pwr_env_ctrl_blk->max_voltage_code is set to:
; (0x426800 - adccal_b*1024) / adccal_a
;  0x426800 >> 10 = 0x109A = 4250
  3cda20:	4c53		ldr	r4, =0x426800	; via 0x3cdb70
  3cda22:	4954		ldr	r1, =0x801746	; via 0x3cdb74
  3cda24:	2000		mov	r0, #0
  3cda26:	5e08		ldrsh	r0, [r1, r0]
  3cda28:	0280		lsl	r0, r0, #10
  3cda2a:	1a20		sub	r0, r4, r0
  3cda2c:	4952		ldr	r1, =0x801734	; via 0x3cdb78
  3cda2e:	8809		ldrh	r1, [r1, #0]
  3cda30:	f029 fbe4	bl	0x3f71fc	; U$DIV
; MV100-matching logic continues
  3cda34:	6818		ldr	r0, [r3, #0]
  3cda36:	8181		strh	r1, [r0, #12]	; 0xc
  3cda38:	0610		lsl	r0, r2, #24
  3cda3a:	0e01		lsr	r1, r0, #24
  3cda3c:	6818		ldr	r0, [r3, #0]
  3cda3e:	7401		strb	r1, [r0, #16]	; 0x10
  3cda40:	24ff		mov	r4, #255	; 0xff
  3cda42:	6818		ldr	r0, [r3, #0]
  3cda44:	7504		strb	r4, [r0, #20]	; 0x14
  3cda46:	2000		mov	r0, #0
  3cda48:	681d		ldr	r5, [r3, #0]
  3cda4a:	61a8		str	r0, [r5, #24]	; 0x18
  3cda4c:	681e		ldr	r6, [r3, #0]
  3cda4e:	2505		mov	r5, #5
  3cda50:	7735		strb	r5, [r6, #28]	; 0x1c
  3cda52:	2620		mov	r6, #32	; 0x20
  3cda54:	681d		ldr	r5, [r3, #0]
  3cda56:	5574		strb	r4, [r6, r5]
  3cda58:	681d		ldr	r5, [r3, #0]
  3cda5a:	6268		str	r0, [r5, #36]	; 0x24
  3cda5c:	2628		mov	r6, #40	; 0x28
  3cda5e:	681d		ldr	r5, [r3, #0]
  3cda60:	5574		strb	r4, [r6, r5]
  3cda62:	681c		ldr	r4, [r3, #0]
  3cda64:	62e0		str	r0, [r4, #44]	; 0x2c
  3cda66:	6818		ldr	r0, [r3, #0]
  3cda68:	8702		strh	r2, [r0, #56]	; 0x38
  3cda6a:	2001		mov	r0, #1
  3cda6c:	681c		ldr	r4, [r3, #0]
  3cda6e:	6320		str	r0, [r4, #48]	; 0x30
; new since original: pwr_env_ctrl_blk->i2v_madc_offset = 0
  3cda70:	681c		ldr	r4, [r3, #0]
  3cda72:	8122		strh	r2, [r4, #8]
; new stuff:
; halfword at 0x40 = 1
; word     at 0x44 = 0
; byte     at 0x48 = 0
  3cda74:	2540		mov	r5, #64	; 0x40
  3cda76:	681c		ldr	r4, [r3, #0]
  3cda78:	5328		strh	r0, [r5, r4]
  3cda7a:	6818		ldr	r0, [r3, #0]
  3cda7c:	6442		str	r2, [r0, #68]	; 0x44
  3cda7e:	2248		mov	r2, #72	; 0x48
  3cda80:	6818		ldr	r0, [r3, #0]
  3cda82:	5411		strb	r1, [r2, r0]
  3cda84:	2000		mov	r0, #0
  3cda86:	b002		add	sp, #8
  3cda88:	bd70		pop	{r4, r5, r6, pc}

$pwr_init:
  3cda8a:	2000		mov	r0, #0
  3cda8c:	4770		bx	lr

$pwr_start:
  3cda8e:	2000		mov	r0, #0
  3cda90:	4770		bx	lr

$pwr_stop:
  3cda92:	2000		mov	r0, #0
  3cda94:	4770		bx	lr

$pwr_kill:
  3cda96:	b500		push	{lr}
  3cda98:	4832		ldr	r0, =0x1774e70	; via 0x3cdb64
  3cda9a:	6800		ldr	r0, [r0, #0]
  3cda9c:	f5f7 f92c	bl	0x1c4cf8
  3cdaa0:	2000		mov	r0, #0
  3cdaa2:	bd00		pop	{pc}

; function called from the ADC end handler
  3cfef6:	b510		push	{r4, lr}
  3cfef8:	2400		mov	r4, #0
  3cfefa:	2105		mov	r1, #5
  3cfefc:	1a40		sub	r0, r0, r1
  3cfefe:	2800		cmp	r0, #0
  3cff00:	d008		beq	0x3cff14
  3cff02:	3803		sub	r0, #3
  3cff04:	2800		cmp	r0, #0
  3cff06:	d10b		bne	0x3cff20
  3cff08:	200d		mov	r0, #13	; 0xd
  3cff0a:	f013 f8a9	bl	0x3e3060	; $AI_ReadBit
  3cff0e:	2801		cmp	r0, #1
  3cff10:	d005		beq	0x3cff1e
  3cff12:	e005		b	0x3cff20
  3cff14:	2006		mov	r0, #6
  3cff16:	f013 f8a3	bl	0x3e3060	; $AI_ReadBit
  3cff1a:	2801		cmp	r0, #1
  3cff1c:	d100		bne	0x3cff20
  3cff1e:	2401		mov	r4, #1
  3cff20:	1c20		add	r0, r4, #0
  3cff22:	bd10		pop	{r4, pc}

$Create_ABB_HISR:
  3dc928:	b500		push	{lr}
  3dc92a:	b083		sub	sp, #12	; 0xc
  3dc92c:	485d		ldr	r0, =0x1764a10	; via 0x3dcaa4
  3dc92e:	21fe		mov	r1, #254	; 0xfe
  3dc930:	2201		mov	r2, #1
  3dc932:	0252		lsl	r2, r2, #9
  3dc934:	f01b fc12	bl	0x3f815c	; memset()
  3dc938:	485a		ldr	r0, =0x1764a10	; via 0x3dcaa4
  3dc93a:	9000		str	r0, [sp, #0]
  3dc93c:	2001		mov	r0, #1
  3dc93e:	0240		lsl	r0, r0, #9
  3dc940:	9001		str	r0, [sp, #4]
  3dc942:	4859		ldr	r0, =0x17649b8	; via 0x3dcaa8
  3dc944:	a127		add	r1, pc, #156	; 0x9c
  3dc946:	4a59		ldr	r2, =0x3dc967	; via 0x3dcaac
  3dc948:	2302		mov	r3, #2
  3dc94a:	f01c ff3f	bl	0x3f97cc	; $TCCE_Create_HISR
  3dc94e:	b003		add	sp, #12	; 0xc
  3dc950:	bd00		pop	{pc}

$Activate_ABB_HISR:
  3dc952:	b500		push	{lr}
  3dc954:	4854		ldr	r0, =0x17649b8	; via 0x3dcaa8
  3dc956:	f01c ff41	bl	0x3f97dc	; $TCCE_Activate_HISR
  3dc95a:	2800		cmp	r0, #0
  3dc95c:	d001		beq	0x3dc962
  3dc95e:	2001		mov	r0, #1
  3dc960:	bd00		pop	{pc}
  3dc962:	2000		mov	r0, #0
  3dc964:	bd00		pop	{pc}

$EXT_HisrEntry:
  3dc966:	b500		push	{lr}
  3dc968:	b083		sub	sp, #12	; 0xc
  3dc96a:	4851		ldr	r0, =0x1774e38	; via 0x3dcab0
  3dc96c:	6800		ldr	r0, [r0, #0]
  3dc96e:	2800		cmp	r0, #0
  3dc970:	d02a		beq	0x3dc9c8
  3dc972:	2134		mov	r1, #52	; 0x34
  3dc974:	484e		ldr	r0, =0x1774e38	; via 0x3dcab0
  3dc976:	6800		ldr	r0, [r0, #0]
  3dc978:	5c08		ldrb	r0, [r1, r0]
  3dc97a:	2800		cmp	r0, #0
  3dc97c:	d01f		beq	0x3dc9be
  3dc97e:	484c		ldr	r0, =0x1774e38	; via 0x3dcab0
  3dc980:	6800		ldr	r0, [r0, #0]
  3dc982:	8800		ldrh	r0, [r0, #0]
  3dc984:	210c		mov	r1, #12	; 0xc
  3dc986:	aa02		add	r2, sp, #8
  3dc988:	f5e8 f81e	bl	0x1c49c8	; rvf_get_buf()
  3dc98c:	2802		cmp	r0, #2
  3dc98e:	d104		bne	0x3dc99a
  3dc990:	4848		ldr	r0, =0xa0010	; via 0x3dcab4
  3dc992:	9000		str	r0, [sp, #0]
  3dc994:	a016		add	r0, pc, #88	; 0x58
  3dc996:	2142		mov	r1, #66	; 0x42
  3dc998:	e01a		b	0x3dc9d0
  3dc99a:	9902		ldr	r1, [sp, #8]
  3dc99c:	2005		mov	r0, #5
  3dc99e:	6008		str	r0, [r1, #0]
  3dc9a0:	9902		ldr	r1, [sp, #8]
  3dc9a2:	4843		ldr	r0, =0x1774e38	; via 0x3dcab0
  3dc9a4:	6800		ldr	r0, [r0, #0]
  3dc9a6:	7880		ldrb	r0, [r0, #2]
  3dc9a8:	7248		strb	r0, [r1, #9]
  3dc9aa:	9802		ldr	r0, [sp, #8]
; $spi_abb_read_int_reg_callback = 0x39efc4
  3dc9ac:	4942		ldr	r1, =0x39efc5	; via 0x3dcab8
  3dc9ae:	6041		str	r1, [r0, #4]
  3dc9b0:	483f		ldr	r0, =0x1774e38	; via 0x3dcab0
  3dc9b2:	6800		ldr	r0, [r0, #0]
  3dc9b4:	7880		ldrb	r0, [r0, #2]
  3dc9b6:	9902		ldr	r1, [sp, #8]
  3dc9b8:	f7dc faf2	bl	0x3b8fa0	; $rvf_send_msg
  3dc9bc:	e010		b	0x3dc9e0
  3dc9be:	483d		ldr	r0, =0xa0010	; via 0x3dcab4
  3dc9c0:	9000		str	r0, [sp, #0]
  3dc9c2:	a01c		add	r0, pc, #112	; 0x70
  3dc9c4:	2138		mov	r1, #56	; 0x38
  3dc9c6:	e003		b	0x3dc9d0
  3dc9c8:	483a		ldr	r0, =0xa0010	; via 0x3dcab4
  3dc9ca:	9000		str	r0, [sp, #0]
  3dc9cc:	a028		add	r0, pc, #160	; 0xa0
  3dc9ce:	2133		mov	r1, #51	; 0x33
  3dc9d0:	2200		mov	r2, #0
  3dc9d2:	43d2		mvn	r2, r2
  3dc9d4:	2301		mov	r3, #1
  3dc9d6:	f7fe f92d	bl	0x3dac34
  3dc9da:	200c		mov	r0, #12	; 0xc
  3dc9dc:	f003 f967	bl	0x3dfcae
  3dc9e0:	b003		add	sp, #12	; 0xc
  3dc9e2:	bd00		pop	{pc}

; A higher-level display backlight control function: takes a backlight
; level index as input (0 means off, 1-4 are defined levels, anything >=5
; means maximum), calls the lower-level function with the corresponding
; PWL value, and sets the 0x1775138 var to a number that seems to be
; the backlight's expected current draw.
  3df226:	b500		push	{lr}
  3df228:	2800		cmp	r0, #0
  3df22a:	d105		bne	0x3df238
  3df22c:	f000 f827	bl	0x3df27e
  3df230:	492a		ldr	r1, =0x1775138	; via 0x3df2dc
  3df232:	2000		mov	r0, #0
  3df234:	8008		strh	r0, [r1, #0]
  3df236:	bd00		pop	{pc}
  3df238:	2801		cmp	r0, #1
  3df23a:	d019		beq	0x3df270
  3df23c:	2802		cmp	r0, #2
  3df23e:	d012		beq	0x3df266
  3df240:	2803		cmp	r0, #3
  3df242:	d00b		beq	0x3df25c
  3df244:	2804		cmp	r0, #4
  3df246:	d004		beq	0x3df252
  3df248:	20ff		mov	r0, #255	; 0xff
  3df24a:	f000 f818	bl	0x3df27e
  3df24e:	2162		mov	r1, #98	; 0x62
  3df250:	e012		b	0x3df278
  3df252:	20c0		mov	r0, #192	; 0xc0
  3df254:	f000 f813	bl	0x3df27e
  3df258:	2157		mov	r1, #87	; 0x57
  3df25a:	e00d		b	0x3df278
  3df25c:	2080		mov	r0, #128	; 0x80
  3df25e:	f000 f80e	bl	0x3df27e
  3df262:	214c		mov	r1, #76	; 0x4c
  3df264:	e008		b	0x3df278
  3df266:	2040		mov	r0, #64	; 0x40
  3df268:	f000 f809	bl	0x3df27e
  3df26c:	2141		mov	r1, #65	; 0x41
  3df26e:	e003		b	0x3df278
  3df270:	2001		mov	r0, #1
  3df272:	f000 f804	bl	0x3df27e
  3df276:	2108		mov	r1, #8
  3df278:	4818		ldr	r0, =0x1775138	; via 0x3df2dc
  3df27a:	8001		strh	r1, [r0, #0]
  3df27c:	bd00		pop	{pc}

; The following 0x3df27e function controls the display backlight.
; 0 argument means fully off, otherwise the master on/off control is on
; and the argument is the value for PWL control before the inversion.
  3df27e:	b530		push	{r4, r5, lr}
  3df280:	2800		cmp	r0, #0
  3df282:	d10d		bne	0x3df2a0
  3df284:	4c16		ldr	r4, =0x177513a	; via 0x3df2e0
  3df286:	7820		ldrb	r0, [r4, #0]
  3df288:	2800		cmp	r0, #0
  3df28a:	d016		beq	0x3df2ba
; 0x2785d0 must be the display backlight master on/off control function
  3df28c:	2000		mov	r0, #0
  3df28e:	f699 f99f	bl	0x2785d0
  3df292:	2000		mov	r0, #0
  3df294:	4913		ldr	r1, =0xfffe8000	; via 0x3df2e4
  3df296:	7008		strb	r0, [r1, #0]
  3df298:	4913		ldr	r1, =0xfffe8001	; via 0x3df2e8
  3df29a:	7008		strb	r0, [r1, #0]
  3df29c:	7020		strb	r0, [r4, #0]
  3df29e:	bd30		pop	{r4, r5, pc}
  3df2a0:	4910		ldr	r1, =0xfffe8000	; via 0x3df2e4
  3df2a2:	4240		neg	r0, r0
  3df2a4:	7008		strb	r0, [r1, #0]
  3df2a6:	4c0e		ldr	r4, =0x177513a	; via 0x3df2e0
  3df2a8:	7820		ldrb	r0, [r4, #0]
  3df2aa:	2800		cmp	r0, #0
  3df2ac:	d105		bne	0x3df2ba
  3df2ae:	2501		mov	r5, #1
  3df2b0:	704d		strb	r5, [r1, #1]
  3df2b2:	2001		mov	r0, #1
  3df2b4:	f699 f98c	bl	0x2785d0
  3df2b8:	7025		strb	r5, [r4, #0]
  3df2ba:	bd30		pop	{r4, r5, pc}

  3df2bc:	4808		ldr	r0, =0x177513a	; via 0x3df2e0
  3df2be:	7800		ldrb	r0, [r0, #0]
  3df2c0:	4770		bx	lr

  3df2c2:	4806		ldr	r0, =0x1775138	; via 0x3df2dc
  3df2c4:	8800		ldrh	r0, [r0, #0]
  3df2c6:	4770		bx	lr

$AI_EnableBit:
  3e300c:	4a44		ldr	r2, =0xfffef00a	; via 0x3e3120
  3e300e:	2101		mov	r1, #1
  3e3010:	4081		lsl	r1, r0
  3e3012:	8810		ldrh	r0, [r2, #0]
  3e3014:	4301		orr	r1, r0
  3e3016:	8011		strh	r1, [r2, #0]
  3e3018:	4770		bx	lr

$AI_DisableBit:
  3e301a:	4a41		ldr	r2, =0xfffef00a	; via 0x3e3120
  3e301c:	2101		mov	r1, #1
  3e301e:	4081		lsl	r1, r0
  3e3020:	8810		ldrh	r0, [r2, #0]
  3e3022:	4388		bic	r0, r1
  3e3024:	8010		strh	r0, [r2, #0]
  3e3026:	4770		bx	lr

$AI_SetBit:
  3e3028:	4a3e		ldr	r2, =0xfffe4802	; via 0x3e3124
  3e302a:	2101		mov	r1, #1
  3e302c:	4081		lsl	r1, r0
  3e302e:	8810		ldrh	r0, [r2, #0]
  3e3030:	4301		orr	r1, r0
  3e3032:	8011		strh	r1, [r2, #0]
  3e3034:	4770		bx	lr

$AI_ResetBit:
  3e3036:	4a3b		ldr	r2, =0xfffe4802	; via 0x3e3124
  3e3038:	2101		mov	r1, #1
  3e303a:	4081		lsl	r1, r0
  3e303c:	8810		ldrh	r0, [r2, #0]
  3e303e:	4388		bic	r0, r1
  3e3040:	8010		strh	r0, [r2, #0]
  3e3042:	4770		bx	lr

$AI_ConfigBitAsOutput:
  3e3044:	4a38		ldr	r2, =0xfffe4804	; via 0x3e3128
  3e3046:	2101		mov	r1, #1
  3e3048:	4081		lsl	r1, r0
  3e304a:	8810		ldrh	r0, [r2, #0]
  3e304c:	4388		bic	r0, r1
  3e304e:	8010		strh	r0, [r2, #0]
  3e3050:	4770		bx	lr

$AI_ConfigBitAsInput:
  3e3052:	4a35		ldr	r2, =0xfffe4804	; via 0x3e3128
  3e3054:	2101		mov	r1, #1
  3e3056:	4081		lsl	r1, r0
  3e3058:	8810		ldrh	r0, [r2, #0]
  3e305a:	4301		orr	r1, r0
  3e305c:	8011		strh	r1, [r2, #0]
  3e305e:	4770		bx	lr

$AI_ReadBit:
  3e3060:	4932		ldr	r1, =0xfffe4800	; via 0x3e312c
  3e3062:	8809		ldrh	r1, [r1, #0]
  3e3064:	4101		asr	r1, r0
  3e3066:	07c8		lsl	r0, r1, #31
  3e3068:	0fc0		lsr	r0, r0, #31
  3e306a:	0600		lsl	r0, r0, #24
  3e306c:	0e00		lsr	r0, r0, #24
  3e306e:	4770		bx	lr

$AI_Power:
  3e3070:	b500		push	{lr}
  3e3072:	2800		cmp	r0, #0
  3e3074:	d101		bne	0x3e307a
  3e3076:	f766 fbff	bl	0x349878	; $ABB_Power_Off
  3e307a:	bd00		pop	{pc}

$AI_ResetIoConfig:
  3e307c:	492a		ldr	r1, =0xfffe4804	; via 0x3e3128
  3e307e:	482c		ldr	r0, =0xffff	; via 0x3e3130
  3e3080:	8008		strh	r0, [r1, #0]
  3e3082:	4827		ldr	r0, =0xfffef00a	; via 0x3e3120
  3e3084:	2100		mov	r1, #0
  3e3086:	8001		strh	r1, [r0, #0]
  3e3088:	4770		bx	lr

$AI_ClockEnable:
  3e308a:	492a		ldr	r1, =0xfffe4806	; via 0x3e3134
  3e308c:	2020		mov	r0, #32	; 0x20
  3e308e:	880a		ldrh	r2, [r1, #0]
  3e3090:	4310		orr	r0, r2
  3e3092:	8008		strh	r0, [r1, #0]
  3e3094:	4770		bx	lr

$AI_InitIOConfig:
  3e3096:	b500		push	{lr}
  3e3098:	f7ec fe54	bl	0x3cfd44
  3e309c:	2000		mov	r0, #0
  3e309e:	4926		ldr	r1, =0x1773f8a	; via 0x3e3138
  3e30a0:	7008		strb	r0, [r1, #0]
  3e30a2:	4926		ldr	r1, =0x17750fd	; via 0x3e313c
  3e30a4:	7008		strb	r0, [r1, #0]
  3e30a6:	4926		ldr	r1, =0x17750ff	; via 0x3e3140
  3e30a8:	2201		mov	r2, #1
  3e30aa:	700a		strb	r2, [r1, #0]
  3e30ac:	4925		ldr	r1, =0x17750fe	; via 0x3e3144
  3e30ae:	7008		strb	r0, [r1, #0]
  3e30b0:	4825		ldr	r0, =0x17750fc	; via 0x3e3148
  3e30b2:	21ff		mov	r1, #255	; 0xff
  3e30b4:	7001		strb	r1, [r0, #0]
  3e30b6:	bd00		pop	{pc}

$AI_SelectIOForIT:
  3e30b8:	0109		lsl	r1, r1, #4
  3e30ba:	1840		add	r0, r0, r1
  3e30bc:	0040		lsl	r0, r0, #1
  3e30be:	3001		add	r0, #1
  3e30c0:	4922		ldr	r1, =0xfffe4814	; via 0x3e314c
  3e30c2:	8008		strh	r0, [r1, #0]
  3e30c4:	4770		bx	lr

$AI_CheckITSource:
  3e30c6:	2100		mov	r1, #0
  3e30c8:	4a21		ldr	r2, =0xfffe4816	; via 0x3e3150
  3e30ca:	8812		ldrh	r2, [r2, #0]
  3e30cc:	4210		tst	r0, r2
  3e30ce:	d000		beq	0x3e30d2
  3e30d0:	2101		mov	r1, #1
  3e30d2:	1c08		add	r0, r1, #0
  3e30d4:	4770		bx	lr

$AI_UnmaskIT:
  3e30d6:	4a1f		ldr	r2, =0xfffe4818	; via 0x3e3154
  3e30d8:	8811		ldrh	r1, [r2, #0]
  3e30da:	4381		bic	r1, r0
  3e30dc:	8011		strh	r1, [r2, #0]
  3e30de:	4770		bx	lr

$AI_MaskIT:
  3e30e0:	4a1c		ldr	r2, =0xfffe4818	; via 0x3e3154
  3e30e2:	8811		ldrh	r1, [r2, #0]
  3e30e4:	4301		orr	r1, r0
  3e30e6:	8011		strh	r1, [r2, #0]
  3e30e8:	4770		bx	lr

  3e30ea:	2130		mov	r1, #48	; 0x30
  3e30ec:	7001		strb	r1, [r0, #0]
  3e30ee:	3001		add	r0, #1
  3e30f0:	2231		mov	r2, #49	; 0x31
  3e30f2:	7002		strb	r2, [r0, #0]
  3e30f4:	3001		add	r0, #1
  3e30f6:	222e		mov	r2, #46	; 0x2e
  3e30f8:	7002		strb	r2, [r0, #0]
  3e30fa:	3001		add	r0, #1
  3e30fc:	7001		strb	r1, [r0, #0]
  3e30fe:	3001		add	r0, #1
  3e3100:	7001		strb	r1, [r0, #0]
  3e3102:	3001		add	r0, #1
  3e3104:	2100		mov	r1, #0
  3e3106:	7001		strb	r1, [r0, #0]
  3e3108:	4770		bx	lr

  3e310a:	b500		push	{lr}
  3e310c:	2801		cmp	r0, #1
  3e310e:	d103		bne	0x3e3118
  3e3110:	2001		mov	r0, #1
  3e3112:	f7ff ff90	bl	0x3e3036	; $AI_ResetBit
  3e3116:	bd00		pop	{pc}
  3e3118:	2001		mov	r0, #1
  3e311a:	f7ff ff85	bl	0x3e3028	; $AI_SetBit
  3e311e:	bd00		pop	{pc}

_f_checksum:
  3e6990:	e1a0c000	mov	r12, r0
  3e6994:	e3a00000	mov	r0, #0
  3e6998:	e3510000	cmp	r1, #0
  3e699c:	012fff1e	bxeq	lr
  3e69a0:	e4dc2001	ldrb	r2, [r12], #1
  3e69a4:	e0820000	add	r0, r2, r0
  3e69a8:	e1a00800	mov	r0, r0, lsl #16
  3e69ac:	e1a00820	mov	r0, r0, lsr #16
  3e69b0:	e2511001	subs	r1, r1, #1
  3e69b4:	1afffff9	bne	0x3e69a0
  3e69b8:	e12fff1e	bx	lr

_f_load_int_mem:
  3e69bc:	e92d4ff0	stmdb	sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
  3e69c0:	e59f90c8	ldr	r9, =0x1775070	; via 0x3e6a90
  3e69c4:	e3a0c000	mov	r12, #0
  3e69c8:	e1c9c0b0	strh	r12, [r9]
  3e69cc:	e59fa0c0	ldr	r10, =0x1775072	; via 0x3e6a94
  3e69d0:	e1cac0b0	strh	r12, [r10]
  3e69d4:	e59fc0bc	ldr	r12, =0x82d1f0	; via 0x3e6a98
  3e69d8:	e59f00bc	ldr	r0, =0x848788	; via 0x3e6a9c
  3e69dc:	e040000c	sub	r0, r0, r12
  3e69e0:	e2408004	sub	r8, r0, #4
  3e69e4:	e28c7004	add	r7, r12, #4
  3e69e8:	e1a00007	mov	r0, r7
  3e69ec:	e3a01000	mov	r1, #0
  3e69f0:	e1a02008	mov	r2, r8
  3e69f4:	ebf166b1	bl	0x404c0		; _INT_memset
  3e69f8:	e59f40a0	ldr	r4, =0x84878c	; via 0x3e6aa0
  3e69fc:	e59fc0a0	ldr	r12, =0x848d1c	; via 0x3e6aa4
  3e6a00:	e04c6004	sub	r6, r12, r4
  3e6a04:	e1a00004	mov	r0, r4
  3e6a08:	e3a01000	mov	r1, #0
  3e6a0c:	e1a02006	mov	r2, r6
  3e6a10:	ebf166aa	bl	0x404c0		; _INT_memset
  3e6a14:	e59fb08c	ldr	r11, =0x40708	; via 0x3e6aa8
  3e6a18:	e1a0000b	mov	r0, r11
  3e6a1c:	e1a01008	mov	r1, r8
  3e6a20:	ebffffda	bl	0x3e6990	; _f_checksum
  3e6a24:	e1a03000	mov	r3, r0
  3e6a28:	e1c930b0	strh	r3, [r9]
  3e6a2c:	e59f5078	ldr	r5, =0x5bca0	; via 0x3e6aac
  3e6a30:	e1a00005	mov	r0, r5
  3e6a34:	e1a01006	mov	r1, r6
  3e6a38:	ebffffd4	bl	0x3e6990	; _f_checksum
  3e6a3c:	e083c000	add	r12, r3, r0
  3e6a40:	e1c9c0b0	strh	r12, [r9]
  3e6a44:	e1a00007	mov	r0, r7
  3e6a48:	e1a0100b	mov	r1, r11
  3e6a4c:	e1a02008	mov	r2, r8
  3e6a50:	ebf166c0	bl	0x40558		; _INT_memcpy
  3e6a54:	e1a00004	mov	r0, r4
  3e6a58:	e1a01005	mov	r1, r5
  3e6a5c:	e1a02006	mov	r2, r6
  3e6a60:	ebf166bc	bl	0x40558		; _INT_memcpy
  3e6a64:	e1a00007	mov	r0, r7
  3e6a68:	e1a01008	mov	r1, r8
  3e6a6c:	ebffffc7	bl	0x3e6990	; _f_checksum
  3e6a70:	e1a03000	mov	r3, r0
  3e6a74:	e1ca30b0	strh	r3, [r10]
  3e6a78:	e1a00004	mov	r0, r4
  3e6a7c:	e1a01006	mov	r1, r6
  3e6a80:	ebffffc2	bl	0x3e6990	; _f_checksum
  3e6a84:	e083c000	add	r12, r3, r0
  3e6a88:	e1cac0b0	strh	r12, [r10]
  3e6a8c:	e8bd8ff0	ldmia	sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}

  3e6a90:	01775070	_d_checksum1
  3e6a94:	01775072	_d_checksum2
  3e6a98:	0082d1f0	_d_application_run_start
  3e6a9c:	00848788	_d_application_run_end
  3e6aa0:	0084878c	__470_S_MEM_out_call_run_start
  3e6aa4:	00848d1c	__470_S_MEM_out_call_run_end
  3e6aa8:	00040708	.ldfl+8
  3e6aac:	0005bca0	__470_S_MEM_out_call_load_start

Run address = load address + 0x7ECAEC
for both the actual code and the trampolines

$spi_core:
  3e8ca0:	b500		push	{lr}
  3e8ca2:	b085		sub	sp, #20	; 0x14
  3e8ca4:	4669		mov	r1, sp
  3e8ca6:	2000		mov	r0, #0
  3e8ca8:	7208		strb	r0, [r1, #8]
  3e8caa:	483a		ldr	r0, =0xa0010	; via 0x3e8d94
  3e8cac:	9000		str	r0, [sp, #0]
  3e8cae:	a02e		add	r0, pc, #184	; 0xb8
  3e8cb0:	2118		mov	r1, #24	; 0x18
  3e8cb2:	2200		mov	r2, #0
  3e8cb4:	43d2		mvn	r2, r2
  3e8cb6:	2305		mov	r3, #5
  3e8cb8:	f7f1 ffbc	bl	0x3dac34
  3e8cbc:	2034		mov	r0, #52	; 0x34
  3e8cbe:	4936		ldr	r1, =0x1774e38	; via 0x3e8d98
  3e8cc0:	680a		ldr	r2, [r1, #0]
  3e8cc2:	2101		mov	r1, #1
  3e8cc4:	5481		strb	r1, [r0, r2]
  3e8cc6:	200c		mov	r0, #12	; 0xc
  3e8cc8:	f7f6 fff1	bl	0x3dfcae	; $IQ_Unmask
  3e8ccc:	f7b8 fbd6	bl	0x3a147c	; $Switch_ON
  3e8cd0:	4668		mov	r0, sp
  3e8cd2:	7a00		ldrb	r0, [r0, #8]
  3e8cd4:	2800		cmp	r0, #0
  3e8cd6:	d131		bne	0x3e8d3c
  3e8cd8:	4830		ldr	r0, =0xffff	; via 0x3e8d9c
  3e8cda:	2100		mov	r1, #0
  3e8cdc:	f6c8 fc18	bl	0x2b1510	; $rvf_wait
  3e8ce0:	4669		mov	r1, sp
  3e8ce2:	8208		strh	r0, [r1, #16]	; 0x10
  3e8ce4:	4668		mov	r0, sp
  3e8ce6:	8a00		ldrh	r0, [r0, #16]	; 0x10
  3e8ce8:	0840		lsr	r0, r0, #1
  3e8cea:	d30b		bcc	0x3e8d04
  3e8cec:	2000		mov	r0, #0
  3e8cee:	f5da fc81	bl	0x1c35f4	; $rvf_read_mbox
  3e8cf2:	9003		str	r0, [sp, #12]	; 0xc
  3e8cf4:	9803		ldr	r0, [sp, #12]	; 0xc
  3e8cf6:	f7ec ff33	bl	0x3d5b60	; $spi_process
  3e8cfa:	2800		cmp	r0, #0
  3e8cfc:	d002		beq	0x3e8d04
  3e8cfe:	9803		ldr	r0, [sp, #12]	; 0xc
  3e8d00:	f008 fd1e	bl	0x3f1740	; $pwr_process
  3e8d04:	4668		mov	r0, sp
  3e8d06:	8a00		ldrh	r0, [r0, #16]	; 0x10
  3e8d08:	0940		lsr	r0, r0, #5
  3e8d0a:	d301		bcc	0x3e8d10
  3e8d0c:	f6fa f8c4	bl	0x2e2e98	; $pwr_bat_test_timer_process
  3e8d10:	4668		mov	r0, sp
  3e8d12:	8a00		ldrh	r0, [r0, #16]	; 0x10
  3e8d14:	0980		lsr	r0, r0, #6
  3e8d16:	d301		bcc	0x3e8d1c
  3e8d18:	f6f9 fe64	bl	0x2e29e4	; $pwr_CI_charge_timer_process
  3e8d1c:	4668		mov	r0, sp
  3e8d1e:	8a00		ldrh	r0, [r0, #16]	; 0x10
  3e8d20:	09c0		lsr	r0, r0, #7
  3e8d22:	d301		bcc	0x3e8d28
  3e8d24:	f6fa f88b	bl	0x2e2e3e	; $pwr_CV_charge_timer_process
  3e8d28:	4668		mov	r0, sp
  3e8d2a:	8a00		ldrh	r0, [r0, #16]	; 0x10
  3e8d2c:	0a00		lsr	r0, r0, #8
  3e8d2e:	d301		bcc	0x3e8d34
  3e8d30:	f7ca fe95	bl	0x3b3a5e	; $pwr_discharge_timer_process
  3e8d34:	4668		mov	r0, sp
  3e8d36:	7a00		ldrb	r0, [r0, #8]
  3e8d38:	2800		cmp	r0, #0
  3e8d3a:	d0cd		beq	0x3e8cd8
  3e8d3c:	2000		mov	r0, #0
  3e8d3e:	b005		add	sp, #20	; 0x14
  3e8d40:	bd00		pop	{pc}

$spi_adc_on:
  3e8d42:	b500		push	{lr}
  3e8d44:	b082		sub	sp, #8
  3e8d46:	2233		mov	r2, #51	; 0x33
  3e8d48:	4813		ldr	r0, =0x1774e38	; via 0x3e8d98
  3e8d4a:	6800		ldr	r0, [r0, #0]
  3e8d4c:	2101		mov	r1, #1
  3e8d4e:	5411		strb	r1, [r2, r0]
  3e8d50:	4810		ldr	r0, =0xa0010	; via 0x3e8d94
  3e8d52:	9000		str	r0, [sp, #0]
  3e8d54:	a00b		add	r0, pc, #44	; 0x2c
  3e8d56:	210f		mov	r1, #15	; 0xf
  3e8d58:	2200		mov	r2, #0
  3e8d5a:	43d2		mvn	r2, r2
  3e8d5c:	2305		mov	r3, #5
  3e8d5e:	f7f1 ff69	bl	0x3dac34
  3e8d62:	b002		add	sp, #8
  3e8d64:	bd00		pop	{pc}
  3e8d66:	46c0		nop			(mov r8, r8)

$Application_Initialize:
  3f11f8:	b500		push	{lr}
  3f11fa:	f7ca faeb	bl	0x3bb7d4	; $Init_Target
  3f11fe:	f7ca fbe4	bl	0x3bb9ca	; $Init_Drivers
  3f1202:	f686 f8eb	bl	0x2773dc
  3f1206:	f686 f985	bl	0x277514
  3f120a:	f008 ffa7	bl	0x3fa15c	; $Cust_Init_Layer1
  3f120e:	f7ff ffcd	bl	0x3f11ac
  3f1212:	2801		cmp	r0, #1
  3f1214:	d001		beq	0x3f121a
  3f1216:	f7b0 fa2d	bl	0x3a1674
  3f121a:	f7b0 fa3e	bl	0x3a169a
  3f121e:	f75e fb4d	bl	0x34f8bc
  3f1222:	f7ca fbe6	bl	0x3bb9f2	; $Init_Serial_Flows
  3f1226:	f709 fe44	bl	0x2faeb2
  3f122a:	f7ca fbee	bl	0x3bba0a	; $Init_Unmask_IT
  3f122e:	bd00		pop	{pc}

$INC_Initialize:
  3f3e74:	b530		push	{r4, r5, lr}
  3f3e76:	1c05		add	r5, r0, #0
  3f3e78:	4c13		ldr	r4, =0x1775048	; via 0x3f3ec8
  3f3e7a:	2001		mov	r0, #1
  3f3e7c:	6020		str	r0, [r4, #0]
  3f3e7e:	f003 f99d	bl	0x3f71bc
  3f3e82:	f003 f99f	bl	0x3f71c4
  3f3e86:	f003 f947	bl	0x3f7118
  3f3e8a:	f001 fe75	bl	0x3f5b78
  3f3e8e:	f7f5 ffcd	bl	0x3e9e2c
  3f3e92:	f002 fb55	bl	0x3f6540
  3f3e96:	f002 fb23	bl	0x3f64e0
  3f3e9a:	f002 fb41	bl	0x3f6520
  3f3e9e:	f002 fb0f	bl	0x3f64c0
  3f3ea2:	f002 fb6d	bl	0x3f6580
  3f3ea6:	f002 fb2b	bl	0x3f6500
  3f3eaa:	f002 fb79	bl	0x3f65a0
  3f3eae:	f7fa fc8b	bl	0x3ee7c8
  3f3eb2:	f002 fb55	bl	0x3f6560
  3f3eb6:	1c28		add	r0, r5, #0
  3f3eb8:	f7fd f99e	bl	0x3f11f8	; $Application_Initialize
  3f3ebc:	2002		mov	r0, #2
  3f3ebe:	6020		str	r0, [r4, #0]
  3f3ec0:	f005 fbdc	bl	0x3f967c
  3f3ec4:	bd30		pop	{r4, r5, pc}

_INC_Initialize:
  3f6b40:	e92d4000	stmdb	sp!, {lr}
  3f6b44:	e28fe001	add	lr, pc, #1
  3f6b48:	e12fff1e	bx	lr
  3f6b4c:	f7fd f992	bl	0x3f3e74	; $INC_Initialize
  3f6b50:	4778		bx	pc
  3f6b52:	46c0		nop			(mov r8, r8)
  3f6b54:	e8bd8000	ldmia	sp!, {pc}

$madc_hex_2_physical call trampoline
  3f81ac:	b082		sub	sp, #8
  3f81ae:	9400		str	r4, [sp, #0]
  3f81b0:	4c01		ldr	r4, =0x83cab0	; via 0x3f81b8
  3f81b2:	9401		str	r4, [sp, #4]
  3f81b4:	bd10		pop	{r4, pc}
  3f81b6:	0000
  3f81b8:	0083cab0

$Cust_Init_Layer1 call trampoline
  3fa15c:	b082		sub	sp, #8
  3fa15e:	9400		str	r4, [sp, #0]
  3fa160:	4c01		ldr	r4, =0x83ca64	; via 0x3fa168
  3fa162:	9401		str	r4, [sp, #4]
  3fa164:	bd10		pop	{r4, pc}
  3fa166:	0000
  3fa168:	0083ca64

_RVM_SWE_GET_INFO_ARRAY:
  52fb70:	00010002	RVT_USE_ID
  52fb74:	003c6f95	rvt_get_info
  52fb78:	000a0001	R2D_USE_ID
  52fb7c:	003ea875	r2d_get_info
  52fb80:	000a0002	RTC_USE_ID
  52fb84:	003d4a7d	rtc_get_info
  52fb88:	000a0004	FFS_USE_ID
  52fb8c:	003e6bd1	ffs_get_info
  52fb90:	000a0008	KPD_USE_ID
  52fb94:	003e2d75	kpd_get_info
  52fb98:	000a0010	SPI_USE_ID
  52fb9c:	003cd72d	spi_get_info
  52fba0:	000a0020	PWR_USE_ID
  52fba4:	003cd955	pwr_get_info
  52fba8:	001e0002	AUDIO_USE_ID
  52fbac:	003aac95	audio_get_info
  52fbb0:	001e0004	ETM_USE_ID
  52fbb4:	003e528d	etm_get_info
  52fbb8:	001e0008	DAR_USE_ID
  52fbbc:	003c4039	dar_get_info
  52fbc0:	001e0010	MKS_USE_ID
  52fbc4:	003e5615	mks_get_info
  52fbc8:	001e0040	LLS_USE_ID
  52fbcc:	003e4679	lls_get_info
  52fbd0:	001e0080	ATP_USE_ID
  52fbd4:	003bdeb9	atp_get_info
; the rest are Foxconn/Pirelli's additions
  52fbd8:	00780001
  52fbdc:	003d21c1
  52fbe0:	00640001
  52fbe4:	003c8c49
  52fbe8:	00640002
  52fbec:	003b8359
  52fbf0:	00640004
  52fbf4:	003b9b2d
  52fbf8:	00640008
  52fbfc:	003b743d
  52fc00:	00820001
  52fc04:	003cba91
  52fc08:	000a0080
  52fc0c:	003bf1b5
  52fc10:	006e0002
  52fc14:	003bcb79
  52fc18:	006e0004
  52fc1c:	003d25b5
  52fc20:	006e0008
  52fc24:	003613ef
  52fc28:	006e0020
  52fc2c:	00381e3d
  52fc30:	006e0040
  52fc34:	003cf4f9
  52fc38:	006e0080
  52fc3c:	003cacf9
  52fc40:	006e0100
  52fc44:	00367a9d
  52fc48:	008c0001
  52fc4c:	003d1fc1
  52fc50:	00000000
  52fc54:	00000000

IRAM data:

0x801550: beginning of the .bss section from the l1_cust module

0x801550:	rf
0x801734:	adc_cal		(offset matches TCS211)
0x801758:	temperature	(ditto)
0x801964:	ser_cfg_info	(moved here, not in TCS211)
0x801ac8:	adc

IRAM code:

; default adc_cal table loaded by Pirelli's get_cal_from_nvmem()

  83c1d0:	1ac2
  83c1d2:	222e
  83c1d4:	1b58
  83c1d6:	1b58
  83c1d8:	1b58
  83c1da:	1b58
  83c1dc:	1b58
  83c1de:	0100
  83c1e0:	1b58
  83c1e2:	0000
  83c1e4:	0000
  83c1e6:	0000
  83c1e8:	0000
  83c1ea:	0000
  83c1ec:	0000
  83c1ee:	0000
  83c1f0:	0000
  83c1f2:	0000

$Cust_Init_Layer1:
  83ca64:	b500		push	{lr}
  83ca66:	b084		sub	sp, #16	; 0x10
  83ca68:	4669		mov	r1, sp
  83ca6a:	2006		mov	r0, #6
  83ca6c:	7008		strb	r0, [r1, #0]
  83ca6e:	4668		mov	r0, sp
  83ca70:	2101		mov	r1, #1
  83ca72:	7101		strb	r1, [r0, #4]
  83ca74:	2000		mov	r0, #0
  83ca76:	4669		mov	r1, sp
  83ca78:	70c8		strb	r0, [r1, #3]
  83ca7a:	7208		strb	r0, [r1, #8]
  83ca7c:	487d		ldr	r0, =0x5ff	; via 0x83cc74
  83ca7e:	9003		str	r0, [sp, #12]	; 0xc
  83ca80:	2001		mov	r0, #1
  83ca82:	80c8		strh	r0, [r1, #6]
  83ca84:	4668		mov	r0, sp
  83ca86:	f00b fff9	bl	0x848a7c	; $l1_initialize
  83ca8a:	487c		ldr	r0, =0x801550	; via 0x83cc7c
  83ca8c:	21ff		mov	r1, #255	; 0xff
  83ca8e:	319d		add	r1, #157	; 0x9d
  83ca90:	2200		mov	r2, #0
  83ca92:	f000 f85d	bl	0x83cb50	; $get_cal_from_nvmem
  83ca96:	4878		ldr	r0, =0x801964	; via 0x83cc78
  83ca98:	2102		mov	r1, #2
  83ca9a:	2202		mov	r2, #2
  83ca9c:	f000 f858	bl	0x83cb50	; $get_cal_from_nvmem
  83caa0:	b004		add	sp, #16	; 0x10
  83caa2:	bd00		pop	{pc}

  83caa4:	00000f22
  83caa8:	00000e8b
  83caac:	00001d12

$madc_hex_2_physical:
  83cab0:	b5f0		push	{r4, r5, r6, r7, lr}
  83cab2:	4642		mov	r2, r8
  83cab4:	b404		push	{r2}
  83cab6:	4688		mov	r8, r1
  83cab8:	1c01		add	r1, r0, #0
  83caba:	4c71		ldr	r4, =0x801ac8	; via 0x83cc80
  83cabc:	2012		mov	r0, #18	; 0x12
  83cabe:	1900		add	r0, r0, r4
  83cac0:	2212		mov	r2, #18	; 0x12
  83cac2:	f002 feeb	bl	0x83f89c	; C$MEMCPY
  83cac6:	496f		ldr	r1, =0x801734	; via 0x83cc84
  83cac8:	2012		mov	r0, #18	; 0x12
  83caca:	1842		add	r2, r0, r1
  83cacc:	2307		mov	r3, #7
  83cace:	8a60		ldrh	r0, [r4, #18]	; 0x12
  83cad0:	880d		ldrh	r5, [r1, #0]
  83cad2:	4368		mul	r0, r5
  83cad4:	0a80		lsr	r0, r0, #10
  83cad6:	2500		mov	r5, #0
  83cad8:	5f55		ldrsh	r5, [r2, r5]
  83cada:	1828		add	r0, r5, r0
  83cadc:	8020		strh	r0, [r4, #0]
  83cade:	3102		add	r1, #2
  83cae0:	3402		add	r4, #2
  83cae2:	3202		add	r2, #2
  83cae4:	3b01		sub	r3, #1
  83cae6:	2b00		cmp	r3, #0
  83cae8:	d1f1		bne	0x83cace
  83caea:	4f66		ldr	r7, =0x801734	; via 0x83cc84
  83caec:	4964		ldr	r1, =0x801ac8	; via 0x83cc80
  83caee:	8c08		ldrh	r0, [r1, #32]	; 0x20
  83caf0:	89fa		ldrh	r2, [r7, #14]	; 0xe
  83caf2:	4350		mul	r0, r2
  83caf4:	0a00		lsr	r0, r0, #8
  83caf6:	0400		lsl	r0, r0, #16
  83caf8:	0c06		lsr	r6, r0, #16
  83cafa:	2200		mov	r2, #0
  83cafc:	2382		mov	r3, #130	; 0x82
  83cafe:	2041		mov	r0, #65	; 0x41
  83cb00:	4c61		ldr	r4, =0x801758	; via 0x83cc88
  83cb02:	0085		lsl	r5, r0, #2
  83cb04:	5b64		ldrh	r4, [r4, r5]
  83cb06:	42a6		cmp	r6, r4
  83cb08:	db01		blt	0x83cb0e
  83cb0a:	1c02		add	r2, r0, #0
  83cb0c:	e000		b	0x83cb10
  83cb0e:	1c03		add	r3, r0, #0
  83cb10:	18d0		add	r0, r2, r3
  83cb12:	0fc4		lsr	r4, r0, #31
  83cb14:	1820		add	r0, r4, r0
  83cb16:	1040		asr	r0, r0, #1
  83cb18:	0400		lsl	r0, r0, #16
  83cb1a:	1400		asr	r0, r0, #16
  83cb1c:	1a9c		sub	r4, r3, r2
  83cb1e:	2c02		cmp	r4, #2
  83cb20:	daee		bge	0x83cb00
  83cb22:	4add		ldr	r2, =0x80175a	; via 0x83ce98
  83cb24:	0080		lsl	r0, r0, #2
  83cb26:	5e10		ldrsh	r0, [r2, r0]
  83cb28:	81c8		strh	r0, [r1, #14]	; 0xe
  83cb2a:	2022		mov	r0, #34	; 0x22
  83cb2c:	5fc2		ldrsh	r2, [r0, r7]
  83cb2e:	48db		ldr	r0, =0x801aea	; via 0x83ce9c
  83cb30:	8800		ldrh	r0, [r0, #0]
  83cb32:	8a3b		ldrh	r3, [r7, #16]	; 0x10
  83cb34:	4358		mul	r0, r3
  83cb36:	0a80		lsr	r0, r0, #10
  83cb38:	1810		add	r0, r2, r0
  83cb3a:	8208		strh	r0, [r1, #16]	; 0x10
  83cb3c:	4640		mov	r0, r8
  83cb3e:	2212		mov	r2, #18	; 0x12
  83cb40:	f002 feac	bl	0x83f89c	; C$MEMCPY
  83cb44:	bc04		pop	{r2}
  83cb46:	4690		mov	r8, r2
  83cb48:	bdf0		pop	{r4, r5, r6, r7, pc}
  83cb4a:	46c0		nop			(mov r8, r8)

  83cb4c:	008016ec

$get_cal_from_nvmem:
  83cb50:	b530		push	{r4, r5, lr}
  83cb52:	1c0c		add	r4, r1, #0
  83cb54:	1c05		add	r5, r0, #0
  83cb56:	2a01		cmp	r2, #1
  83cb58:	d00e		beq	0x83cb78
  83cb5a:	2a02		cmp	r2, #2
  83cb5c:	d118		bne	0x83cb90
  83cb5e:	a0c7		add	r0, pc, #796	; 0x31c
  83cb60:	1c29		add	r1, r5, #0
  83cb62:	1c22		add	r2, r4, #0
  83cb64:	f707 fd98	bl	0x744698
  83cb68:	2800		cmp	r0, #0
  83cb6a:	d511		bpl	0x83cb90
  83cb6c:	4842		ldr	r0, =0x801964	; via 0x83cc78
  83cb6e:	2152		mov	r1, #82	; 0x52
  83cb70:	7001		strb	r1, [r0, #0]
  83cb72:	2144		mov	r1, #68	; 0x44
  83cb74:	7041		strb	r1, [r0, #1]
  83cb76:	bd30		pop	{r4, r5, pc}
  83cb78:	a0c4		add	r0, pc, #784	; 0x310
  83cb7a:	1c29		add	r1, r5, #0
  83cb7c:	1c22		add	r2, r4, #0
  83cb7e:	f707 fd8b	bl	0x744698
  83cb82:	2800		cmp	r0, #0
  83cb84:	d504		bpl	0x83cb90
  83cb86:	1c28		add	r0, r5, #0
  83cb88:	49c5		ldr	r1, =0x83c1d0	; via 0x83cea0
  83cb8a:	1c22		add	r2, r4, #0
  83cb8c:	f002 fe86	bl	0x83f89c	; C$MEMCPY
  83cb90:	bd30		pop	{r4, r5, pc}
  83cb92:	2000		mov	r0, #0
  83cb94:	4770		bx	lr
  83cb96:	46c0		nop			(mov r8, r8)

$l1_initialize call trampoline
  848a7c:	b082		sub	sp, #8
  848a7e:	9400		str	r4, [sp, #0]
  848a80:	4c01		ldr	r4, =0x31c6e4	; via 0x848a88
  848a82:	9401		str	r4, [sp, #4]
  848a84:	bd10		pop	{r4, pc}
  848a86:	0000
  848a88:	0031c6e4

XRAM data:

0x17649b8:	ABB_Hisr
0x1764a10:	ABB_HisrStack

0x17729d0:	init data array that should have been const instead,
		mapping from system current draw to voltage drop
		that can be modeled as the battery's internal resistance:
		005A ( 90) 0017 (23)
		00AA (170) 002D (45)
		00FA (250) 0050 (80)

0x17741e0:	abb_sem

0x17749b8:	8-bit var zeroed in pwr_stop_charging(), set to 1 in
		pwr_start_CI_charging() and pwr_start_CV_charging()

0x1774b78:	16-bit var, gets -4 written into it if the battery T
		is too high, or -5 if it is too low
0x1774b7a:	16-bit var set to 0 when starting CI charging,
		set to 1 when starting CV charging
0x1774b7c:	16-bit var battery voltage in mV
0x1774b7e:	16-bit var zeroed in pwr_stop_charging()
0x1774b80:	16-bit var zeroed in pwr_stop_charging()
0x1774b82:	16-bit var gets i2v offset (raw ADC) written into it

0x1774ccc:	16-bit var initial battery % is stored here

0x1774cd0:	16-bit var, ABB_Read_Status() return value at the beginning
		of Switch_ON() is stored here

0x1774cd4:	32-bit var BatOperationMode

0x1774e38:	SPI_GBL_INFO_PTR
0x1774e3c:	spi_error_ft

0x1774e70:	pwr_env_ctrl_blk
0x1774e74:	pwr_error_ft

0x1775041:	byte var set to 0 in spi_abb_read_int_reg_callback()
		in ADC end processing

0x1775138:	16-bit var, stores a number that goes up as the display
		backlight intensity increases, probably the backlight's
		expected current draw

0x177513a:	8-bit var, flag indicating if the display backlight is on