view arm7dis/armdis.c @ 87:f7fba8518fa2

armdis: skeleton compiles
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 29 Mar 2014 00:23:16 +0000
parents 537cf2245d98
children 691551f0635b
line wrap: on
line source

#include <sys/types.h>
#include <stdio.h>
#include <stdlib.h>

extern char *binfilename;
extern u_char *filemap;
extern unsigned disasm_len, base_vma;

extern unsigned get_u16(), get_u32();

extern char *regnames[16], *condition_decode[16];

static void
arm_branch(off, word)
	unsigned off, word;
{
	unsigned dest;

	dest = (word & 0x00FFFFFF) << 2;
	if (dest & 0x02000000)
		dest |= 0xFC000000;
	dest += base_vma + off + 8;
	printf("b%s%s\t0x%x\n", word&0x1000000 ? "l" : "",
		condition_decode[word>>28], dest);
}

void
arm_disasm_line(off)
	unsigned off;
{
	unsigned word;

	word = get_u32(filemap + off);
	printf("%8x:\t%08x\t", base_vma + off, word);
	if ((word >> 28) == 0xF) {
		printf("invalid-F\n");
		return;
	}
	switch ((word >> 24) & 0xF) {
	case 0:
	case 1:
		printf("<data processing, register operand>\n");
		return;
	case 2:
	case 3:
		printf("<data processing, immediate operand>\n");
		return;
	case 4:
	case 5:
		printf("<ldr/str, immediate offset>\n");
		return;
	case 6:
	case 7:
		printf("<ldr/str, register offset>\n");
		return;
	case 8:
	case 9:
		printf("<ldm/stm>\n");
		return;
	case 0xA:
	case 0xB:
		arm_branch(off, word);
		return;
	case 0xC:
	case 0xD:
	case 0xE:
		printf("<COPROCESSOR>\n");
		return;
	case 0xF:
		printf("swi%s\t0x%x\n", condition_decode[word>>28],
			word & 0xFFFFFF);
		return;
	}
}

main(argc, argv)
	char **argv;
{
	unsigned off;

	common_init(argc, argv, 4);
	for (off = 0; off < disasm_len; off += 4)
		arm_disasm_line(off);
	exit(0);
}