FreeCalypso > hg > freecalypso-reveng
changeset 316:2ceb1f263e19
frbl/reconst: first attempt to compile boot.c
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Wed, 04 Mar 2020 23:41:51 +0000 |
parents | bc3391aa3d35 |
children | c71e3156170a |
files | frbl/reconst/Makefile frbl/reconst/boot.c frbl/reconst/chipset.cfg frbl/reconst/cl470 |
diffstat | 4 files changed, 23 insertions(+), 5 deletions(-) [+] |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/frbl/reconst/Makefile Wed Mar 04 23:41:51 2020 +0000 @@ -0,0 +1,11 @@ +CFLAGS= -mn -mt -mw -me -pw2 +CPPFLAGS=-DTOOL_CHOICE=0 -D_TMS470 -I. -Iinc +OBJS= boot.obj + +all: ${OBJS} + +%.obj: %.c + ./cl470 -q -c ${CFLAGS} ${CPPFLAGS} $< + +clean: + rm -f *.obj
--- a/frbl/reconst/boot.c Wed Mar 04 23:17:27 2020 +0000 +++ b/frbl/reconst/boot.c Wed Mar 04 23:41:51 2020 +0000 @@ -45,7 +45,7 @@ #if (CHIPSET == 3) asm("STACK_INIT .equ 03000000h"); asm("STACK_ADD .equ 00020000h ; 128kB"); -#elif (CHIPSET == 7) +#elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11) asm("STACK_INIT .equ 00800000h"); asm("STACK_ADD .equ 00020000h ; 128kB"); #elif (CHIPSET == 12) @@ -203,7 +203,8 @@ ******************************************************************************/ #if (CHIPSET == 3) #define IQ_MASK (0xFFFFFA02) /* Mask Interrupt Register */ -#elif (CHIPSET == 7) || (CHIPSET == 12) +#elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11) \ + || (CHIPSET == 12) #define IQ_MASK1 (0xFFFFFA08) /* Mask Interrupt Register 1 */ #define IQ_MASK2 (0xFFFFFA0A) /* Mask Interrupt Register 2 */ #else @@ -232,7 +233,7 @@ // Mask all interrupts #if (CHIPSET == 3) *((volatile uint16 *) IQ_MASK) = 0xFFFF; -#elif (CHIPSET == 7) +#elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11) *((volatile uint16 *) IQ_MASK1) = 0xFFFF; *((volatile uint16 *) IQ_MASK2) = 0x001F; #elif (CHIPSET == 12) @@ -249,7 +250,7 @@ #endif -#if (CHIPSET == 3) || (CHIPSET == 7) +#if (CHIPSET == 3) || (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11) // FIXME: Describe exactly how the CSs are initialized *((volatile uint16 *) CS0_MEM_REG) = 0x2A1; *((volatile uint16 *) CS1_MEM_REG) = 0x2A1; @@ -273,7 +274,7 @@ clk |= (2 << 4); *(volatile uint16 *) CLKM_CNTL_ARM_CLK = clk; -#elif (CHIPSET == 7) +#elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11) // Reset DPLL register * (volatile uint16 *) MEM_DPLL_ADDR = DPLL_RESET_VALUE;