FreeCalypso > hg > freecalypso-reveng
changeset 243:83715e0c65de
pirelli/fw-disasm: first round of ABB functions
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sat, 23 Dec 2017 08:27:26 +0000 |
parents | 5eca9fccd706 |
children | f40f069b0d06 |
files | pirelli/fw-disasm |
diffstat | 1 files changed, 291 insertions(+), 1 deletions(-) [+] |
line wrap: on
line diff
--- a/pirelli/fw-disasm Sat Dec 23 03:56:02 2017 +0000 +++ b/pirelli/fw-disasm Sat Dec 23 08:27:26 2017 +0000 @@ -481,6 +481,294 @@ 406d0: 1afffffb bne 0x406c4 406d4: e8bd8001 ldmia sp!, {r0, pc} +$ABB_Sem_Create: + 3491ee: b500 push {lr} + 3491f0: 48f2 ldr r0, =0x17741e0 ; via 0x3495bc + 3491f2: a1f0 add r1, pc, #960 ; 0x3c0 + 3491f4: 2201 mov r2, #1 + 3491f6: 2306 mov r3, #6 + 3491f8: f0b0 fb88 bl 0x3f990c ; $SMCE_Create_Semaphore + 3491fc: bd00 pop {pc} + +$ABB_Wait_IBIC_Access: + 3491fe: b500 push {lr} + 349200: 48ef ldr r0, =0x33450 ; via 0x3495c0 + 349202: f099 fe6c bl 0x3e2ede ; $convert_nanosec_to_cycles + 349206: f099 fee4 bl 0x3e2fd2 ; $wait_ARM_cycles + 34920a: bd00 pop {pc} + +$ABB_Write_Register_on_page: + 34920c: b500 push {lr} + 34920e: b082 sub sp, #8 + 349210: 466b mov r3, sp + 349212: 809a strh r2, [r3, #4] + 349214: 466a mov r2, sp + 349216: 8051 strh r1, [r2, #2] + 349218: 4669 mov r1, sp + 34921a: 8008 strh r0, [r1, #0] + 34921c: 48e7 ldr r0, =0x17741e0 ; via 0x3495bc + 34921e: 2100 mov r1, #0 + 349220: 43c9 mvn r1, r1 + 349222: f0b0 fb63 bl 0x3f98ec ; $SMCE_Obtain_Semaphore + 349226: 49f9 ldr r1, =0xfffe3000 ; via 0x34960c + 349228: 2011 mov r0, #17 ; 0x11 + 34922a: 880a ldrh r2, [r1, #0] + 34922c: 4310 orr r0, r2 + 34922e: 8008 strh r0, [r1, #0] + 349230: 4668 mov r0, sp + 349232: 4995 ldr r1, =0xfffe3006 ; via 0x349488 + 349234: 8809 ldrh r1, [r1, #0] + 349236: 80c1 strh r1, [r0, #6] + 349238: 8800 ldrh r0, [r0, #0] + 34923a: f7ff ff4c bl 0x3490d6 + 34923e: 4668 mov r0, sp + 349240: 8840 ldrh r0, [r0, #2] + 349242: 4669 mov r1, sp + 349244: 8889 ldrh r1, [r1, #4] + 349246: f7ff ff6a bl 0x34911e + 34924a: 2001 mov r0, #1 + 34924c: f7ff ff43 bl 0x3490d6 + 349250: 48da ldr r0, =0x17741e0 ; via 0x3495bc + 349252: f0b0 fb43 bl 0x3f98dc ; $SMCE_Release_Semaphore + 349256: b002 add sp, #8 + 349258: bd00 pop {pc} + +$ABB_Read_Register_on_page: + 34925a: b500 push {lr} + 34925c: b082 sub sp, #8 + 34925e: 466a mov r2, sp + 349260: 8051 strh r1, [r2, #2] + 349262: 4669 mov r1, sp + 349264: 8008 strh r0, [r1, #0] + 349266: 48d5 ldr r0, =0x17741e0 ; via 0x3495bc + 349268: 2100 mov r1, #0 + 34926a: 43c9 mvn r1, r1 + 34926c: f0b0 fb3e bl 0x3f98ec + 349270: 49e6 ldr r1, =0xfffe3000 ; via 0x34960c + 349272: 2031 mov r0, #49 ; 0x31 + 349274: 880a ldrh r2, [r1, #0] + 349276: 4310 orr r0, r2 + 349278: 8008 strh r0, [r1, #0] + 34927a: 4668 mov r0, sp + 34927c: 4982 ldr r1, =0xfffe3006 ; via 0x349488 + 34927e: 8809 ldrh r1, [r1, #0] + 349280: 8081 strh r1, [r0, #4] + 349282: 8800 ldrh r0, [r0, #0] + 349284: f7ff ff27 bl 0x3490d6 + 349288: 4668 mov r0, sp + 34928a: 8840 ldrh r0, [r0, #2] + 34928c: f7ff ff6d bl 0x34916a + 349290: 4669 mov r1, sp + 349292: 80c8 strh r0, [r1, #6] + 349294: 2001 mov r0, #1 + 349296: f7ff ff1e bl 0x3490d6 + 34929a: 48c8 ldr r0, =0x17741e0 ; via 0x3495bc + 34929c: f0b0 fb1e bl 0x3f98dc + 3492a0: 4668 mov r0, sp + 3492a2: 88c0 ldrh r0, [r0, #6] + 3492a4: b002 add sp, #8 + 3492a6: bd00 pop {pc} + +$ABB_free_13M: + 3492a8: b500 push {lr} + 3492aa: b081 sub sp, #4 + 3492ac: 49d7 ldr r1, =0xfffe3000 ; via 0x34960c + 3492ae: 2011 mov r0, #17 ; 0x11 + 3492b0: 880a ldrh r2, [r1, #0] + 3492b2: 4310 orr r0, r2 + 3492b4: 8008 strh r0, [r1, #0] + 3492b6: 4669 mov r1, sp + 3492b8: 4873 ldr r0, =0xfffe3006 ; via 0x349488 + 3492ba: 8800 ldrh r0, [r0, #0] + 3492bc: 8008 strh r0, [r1, #0] + 3492be: 2001 mov r0, #1 + 3492c0: f7ff ff09 bl 0x3490d6 + 3492c4: 200a mov r0, #10 ; 0xa + 3492c6: 2108 mov r1, #8 + 3492c8: f7ff ff29 bl 0x34911e + 3492cc: f7ff ff97 bl 0x3491fe + 3492d0: 200a mov r0, #10 ; 0xa + 3492d2: 2108 mov r1, #8 + 3492d4: f7ff ff23 bl 0x34911e + 3492d8: f7ff ff91 bl 0x3491fe + 3492dc: b001 add sp, #4 + 3492de: bd00 pop {pc} + +$ABB_stop_13M: + 3492e0: b500 push {lr} + 3492e2: b081 sub sp, #4 + 3492e4: 49c9 ldr r1, =0xfffe3000 ; via 0x34960c + 3492e6: 2011 mov r0, #17 ; 0x11 + 3492e8: 880a ldrh r2, [r1, #0] + 3492ea: 4310 orr r0, r2 + 3492ec: 8008 strh r0, [r1, #0] + 3492ee: 4669 mov r1, sp + 3492f0: 4865 ldr r0, =0xfffe3006 ; via 0x349488 + 3492f2: 8800 ldrh r0, [r0, #0] + 3492f4: 8008 strh r0, [r1, #0] + 3492f6: 2001 mov r0, #1 + 3492f8: f7ff feed bl 0x3490d6 + 3492fc: 200a mov r0, #10 ; 0xa + 3492fe: 2104 mov r1, #4 + 349300: f7ff ff0d bl 0x34911e + 349304: f7ff ff7b bl 0x3491fe + 349308: b001 add sp, #4 + 34930a: bd00 pop {pc} + +$ABB_Read_Status: + 34930c: b500 push {lr} + 34930e: b081 sub sp, #4 + 349310: 48aa ldr r0, =0x17741e0 ; via 0x3495bc + 349312: 2100 mov r1, #0 + 349314: 43c9 mvn r1, r1 + 349316: f0b0 fae9 bl 0x3f98ec ; $SMCE_Obtain_Semaphore + 34931a: 49bc ldr r1, =0xfffe3000 ; via 0x34960c + 34931c: 2011 mov r0, #17 ; 0x11 + 34931e: 880a ldrh r2, [r1, #0] + 349320: 4310 orr r0, r2 + 349322: 8008 strh r0, [r1, #0] + 349324: 4669 mov r1, sp + 349326: 4858 ldr r0, =0xfffe3006 ; via 0x349488 + 349328: 8800 ldrh r0, [r0, #0] + 34932a: 8008 strh r0, [r1, #0] + 34932c: 2001 mov r0, #1 + 34932e: f7ff fed2 bl 0x3490d6 + 349332: 2001 mov r0, #1 + 349334: f7ff fecf bl 0x3490d6 + 349338: 203e mov r0, #62 ; 0x3e + 34933a: f7ff ff16 bl 0x34916a + 34933e: 4669 mov r1, sp + 349340: 8048 strh r0, [r1, #2] + 349342: 489e ldr r0, =0x17741e0 ; via 0x3495bc + 349344: f0b0 faca bl 0x3f98dc ; $SMCE_Release_Semaphore + 349348: 4668 mov r0, sp + 34934a: 8840 ldrh r0, [r0, #2] + 34934c: b001 add sp, #4 + 34934e: bd00 pop {pc} + +$ABB_on: + 349350: b500 push {lr} + 349352: b083 sub sp, #12 ; 0xc + 349354: 466a mov r2, sp + 349356: 7091 strb r1, [r2, #2] + 349358: 4669 mov r1, sp + 34935a: 8008 strh r0, [r1, #0] + 34935c: 4897 ldr r0, =0x17741e0 ; via 0x3495bc + 34935e: 2100 mov r1, #0 + 349360: 43c9 mvn r1, r1 + 349362: f0b0 fac3 bl 0x3f98ec + 349366: 4668 mov r0, sp + 349368: 7880 ldrb r0, [r0, #2] + 34936a: 2800 cmp r0, #0 + 34936c: d003 beq 0x349376 + 34936e: f7ff ff9b bl 0x3492a8 + 349372: f7ff ff99 bl 0x3492a8 + 349376: 49a5 ldr r1, =0xfffe3000 ; via 0x34960c + 349378: 2031 mov r0, #49 ; 0x31 + 34937a: 880a ldrh r2, [r1, #0] + 34937c: 4310 orr r0, r2 + 34937e: 8008 strh r0, [r1, #0] + 349380: 4669 mov r1, sp + 349382: 4841 ldr r0, =0xfffe3006 ; via 0x349488 + 349384: 8800 ldrh r0, [r0, #0] + 349386: 8088 strh r0, [r1, #4] + 349388: 2001 mov r0, #1 + 34938a: f7ff fea4 bl 0x3490d6 + 34938e: 2008 mov r0, #8 + 349390: 21ff mov r1, #255 ; 0xff + 349392: 3156 add r1, #86 ; 0x56 + 349394: f7ff fec3 bl 0x34911e + 349398: 2002 mov r0, #2 + 34939a: f7ff fe9c bl 0x3490d6 + 34939e: 202a mov r0, #42 ; 0x2a + 3493a0: 2101 mov r1, #1 + 3493a2: f7ff febc bl 0x34911e + 3493a6: 2026 mov r0, #38 ; 0x26 + 3493a8: 2101 mov r1, #1 + 3493aa: f7ff feb8 bl 0x34911e + 3493ae: 2028 mov r0, #40 ; 0x28 + 3493b0: 211b mov r1, #27 ; 0x1b + 3493b2: f7ff feb4 bl 0x34911e + 3493b6: 2010 mov r0, #16 ; 0x10 + 3493b8: f7ff fe8d bl 0x3490d6 + 3493bc: 203c mov r0, #60 ; 0x3c + 3493be: 2107 mov r1, #7 + 3493c0: f7ff fead bl 0x34911e + 3493c4: 2002 mov r0, #2 + 3493c6: f7ff fe86 bl 0x3490d6 + 3493ca: 2028 mov r0, #40 ; 0x28 + 3493cc: 2101 mov r1, #1 + 3493ce: f7ff fea6 bl 0x34911e + 3493d2: 2026 mov r0, #38 ; 0x26 + 3493d4: 2100 mov r1, #0 + 3493d6: f7ff fea2 bl 0x34911e + 3493da: 201a mov r0, #26 ; 0x1a + 3493dc: 2160 mov r1, #96 ; 0x60 + 3493de: f7ff fe9e bl 0x34911e + 3493e2: 2026 mov r0, #38 ; 0x26 + 3493e4: 2101 mov r1, #1 + 3493e6: f7ff fe9a bl 0x34911e + 3493ea: 2028 mov r0, #40 ; 0x28 + 3493ec: 211a mov r1, #26 ; 0x1a + 3493ee: f7ff fe96 bl 0x34911e + 3493f2: 2001 mov r0, #1 + 3493f4: f7ff fe6f bl 0x3490d6 + 3493f8: 4668 mov r0, sp + 3493fa: 8800 ldrh r0, [r0, #0] + 3493fc: 0980 lsr r0, r0, #6 + 3493fe: 0400 lsl r0, r0, #16 + 349400: 0c01 lsr r1, r0, #16 + 349402: 2008 mov r0, #8 + 349404: f7ff fe8b bl 0x34911e + 349408: 4668 mov r0, sp + 34940a: 8800 ldrh r0, [r0, #0] + 34940c: 0c00 lsr r0, r0, #16 + 34940e: d303 bcc 0x349418 + 349410: 2038 mov r0, #56 ; 0x38 + 349412: 2101 mov r1, #1 + 349414: f7ff fe83 bl 0x34911e + 349418: 2002 mov r0, #2 + 34941a: f7ff fe5c bl 0x3490d6 + 34941e: 203c mov r0, #60 ; 0x3c + 349420: f7ff fea3 bl 0x34916a + 349424: 05c0 lsl r0, r0, #23 + 349426: 0f00 lsr r0, r0, #28 + 349428: 0140 lsl r0, r0, #5 + 34942a: 9002 str r0, [sp, #8] + 34942c: 201f mov r0, #31 ; 0x1f + 34942e: 9902 ldr r1, [sp, #8] + 349430: 4308 orr r0, r1 + 349432: 0400 lsl r0, r0, #16 + 349434: 0c01 lsr r1, r0, #16 + 349436: 203c mov r0, #60 ; 0x3c + 349438: f7ff fe71 bl 0x34911e + 34943c: 203e mov r0, #62 ; 0x3e + 34943e: f7ff fe94 bl 0x34916a + 349442: 05c0 lsl r0, r0, #23 + 349444: 0f00 lsr r0, r0, #28 + 349446: 0140 lsl r0, r0, #5 + 349448: 9002 str r0, [sp, #8] + 34944a: 4668 mov r0, sp + 34944c: 8901 ldrh r1, [r0, #8] + 34944e: 203e mov r0, #62 ; 0x3e + 349450: f7ff fe65 bl 0x34911e + 349454: 2001 mov r0, #1 + 349456: f7ff fe3e bl 0x3490d6 + 34945a: 2008 mov r0, #8 + 34945c: 210a mov r1, #10 ; 0xa + 34945e: f7ff fe5e bl 0x34911e + 349462: 48e5 ldr r0, =0xf4240 ; via 0x3497f8 + 349464: f099 fd3b bl 0x3e2ede + 349468: f099 fdb3 bl 0x3e2fd2 + 34946c: 2008 mov r0, #8 + 34946e: 2105 mov r1, #5 + 349470: f7ff fe55 bl 0x34911e + 349474: 4851 ldr r0, =0x17741e0 ; via 0x3495bc + 349476: f0b0 fa31 bl 0x3f98dc + 34947a: b003 add sp, #12 ; 0xc + 34947c: bd00 pop {pc} + 34947e: 46c0 nop (mov r8, r8) + $Init_Target: 3bb7d4: b570 push {r4, r5, r6, lr} 3bb7d6: b081 sub sp, #4 @@ -724,7 +1012,7 @@ $Init_Drivers: 3bb9ca: b500 push {lr} - 3bb9cc: f78d fc0f bl 0x3491ee + 3bb9cc: f78d fc0f bl 0x3491ee ; $ABB_Sem_Create 3bb9d0: f5a6 fa25 bl 0x161e1e 3bb9d4: f7ad fda3 bl 0x36951e 3bb9d8: f039 fb95 bl 0x3f5106 @@ -1641,6 +1929,8 @@ XRAM data: +0x17741e0: abb_sem + 0x1774e38: SPI_GBL_INFO_PTR 0x1774e3c: spi_error_ft