changeset 244:f40f069b0d06

pirelli/fw-disasm: ABB_Read_ADC() and ABB_Conf_ADC() located
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 23 Dec 2017 16:38:50 +0000
parents 83715e0c65de
children 9cd7fa86da47
files pirelli/fw-disasm
diffstat 1 files changed, 136 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/pirelli/fw-disasm	Sat Dec 23 08:27:26 2017 +0000
+++ b/pirelli/fw-disasm	Sat Dec 23 16:38:50 2017 +0000
@@ -769,6 +769,142 @@
   34947c:	bd00		pop	{pc}
   34947e:	46c0		nop			(mov r8, r8)
 
+  349480:	fffe300c
+  349484:	fffe300e
+  349488:	fffe3006
+  34948c:	fffe3004
+  349490:	fffe300a
+  349494:	0000021b
+
+$ABB_Read_ADC:
+  349498:	b500		push	{lr}
+  34949a:	b082		sub	sp, #8
+  34949c:	9000		str	r0, [sp, #0]
+  34949e:	4847		ldr	r0, =0x17741e0	; via 0x3495bc
+  3494a0:	2100		mov	r1, #0
+  3494a2:	43c9		mvn	r1, r1
+  3494a4:	f0b0 fa22	bl	0x3f98ec
+  3494a8:	4958		ldr	r1, =0xfffe3000	; via 0x34960c
+  3494aa:	2031		mov	r0, #49	; 0x31
+  3494ac:	880a		ldrh	r2, [r1, #0]
+  3494ae:	4310		orr	r0, r2
+  3494b0:	8008		strh	r0, [r1, #0]
+  3494b2:	4669		mov	r1, sp
+  3494b4:	48ef		ldr	r0, =0xfffe3006	; via 0x349874
+  3494b6:	8800		ldrh	r0, [r0, #0]
+  3494b8:	8088		strh	r0, [r1, #4]
+  3494ba:	2001		mov	r0, #1
+  3494bc:	f7ff fe0b	bl	0x3490d6
+  3494c0:	201e		mov	r0, #30	; 0x1e
+  3494c2:	f7ff fe52	bl	0x34916a
+  3494c6:	9900		ldr	r1, [sp, #0]
+  3494c8:	1c8a		add	r2, r1, #2
+  3494ca:	9200		str	r2, [sp, #0]
+  3494cc:	8008		strh	r0, [r1, #0]
+  3494ce:	2020		mov	r0, #32	; 0x20
+  3494d0:	f7ff fe4b	bl	0x34916a
+  3494d4:	9900		ldr	r1, [sp, #0]
+  3494d6:	1c8a		add	r2, r1, #2
+  3494d8:	9200		str	r2, [sp, #0]
+  3494da:	8008		strh	r0, [r1, #0]
+  3494dc:	2022		mov	r0, #34	; 0x22
+  3494de:	f7ff fe44	bl	0x34916a
+  3494e2:	9900		ldr	r1, [sp, #0]
+  3494e4:	1c8a		add	r2, r1, #2
+  3494e6:	9200		str	r2, [sp, #0]
+  3494e8:	8008		strh	r0, [r1, #0]
+  3494ea:	2024		mov	r0, #36	; 0x24
+  3494ec:	f7ff fe3d	bl	0x34916a
+  3494f0:	9900		ldr	r1, [sp, #0]
+  3494f2:	1c8a		add	r2, r1, #2
+  3494f4:	9200		str	r2, [sp, #0]
+  3494f6:	8008		strh	r0, [r1, #0]
+  3494f8:	2026		mov	r0, #38	; 0x26
+  3494fa:	f7ff fe36	bl	0x34916a
+  3494fe:	9900		ldr	r1, [sp, #0]
+  349500:	1c8a		add	r2, r1, #2
+  349502:	9200		str	r2, [sp, #0]
+  349504:	8008		strh	r0, [r1, #0]
+  349506:	2028		mov	r0, #40	; 0x28
+  349508:	f7ff fe2f	bl	0x34916a
+  34950c:	9900		ldr	r1, [sp, #0]
+  34950e:	1c8a		add	r2, r1, #2
+  349510:	9200		str	r2, [sp, #0]
+  349512:	8008		strh	r0, [r1, #0]
+  349514:	202a		mov	r0, #42	; 0x2a
+  349516:	f7ff fe28	bl	0x34916a
+  34951a:	9900		ldr	r1, [sp, #0]
+  34951c:	1c8a		add	r2, r1, #2
+  34951e:	9200		str	r2, [sp, #0]
+  349520:	8008		strh	r0, [r1, #0]
+  349522:	202c		mov	r0, #44	; 0x2c
+  349524:	f7ff fe21	bl	0x34916a
+  349528:	9900		ldr	r1, [sp, #0]
+  34952a:	1c8a		add	r2, r1, #2
+  34952c:	9200		str	r2, [sp, #0]
+  34952e:	8008		strh	r0, [r1, #0]
+  349530:	4822		ldr	r0, =0x17741e0	; via 0x3495bc
+  349532:	f0b0 f9d3	bl	0x3f98dc
+  349536:	b002		add	sp, #8
+  349538:	bd00		pop	{pc}
+
+$ABB_Conf_ADC:
+  34953a:	b500		push	{lr}
+  34953c:	b082		sub	sp, #8
+  34953e:	466a		mov	r2, sp
+  349540:	8051		strh	r1, [r2, #2]
+  349542:	4669		mov	r1, sp
+  349544:	8008		strh	r0, [r1, #0]
+  349546:	481d		ldr	r0, =0x17741e0	; via 0x3495bc
+  349548:	2100		mov	r1, #0
+  34954a:	43c9		mvn	r1, r1
+  34954c:	f0b0 f9ce	bl	0x3f98ec
+  349550:	492e		ldr	r1, =0xfffe3000	; via 0x34960c
+  349552:	2031		mov	r0, #49	; 0x31
+  349554:	880a		ldrh	r2, [r1, #0]
+  349556:	4310		orr	r0, r2
+  349558:	8008		strh	r0, [r1, #0]
+  34955a:	4669		mov	r1, sp
+  34955c:	48c5		ldr	r0, =0xfffe3006	; via 0x349874
+  34955e:	8800		ldrh	r0, [r0, #0]
+  349560:	8088		strh	r0, [r1, #4]
+  349562:	2001		mov	r0, #1
+  349564:	f7ff fdb7	bl	0x3490d6
+  349568:	201a		mov	r0, #26	; 0x1a
+  34956a:	4669		mov	r1, sp
+  34956c:	8809		ldrh	r1, [r1, #0]
+  34956e:	f7ff fdd6	bl	0x34911e
+  349572:	2034		mov	r0, #52	; 0x34
+  349574:	f7ff fdf9	bl	0x34916a
+  349578:	4669		mov	r1, sp
+  34957a:	80c8		strh	r0, [r1, #6]
+  34957c:	4668		mov	r0, sp
+  34957e:	8840		ldrh	r0, [r0, #2]
+  349580:	49cb		ldr	r1, =0x3df	; via 0x3498b0
+  349582:	4288		cmp	r0, r1
+  349584:	d104		bne	0x349590
+  349586:	48ca		ldr	r0, =0x3df	; via 0x3498b0
+  349588:	4669		mov	r1, sp
+  34958a:	88c9		ldrh	r1, [r1, #6]
+  34958c:	4008		and	r0, r1
+  34958e:	e007		b	0x3495a0
+  349590:	4668		mov	r0, sp
+  349592:	8840		ldrh	r0, [r0, #2]
+  349594:	2820		cmp	r0, #32	; 0x20
+  349596:	d108		bne	0x3495aa
+  349598:	2020		mov	r0, #32	; 0x20
+  34959a:	4669		mov	r1, sp
+  34959c:	88c9		ldrh	r1, [r1, #6]
+  34959e:	4308		orr	r0, r1
+  3495a0:	0400		lsl	r0, r0, #16
+  3495a2:	0c01		lsr	r1, r0, #16
+  3495a4:	2034		mov	r0, #52	; 0x34
+  3495a6:	f7ff fdba	bl	0x34911e
+  3495aa:	4804		ldr	r0, =0x17741e0	; via 0x3495bc
+  3495ac:	f0b0 f996	bl	0x3f98dc
+  3495b0:	b002		add	sp, #8
+  3495b2:	bd00		pop	{pc}
+
 $Init_Target:
   3bb7d4:	b570		push	{r4, r5, r6, lr}
   3bb7d6:	b081		sub	sp, #4