FreeCalypso > hg > freecalypso-schem2

annotate venus/src/usb/usb_domain_bctl.v @ 44:04abc82f8280

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MCL and primitives: LCD and MAX1916 from lunalcd2
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 27 Nov 2021 01:09:05 +0000
parents 9309cebe07b8
children
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1 /*
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2 * This module encapsulates the USB domain circuit for boot control.
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3 */
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5 module usb_domain_bctl (GND, P_3V3, ChanB_RTS, ChanB_DTR, CTL1_out, CTL2_out);
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7 input GND, P_3V3;
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8 input ChanB_RTS, ChanB_DTR;
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9 output CTL1_out, CTL2_out;
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11 /* pull-up resistors on FT2232D outputs */
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13 resistor ChanB_RTS_pullup (ChanB_RTS, P_3V3);
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14 resistor ChanB_DTR_pullup (ChanB_DTR, P_3V3);
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16 /* open drain buffers */
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18 logic_ic_common od_buf_common ( .Vcc(P_3V3),
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19 .GND(GND)
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20 );
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22 capacitor od_buf_bypass_cap (P_3V3, GND);
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9309cebe07b8 use buffer_slot_od primitive for slots of 74LVC2G07
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24 buffer_slot_od buf_CTL1 (.A(ChanB_RTS), .Y(CTL1_out));
9309cebe07b8 use buffer_slot_od primitive for slots of 74LVC2G07
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25 buffer_slot_od buf_CTL2 (.A(ChanB_DTR), .Y(CTL2_out));
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27 endmodule