FreeCalypso > hg > freecalypso-schem2
annotate venus/src/periph/calypso_uart_in.v @ 94:4502eec1e805
D405: use Nexperia part sourced from Digi-Key direct
The previously selected part was from a Digi-Key marketplace vendor,
and they seem to not actually have that part, as the order has been
in limbo for over a month - so I put in the time and effort to look
around, and found a readily available equivalent part from Nexperia.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 11 Jan 2022 19:11:22 +0000 |
parents | d33cb696b335 |
children |
rev | line source |
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venus/src/periph/calypso_uart_in.v written
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1 /* |
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2 * This module encapsulates the mobile power domain buffers |
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3 * in front of Calypso UART inputs. |
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4 */ |
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5 |
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6 module calypso_uart_in (GND, VBAT, Vio, |
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7 Host_TxD, Host_RTS, Host_DTR, Host_TxD2, |
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8 RX_MODEM, CTS_MODEM, GPIO_DTR, RX_IRDA); |
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9 |
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10 input GND, VBAT, Vio; |
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11 input Host_TxD, Host_RTS, Host_DTR, Host_TxD2; |
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12 output RX_MODEM, CTS_MODEM, GPIO_DTR, RX_IRDA; |
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13 |
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14 /* U401 buffer common part */ |
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15 logic_ic_common U401_common (.Vcc(Vio), .GND(GND)); |
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parents:
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16 |
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add missing bypass caps for mobile domain peripherals
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17 /* bypass capacitor */ |
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add missing bypass caps for mobile domain peripherals
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18 capacitor U401_bypass (Vio, GND); |
d33cb696b335
add missing bypass caps for mobile domain peripherals
Mychaela Falconia <falcon@freecalypso.org>
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19 |
15
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20 /* buffer slots */ |
26
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21 buffer_slot_3state Host_TxD_buffer (.A(Host_TxD), .nOE(GND), .Y(RX_MODEM)); |
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22 buffer_slot_3state Host_RTS_buffer (.A(Host_RTS), .nOE(GND), .Y(CTS_MODEM)); |
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23 buffer_slot_3state Host_DTR_buffer (.A(Host_DTR), .nOE(GND), .Y(GPIO_DTR)); |
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24 buffer_slot_3state Host_TxD2_buffer (.A(Host_TxD2), .nOE(GND), .Y(RX_IRDA)); |
15
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25 |
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Mychaela Falconia <falcon@freecalypso.org>
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26 /* pull-ups to VBAT */ |
42a02257d457
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27 resistor Host_TxD_pullup (Host_TxD, VBAT); |
42a02257d457
venus/src/periph/calypso_uart_in.v written
Mychaela Falconia <falcon@freecalypso.org>
parents:
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28 resistor Host_DTR_pullup (Host_DTR, VBAT); |
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venus/src/periph/calypso_uart_in.v written
Mychaela Falconia <falcon@freecalypso.org>
parents:
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29 resistor Host_TxD2_pullup (Host_TxD2, VBAT); |
42a02257d457
venus/src/periph/calypso_uart_in.v written
Mychaela Falconia <falcon@freecalypso.org>
parents:
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30 |
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parents:
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31 /* pull-down to GND */ |
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venus/src/periph/calypso_uart_in.v written
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32 resistor Host_RTS_pulldown (Host_RTS, GND); |
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venus/src/periph/calypso_uart_in.v written
Mychaela Falconia <falcon@freecalypso.org>
parents:
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33 |
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venus/src/periph/calypso_uart_in.v written
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34 endmodule |