annotate venus/doc/USB-and-mobile-domains @ 91:711358516b55

venus/doc/MEMIF-fixed-2.8V: update for new MCP
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 11 Dec 2021 03:34:04 +0000
parents beb6519a3be5
children
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1 1. Introduction
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2
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3 FC Venus board will consist of two principal circuit domains: the mobile domain
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4 corresponding to a battery-powered mobile phone and a USB computer interface
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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5 block which becomes the USB domain. The USB domain will be based around FT2232D
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6 USB to dual UART chip, it will be strictly bus-powered (never taking any power
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7 from the battery), and its sole purpose is to provide a host computer interface
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8 to the mobile, i.e., make the two Calypso UARTs accessible via USB. The USB
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9 domain will get powered only when a host computer (or a USB charger) is
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10 connected, and will be totally unpowered at all other times, i.e., when the
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11 board is untethered and runs on battery power like a true mobile phone.
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12
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13 At the top level of circuit hierarchy (see src/top/board.v), our board consists
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14 of the two principal domains (mobile and USB) interconnected with just a few
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15 wires: common ground, the set of UART signals going between the two domains, a
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16 charging power supply rail (user-switched, so charging won't always happen when
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17 a USB host is connected) and a couple of boot control signals.
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18
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19 2. UART signals between domains
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20
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21 The connection of UART interface signals between USB and mobile domains is
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22 arguably the most challenging and the most complicated part of our entire
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23 built-in USB-serial arrangement. The challenges and the circuit complexity
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24 which we came up with in response to these challenges stem from the need to
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25 avoid bad things happening in partial power-down scenarios. Most of the
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26 background information is provided in section 1.12.2 of our FreeCalypso Handset
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27 Specification (FC-handset-spec in freecalypso-docs), and this document provides
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28 further details that were elucidated only in the process of capturing the actual
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29 circuit design for FC Venus.
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30
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31 2.1. Set of signals
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32
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33 The set of UART interface signals implemented on FC Venus will be the same as
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34 listed in FC Handset Specification section 1.12.1. We have a total of 5 signals
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35 running from Calypso outputs to FT2232D, and a total of 4 signals running from
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36 FT2232D to Calypso inputs.
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37
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38 2.2. Buffer ICs
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39
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40 Two Nexperia LVC family buffer ICs will be used on FC Venus for the purpose of
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41 ferrying our set of UART interface signals between the two domains. These two
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42 ICs are U401 (74LVC125A) in the mobile domain and U705 (74LVC541A) in the USB
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43 domain.
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44
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45 U401 is powered from the mobile domain's Vio rail, and it serves only the 4
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46 signals running from FT2232D to Calypso inputs, neatly using all 4 slots of
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47 74LVC125A. This LVC buffer serves as a barrier, preventing feeding of power
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48 from USB domain outputs into the Calypso+Iota chipset's Vio rail in the PPD
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49 scenario where a USB host is connected, but the charging switch is off or the
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50 battery is critically low and undergoing precharge, with the chipset switched
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51 off.
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52
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53 No corresponding mobile domain buffers will be used for Calypso outputs: these
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54 5 signals will be connected directly between Calypso pads and the interdomain
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55 interface, where they will go to U705.
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56
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57 On the USB side, U705 will be powered from a USB domain 3.3V rail, i.e., the
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58 output of a 3.3V regulator powered from USB. (This USB domain supply will be
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59 the only part of FC Venus board using 3.3V - there are no regulated voltages
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60 higher than 2.8V in the mobile domain.) The 8 slots of this 74LVC541A buffer
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61 are split between 5 serving the Calypso to FT2232D signal direction and the
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62 other 3 serving FT2232D to Calypso signals.
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63
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64 The purpose of the 5 U705 buffer slots serving the Calypso to FT2232D signal
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65 direction is to stop the flow of current out of Calypso UART and GPIO outputs
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66 in the "normal mobile usage" PPD scenario when there is no USB host connected.
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67 With this buffer present, Calypso UART outputs will "see" a high impedance and
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68 won't source any battery-drawn current (beyond leakage of about 0.1 uA typical
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69 per pin, according to Nexperia datasheet), no matter whether the USB domain is
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70 powered or not. OTOH, if this buffer were omitted and Calypso outputs were
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71 connected directly to FT2232D inputs, the latter inputs would appear as shorts
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72 to ground when USB power is absent, putting an unacceptable load on Calypso
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73 outputs.
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74
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75 The other 3 slots of U705 serve FT2232D-to-Calypso signals TxD, DTR and TxD2.
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76 On these 3 signals there are pull-up resistors to VBAT in front of U401 inputs
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77 (see section 2.4), and the U705 buffer's Ioff feature will allow those pull-up
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78 resistors to work as intended. If these pulled-up-to-VBAT nets going to U401
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79 inputs were sourced directly from FT2232D outputs without going through U705,
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80 the powered-off FT2232D chip's I/O pins would present a lower resistance to GND
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81 than the pull-up to VBAT, drawing excessive current from the battery and making
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82 the pull-up ineffective.
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83
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84 There is just one FT2232D-to-Calypso UART interface signal that does not go
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85 through U705, and it is RTS. It has a pull-down resistor to GND instead of a
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86 pull-up to VBAT in front of its U401 input. With only 8 signals rather than
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87 all 9 needing to go through a USB domain LVC buffer, the 8 slots of a single
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88 74LVC541A IC become sufficient.
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89
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90 2.3. UART signals from Calypso to FT2232D
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91
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92 In the case of these 5 signals running from Calypso outputs to U705 inputs, one
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93 very noteworthy detail is that there are _no_ pull-up or pull-down resistors on
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94 these nets. When the Calypso+Iota chipset is switched on, all 5 Calypso outputs
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95 will be actively driving and there are no problem issues. However, in the PPD
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96 scenario where a USB host is connected, but the Calypso+Iota chipset is switched
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97 off (the charging switch is off or the battery is precharging), the absence of
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98 pull resistors suggests that U705 inputs will be floating, which certainly looks
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99 bad at first glance.
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100
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101 However, a more detailed analysis shows that floating CMOS inputs aren't bad
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102 "in principle", but instead they are bad when they can float around the input
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103 switching threshold, causing potential oscillations and high current draw from
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104 the buffer's Vcc supply. And in the present case, the Mother's analysis
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105 suggests that the signals in question won't float around the switching threshold
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106 - instead we expect them to be sensed as a consistent logic low in the PPD
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107 scenario in which they appear to float.
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108
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109 In this PPD scenario, the Iota chip's VRIO regulator is off, thus the Vio rail
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110 will be at 0 V unless something feeds wayward power into it. Calypso chip
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111 outputs connected to the signal nets under consideration have clamping diodes
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112 to this Vio rail. Therefore, if a stray voltage somehow accumulates on those
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113 nets that is high enough to approach the LVC buffer's input switching threshold,
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114 it will also be high enough to drain to Vio through Calypso I/O pad clamping
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115 diodes, and ultimately to GND.
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116
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
117 What is our reason for not adding pull-up or pull-down resistors to these nets?
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118 Besides the obvious reason of not wanting to throw even more PCB real estate at
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 this already way overcomplicated USB-serial interface arrangement, each of the
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 two options (pull-up or pull-down) would introduce its own problems.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 The pull-up resistor option has already proven to be problematic on the
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 DUART28+Caramel2 combo, particularly in the Luna configuration in which both PPD
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 scenarios become real. When the Calypso+Iota chipset is on but there is no USB
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 power present, current from Calypso outputs flows backwards through these
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 pull-up resistors and feeds into the USB domain's power rail to which these
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 resistors are connected. The USB domain output buffer then powers up
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 erratically, feeding garbage to Calypso inputs and preventing Calypso from
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 entering sleep modes. And in the opposite PPD scenario (USB power present,
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 chipset switched off), enough power can flow through these resistors into
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 Calypso I/O pad clamping diodes to feed into Vio and cause erratic LED
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 behaviour! And on FC Venus we would have the additional problem of not having
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 a USB-powered 2.8V regulator, as we don't need it for anything else.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 Pull-down resistors to GND would be much less problematic. However, if we use
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 a resistor value that is low enough to be better than floating, such as the
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 "canonical" 100 kOhm, we would be introducing a *continuous* drain on the
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 battery in normal operation. Calypso outputs corresponding to host RxD, RxD2,
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 DCD and RI will normally be high, thus each of those would be a 28 uA drain.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 All 4 combine into a 112 uA continuous drain for no good justification, always
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 present whether or not there is a USB host connected, unlike the other similar
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 drain discussed in section 2.4. Therefore, the Mother's decision is to do away
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 with pull resistors in either direction, and hope that my reasoning is correct
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 in that we won't get prolonged floating voltages around the input switching
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 threshold.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 Because these seemingly-floating nets are expected to be sensed as logic low,
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 the same logic low will be propagated to FT2232D inputs, which means a break
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 condition on RxD and asserted state on all control signals. For this reason
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 the Mother's earlier software recommendation still holds: when operating in this
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 scenario, only operate on the second UART channel (the data leads only one that
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 also has boot controls), and don't open the AT command UART channel except when
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 the mobile is switched on and regular operational firmware runs normally.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 2.4. Pull-up resistors to VBAT
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 Experience with Caramel2 boards shows that Calypso UARTs don't like seeing a
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 break condition presented to them for extended lengths of time, thus we need to
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 design our FC Venus USB-serial interface in such a way that when there is no USB
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 host present, Calypso inputs RX_MODEM and RX_IRDA will receive high levels
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 (meaning RS-232 idle) rather than low (meaning RS-232 break). Having an
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 extended break condition presented to UARTs prevents entry into Calypso sleep
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 modes, which is obviously bad. The practical implication is that U401 inputs
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 which this buffer propagates to Calypso RX_MODEM and RX_IRDA need to be have
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 some kind of mobile domain pull-ups on them, as opposed to floating or pulled
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 down. Less critically, we do the same for the DTR signal running from the USB
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 domain to the mobile domain - thus DTR will be seen as negated when there is no
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 USB host connected.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 However, if we were to implement pull-ups to the Calypso+Iota chipset's Vio rail
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 on these nets, we would have a problem in the PPD scenario of USB power present,
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 chipset switched off: U705 high outputs would feed power into Vio through these
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 resistors, potentially causing Calypso peripherals to turn on erratically as
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 has been observed on Caramel2 boards. Therefore, we are making a more unusual
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 innovation: instead of pull-ups to Vio, we are implementing pull-ups to VBAT,
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 i.e., to the unregulated raw positive battery terminal. The resistor value
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 chosen by the Mother is 22 kOhm, and the rest of this section explores the
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 implications of this unusual design under all expected conditions.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 First let us examine what happens in the case of "normal" mobile usage: the
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 device is untethered and mobile, powered by the battery, and there is no USB
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 host or charger connected. In this case the input voltage seen by U401 will be
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 raw VBAT, which will always be higher than its 2.8V supply (but still safely
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 below the 5.5 V limit), thus the LVC buffer will sense a good logic high as
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 desired. The current drawn from the battery through these pull resistors will
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 be the sum of U705 Ioff and U401 Ii, each of which is listed as 0.1 uA typical
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 in Nexperia datasheets. The listed worst case specs are 10 uA for Ioff and 5 uA
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 for Ii, thus under presumably very rare conditions, we could have a maximum
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 current draw of 15 uA per each of the 3 pull-ups. 15 uA times 22 kOhm equals a
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 voltage drop of 330 mV, thus U401 inputs will remain at 2.8 V or above (meaning
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 no increased Vio supply current draw) with the battery as low as 3.1 V, which
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 is below the operational range for the mobile.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 Now consider what happens when USB power is plugged in, either a host computer
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 or a charger. FT2232D will power up in UART mode and start putting out logic
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 high on all of its outputs (the state when no one opens either of the two serial
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 ports in host computer software); U705 will also power up and start putting out
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 the same logic high on the 3 signal nets going to the mobile domain. At this
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 point U705 output pads are no longer in their Ioff state, instead they are in
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 the actively driving high state, and Nexperia datasheet says that the voltage
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 at these output pins should not exceed Vcc, which is 3.3 V in the present case.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 VBAT can be as high as 4.2 V, thus we are operating the 74LVC541A under somewhat
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 adverse conditions.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 The undesirable adverse condition is that current will flow through the LVC
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 buffer's output p-channel MOSFET (open for driving high) in the wrong direction.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 The maximum magnitude of this current is about 41 uA, computed as
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 (4.2-3.3 V) / 22 kOhm. This current magnitude is expected to be far too low to
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 damage the 74LVC541A IC (the limiting values Iok spec is 50 mA), thus the only
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 remaining concern would be feeding of a higher voltage into the USB domain's
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 regulated 3.3V rail. This concern is addressed in the following subsection.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 Aside from the issues of reverse current flow through the LVC buffer's output
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 p-channel MOSFET, the other concern with this 41 uA current (at maximum VBAT)
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 is that this current is drained from the battery. With a total of 3 such
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 pull-ups, we expect a total battery drain current of 123 uA at maximum battery
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 charge - but this current only turns on when USB power is applied, and the
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 current into U705 output pins goes up from 0.1 uA to 41 uA per pin. However,
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 when USB power is applied for extended periods of time, it is usually done for
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 the purpose of charging the battery, and the charging current of 500 mA far
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 exceeds the drain current of 123 uA. In order for the battery to not be
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 charging when USB power is present, the system would have to be in one of two
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 other states: either the user connected USB for computer interface purposes and
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 not for charging (the charging switch is off), or the charge cycle finished but
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 the user hasn't unplugged the charger yet. Both of these conditions are not
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 expected to persist for unreasonably long time spans, hence the Mother deems it
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 acceptable to impose this 123 uA battery drain during times of active computer
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 interfacing.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 In the case when the charging switch is on and the charging cycle has finished,
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 it is also important to consider that Iota ABB sleep is prevented for as long as
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232 VCHG remains applied to the chipset, which holds whenever USB power is present
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233 and the charging switch is on. In this state (charging cycle finished, but VCHG
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234 not removed yet) Calypso can enter deep sleep (the main VCXO is stopped), but
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235 Iota ABB sleep is prevented. According to TI's APN2_110.pdf document, the
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236 difference in battery power draw between deep and "superdeep" sleep modes is
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237 about 600 uA - thus leaving the charger plugged in after charge cycle completion
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238 causes even more battery drain through this other mechanism than through our
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239 VBAT pull-up resistors in the USB-serial interface.
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240
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241 Finally, whenever any of the 3 USB domain outputs in question (TxD, DTR or TxD2)
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242 drives low, the current drawn from VBAT on that net increases from 41 uA to
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243 about 190 uA at maximum VBAT, computed as 4.2 V / 22 kOhm. However, this
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244 condition only occurs when the operator does active host computer interfacing
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245 with software (the main AT command UART needs to be opened in order for DTR to
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246 go low, and each of the two TxD lines goes low only when the host computer
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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247 actively transmits bytes), thus this increased battery current draw corresponds
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248 to explicit user activity, rather than something that happens on its own. In
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249 contrast, typical user activity on an untethered phone involves the LCD and its
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250 backlight turning on, consuming tens of mA instead of hundreds of uA.
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251
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252 It also needs to be noted that all of these currents are drawn directly from the
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253 battery without going through Iota LDO regulators, thus none of these uA numbers
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254 come out of the 1 mA sleep mode Vio current budget.
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255
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256 2.4.1. USB domain 3.3V load resistor
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257
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258 One concern raised in the analysis of VBAT pull-ups is that when current flows
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259 from the battery into the USB domain's P_3V3 rail through U705 outputs in
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260 reverse, the effect may be to raise that rail above 3.3 V. To prevent this
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diff changeset
261 effect, the Mother's idea is to add a load resistor to the USB domain, a
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262 3.3 kOhm load permanently placed between P_3V3 and GND, producing a permanent
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263 1 mA draw from USB, going through our 3.3V regulator. For comparison, FT2232D
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parents:
diff changeset
264 is said to draw about 30 mA of supply current, although the datasheet does not
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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265 specify how it breaks down between Vcc and Vccio supply currents, hence most of
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diff changeset
266 this 30 mA is probably drawn directly from USB 5V, without going through our
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267 3.3V regulator. The addition of 1 mA to the overall USB current draw can be
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parents:
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268 considered insignificant (especially for 500 mA charging, but even for 30 mA
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parents:
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269 host computer interfacing), but with a guaranteed load of at least 1 mA on
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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270 P_3V3, any wayward current coming from the battery (123 uA maximum) will always
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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diff changeset
271 be absorbed into this load without raising P_3V3 above its intended 3.3 V.
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272
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273 2.5. Pull-down to GND on Host_RTS
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274
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275 The effect of Host_RTS being sensed as low instead of high when there is no USB
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276 host connected is that any unsolicited output on the AT command channel will be
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277 flushed in this no-host-connected state, instead of being buffered in the
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278 mobile. Given that an end user mobile phone (as opposed to a dedicated cellular
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diff changeset
279 modem) is expected to be untethered most of the time, having buffered output
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280 accumulate while waiting for a host computer to be connected "some day" does not
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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281 sound like a good idea, hence having it flushed by unblocked flow control state
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282 soundly appears to be the better option. And with only 3 out of the 4 FT2232D
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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283 to Calypso signals needing pull-ups to VBAT, only 3 need U705 buffer slots,
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284 making a single 74LVC541A buffer IC sufficient for both directions in the USB
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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diff changeset
285 domain.
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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diff changeset
286
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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diff changeset
287 The value of the pull-down resistor on the Host_RTS net (running from FT2232D
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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parents:
diff changeset
288 ADBUS2 output to U401 input) will be 47 kOhm. When USB power is applied but no
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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parents:
diff changeset
289 one opens the AT command UART channel, FT2232D will drive its RTS output high,
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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parents:
diff changeset
290 sourcing about 70 uA of current from its USB 3.3V supply into the pull-down
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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parents:
diff changeset
291 resistor - well within FT2232D output current sourcing budget.
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diff changeset
292
84
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diff changeset
293 2.6. UART rescue header
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diff changeset
294
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diff changeset
295 With the built-in FT2232D subsystem becoming a part of the critical path for
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diff changeset
296 board bring-up and any kind of Calypso GSM functionality, we get a new concern,
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diff changeset
297 now that we live in an era of severe part shortages and insanely long lead
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diff changeset
298 times: what if we are unable to get some critical part for this USB subsystem,
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diff changeset
299 or run out of parts in the course of troubleshooting iterations? Likewise,
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diff changeset
300 what if some design mistake causes our USB subsystem to not work as intended,
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diff changeset
301 thereby making the main Calypso GSM part of the board inaccessible?
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diff changeset
302
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diff changeset
303 The Mother's answer to this concern consists of a 10-pin header at reference
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diff changeset
304 designator J301. Out of the total of 9 UART signals running between mobile and
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diff changeset
305 USB domains, 8 of these signals (all except Host_RI) plus two GND pins will be
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diff changeset
306 wired to this header, in the same FreeCalypso dual UART pinout as used on
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diff changeset
307 FCDEV3B and Caramel2. If the USB subsystem is fully populated on a given Venus
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parents: 38
diff changeset
308 board and if it works as designed, the only things that can be connected to J301
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diff changeset
309 are oscilloscope probes - don't connect an external DUART28 or other adapter,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 38
diff changeset
310 or you will cause a driver conflict between built-in USB outputs and that
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diff changeset
311 external adapter. However, if the entire USB subsystem is omitted from board
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diff changeset
312 population (presumably due to part shortage), or if U705 and R707 are removed
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diff changeset
313 following a discovery of killer problems in this subsystem, then an external
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diff changeset
314 DUART28 adapter can be connected to J301, and it will effectively take the place
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diff changeset
315 of the built-in USB subsystem that has been taken out.
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parents: 38
diff changeset
316
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diff changeset
317 2.6.1. DUART28 modifications
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diff changeset
318
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diff changeset
319 If we end up having to use an external DUART28 adapter board instead of the
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diff changeset
320 built-in USB subsystem, that DUART28 will need to be slightly modified, as in
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diff changeset
321 surgical rework:
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diff changeset
322
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diff changeset
323 * Adapter input pull-up resistors R11, R12, R14 and R16 will need to be removed
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diff changeset
324 - see section 2.3 above for the reasoning.
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diff changeset
325
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diff changeset
326 * A loading resistor will need to be added across C12 (perhaps soldered directly
beb6519a3be5 doc/USB-and-mobile-domains: document UART rescue header
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parents: 38
diff changeset
327 on top of the cap), following section 2.4.1 above.
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diff changeset
328
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diff changeset
329 Also because DUART28 adapter outputs are at 2.8V rather than 3.3V (DUART28 was
beb6519a3be5 doc/USB-and-mobile-domains: document UART rescue header
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
330 designed to feed signals directly to Calypso inputs, without a subsequent LVC
beb6519a3be5 doc/USB-and-mobile-domains: document UART rescue header
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
331 buffer in the Calypso domain), the current flowing from the mobile domain
beb6519a3be5 doc/USB-and-mobile-domains: document UART rescue header
Mychaela Falconia <falcon@freecalypso.org>
parents: 38
diff changeset
332 battery into DUART28 P_2V8 through the 74LVC541A buffer's output p-channel
beb6519a3be5 doc/USB-and-mobile-domains: document UART rescue header
Mychaela Falconia <falcon@freecalypso.org>
parents: 38
diff changeset
333 MOSFET in reverse increases from about 41 uA to about 58 uA per pin, accounting
beb6519a3be5 doc/USB-and-mobile-domains: document UART rescue header
Mychaela Falconia <falcon@freecalypso.org>
parents: 38
diff changeset
334 for 2.2 kOhm series resistors on DUART28 outputs in addition to our 22 kOhm
beb6519a3be5 doc/USB-and-mobile-domains: document UART rescue header
Mychaela Falconia <falcon@freecalypso.org>
parents: 38
diff changeset
335 pull-ups to VBAT. We can either live with this slightly higher current, or we
beb6519a3be5 doc/USB-and-mobile-domains: document UART rescue header
Mychaela Falconia <falcon@freecalypso.org>
parents: 38
diff changeset
336 can increase R401, R402 and R403 on those Venus boards that will go without
beb6519a3be5 doc/USB-and-mobile-domains: document UART rescue header
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
337 built-in USB.
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diff changeset
338
38
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diff changeset
339 3. Boot control signals
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
340
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
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parents:
diff changeset
341 The two boot control signals RPWON and nTESTRESET properly belong in the mobile
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342 domain. They are pulled up to VBAT inside the mobile domain (RPWON is pulled up
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343 to VBAT inside the Iota chip, nTESTRESET is pulled up to UPR with R208 per
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344 Leonardo schematics), many other designs don't provide any way at all for these
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345 signals to be pulled down, but on FC Venus we have a dual OD buffer (74LVC2G07)
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346 in the USB domain that can pull either signal down on host command. This dual
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
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347 OD buffer is little different from a pair of dry contact pushbutton switches
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
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348 shorting to GND, thus the two boot control signals don't bring on any of the
32b848a081a3 venus/doc/USB-and-mobile-domains treatise written
Mychaela Falconia <falcon@freecalypso.org>
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349 difficulties like those associated with the UART interface.