annotate venus/src/core/S71PL129N.v @ 91:711358516b55

venus/doc/MEMIF-fixed-2.8V: update for new MCP
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 11 Dec 2021 03:34:04 +0000
parents 93b238ad7d6e
children
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85
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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1 module S71PL129N (Flash_Vcc, RAM_Vcc, Vss,
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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2 A, DQ, OE, WE,
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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3 Flash_CE1, Flash_CE2, Flash_RST,
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
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4 Flash_WP_ACC, Flash_ready_busy,
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
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5 RAM_CE_actlow, RAM_CE_acthigh, RAM_UB, RAM_LB);
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
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6
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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7 input Flash_Vcc, RAM_Vcc, Vss;
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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8 input [21:0] A;
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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9 inout [15:0] DQ;
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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10 input OE, WE;
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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11 input Flash_CE1, Flash_CE2, Flash_RST, Flash_WP_ACC;
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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12 output Flash_ready_busy;
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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13 input RAM_CE_actlow, RAM_CE_acthigh, RAM_UB, RAM_LB;
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14
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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15 /* instantiate the package; the mapping of signals to balls is defined here */
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
parents:
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16
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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17 pkg_TLA064 pkg (.A1(), /* no connect */
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
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18 .A10(), /* ditto */
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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19 .B5(), /* "" */
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Mychaela Falconia <falcon@freecalypso.org>
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20 .B6(),
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Mychaela Falconia <falcon@freecalypso.org>
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21 .C3(A[7]),
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Mychaela Falconia <falcon@freecalypso.org>
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22 .C4(RAM_LB),
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Mychaela Falconia <falcon@freecalypso.org>
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23 .C5(Flash_WP_ACC),
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Mychaela Falconia <falcon@freecalypso.org>
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24 .C6(WE),
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
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25 .C7(A[8]),
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26 .C8(A[11]),
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27 .D2(A[3]),
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28 .D3(A[6]),
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Mychaela Falconia <falcon@freecalypso.org>
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29 .D4(RAM_UB),
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Mychaela Falconia <falcon@freecalypso.org>
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30 .D5(Flash_RST),
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Mychaela Falconia <falcon@freecalypso.org>
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31 .D6(RAM_CE_acthigh),
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Mychaela Falconia <falcon@freecalypso.org>
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32 .D7(A[19]),
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33 .D8(A[12]),
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Mychaela Falconia <falcon@freecalypso.org>
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34 .D9(A[15]),
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Mychaela Falconia <falcon@freecalypso.org>
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35 .E2(A[2]),
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Mychaela Falconia <falcon@freecalypso.org>
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36 .E3(A[5]),
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Mychaela Falconia <falcon@freecalypso.org>
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37 .E4(A[18]),
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Mychaela Falconia <falcon@freecalypso.org>
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38 .E5(Flash_ready_busy),
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39 .E6(A[20]),
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40 .E7(A[9]),
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41 .E8(A[13]),
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42 .E9(A[21]),
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43 .F2(A[1]),
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44 .F3(A[4]),
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45 .F4(A[17]),
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Mychaela Falconia <falcon@freecalypso.org>
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46 .F7(A[10]),
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Mychaela Falconia <falcon@freecalypso.org>
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47 .F8(A[14]),
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48 .F9(Flash_CE2),
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Mychaela Falconia <falcon@freecalypso.org>
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49 .G2(A[0]),
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50 .G3(Vss),
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51 .G4(DQ[1]),
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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52 .G7(DQ[6]),
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Mychaela Falconia <falcon@freecalypso.org>
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53 .G8(), /* no connect */
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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54 .G9(A[16]),
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Mychaela Falconia <falcon@freecalypso.org>
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55 .H2(Flash_CE1),
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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56 .H3(OE),
93b238ad7d6e first preparations for changing flash+RAM MCP to S71PL129N
Mychaela Falconia <falcon@freecalypso.org>
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57 .H4(DQ[9]),
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58 .H5(DQ[3]),
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59 .H6(DQ[4]),
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60 .H7(DQ[13]),
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61 .H8(DQ[15]),
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Mychaela Falconia <falcon@freecalypso.org>
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62 .H9(), /* no connect */
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Mychaela Falconia <falcon@freecalypso.org>
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63 .J2(RAM_CE_actlow),
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64 .J3(DQ[0]),
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65 .J4(DQ[10]),
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Mychaela Falconia <falcon@freecalypso.org>
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66 .J5(Flash_Vcc),
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Mychaela Falconia <falcon@freecalypso.org>
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67 .J6(RAM_Vcc),
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68 .J7(DQ[12]),
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Mychaela Falconia <falcon@freecalypso.org>
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69 .J8(DQ[7]),
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Mychaela Falconia <falcon@freecalypso.org>
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70 .J9(Vss),
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Mychaela Falconia <falcon@freecalypso.org>
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71 .K3(DQ[8]),
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Mychaela Falconia <falcon@freecalypso.org>
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72 .K4(DQ[2]),
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73 .K5(DQ[11]),
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Mychaela Falconia <falcon@freecalypso.org>
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74 .K6(), /* no connect */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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75 .K7(DQ[5]),
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Mychaela Falconia <falcon@freecalypso.org>
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76 .K8(DQ[14]),
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Mychaela Falconia <falcon@freecalypso.org>
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77 .L5(), /* no connect */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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78 .L6(), /* ditto */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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79 .M1(), /* "" */
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Mychaela Falconia <falcon@freecalypso.org>
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80 .M10()
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Mychaela Falconia <falcon@freecalypso.org>
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81 );
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Mychaela Falconia <falcon@freecalypso.org>
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82
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83 endmodule