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annotate venus/src/periph/bl_current_sink.v @ 68:ef00bcf4a7ee

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MCL: assign value to all capacitors
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Dec 2021 05:53:13 +0000
parents d55824058cfc
children
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1 module bl_current_sink (GND, Vio, BL_GPIO9, BL_GPIO11, BL_GPIO12, LEDK);
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2
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3 input GND, Vio;
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4 input BL_GPIO9, BL_GPIO11, BL_GPIO12;
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5 output [1:3] LEDK;
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6
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7 wire SET;
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9 MAX1916 MAX1916 (.GND(GND),
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10 .EN(BL_GPIO9),
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11 .SET(SET),
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12 .LEDK(LEDK)
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13 );
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15 resistor BL_EN_pulldown (BL_GPIO9, GND);
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17 bl_current_select cursel (.GND(GND),
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18 .Vio(Vio),
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19 .BL_GPIO11(BL_GPIO11),
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20 .BL_GPIO12(BL_GPIO12),
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21 .SET(SET)
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22 );
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23
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24 endmodule