FreeCalypso > hg > freecalypso-schem2

annotate venus/src/periph/inv_buffer_74LVC1G04.v @ 68:ef00bcf4a7ee

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MCL: assign value to all capacitors
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Dec 2021 05:53:13 +0000
parents 3d5c40988a6b
children
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3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
Mychaela Falconia <falcon@freecalypso.org>
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1 module inv_buffer_74LVC1G04 (GND, Vcc, A, Y);
3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
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2
3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
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3 input GND, Vcc;
3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
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4 input A;
3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
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5 output Y;
3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
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6
3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
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7 /* instantiate the package; the mapping of signals to pins is defined here */
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8
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9 pkg_XSON6 pkg (.pin_1(), /* no connect */
3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
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10 .pin_2(A),
3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
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11 .pin_3(GND),
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12 .pin_4(Y),
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13 .pin_5(), /* no connect */
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14 .pin_6(Vcc)
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15 );
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16
3d5c40988a6b Venus src: add 74LVC1G04 inverting buffer for SIM_CD
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17 endmodule