FreeCalypso > hg > freecalypso-schem2
annotate venus/src/periph/sim_socket_wrap.v @ 68:ef00bcf4a7ee
MCL: assign value to all capacitors
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 02 Dec 2021 05:53:13 +0000 |
parents | 5b18183f55bf |
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rev | line source |
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17
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
parents:
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1 /* This module is a wrapper around our SIM socket with card detect switch */ |
5b18183f55bf
Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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2 |
5b18183f55bf
Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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3 module sim_socket_wrap (C1, C2, C3, C5, C6, C7, SW1, SW2); |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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4 |
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Mychaela Falconia <falcon@freecalypso.org>
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5 inout C1, C2, C3, C5, C6, C7; |
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Mychaela Falconia <falcon@freecalypso.org>
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6 inout SW1, SW2; |
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Mychaela Falconia <falcon@freecalypso.org>
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7 |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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8 pkg_SIM_socket socket ( .pin_1(C1), |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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9 .pin_2(C2), |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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10 .pin_3(C3), |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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11 .pin_4(SW1), |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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12 .pin_5(C5), |
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Mychaela Falconia <falcon@freecalypso.org>
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13 .pin_6(C6), |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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14 .pin_7(C7), |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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15 .pin_8(SW2) |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
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16 ); |
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Mychaela Falconia <falcon@freecalypso.org>
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17 |
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Venus src: SIM socket block captured
Mychaela Falconia <falcon@freecalypso.org>
parents:
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18 endmodule |