FreeCalypso > hg > freecalypso-schem2

comparison venus/src/periph/calypso_uart_in.v @ 15:42a02257d457

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venus/src/periph/calypso_uart_in.v written
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 19 Nov 2021 20:10:46 +0000
parents
children 4baae6215619
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14:ff784add0889 15:42a02257d457
1 /*
2 * This module encapsulates the mobile power domain buffers
3 * in front of Calypso UART inputs.
4 */
5
6 module calypso_uart_in (GND, VBAT, Vio,
7 Host_TxD, Host_RTS, Host_DTR, Host_TxD2,
8 RX_MODEM, CTS_MODEM, GPIO_DTR, RX_IRDA);
9
10 input GND, VBAT, Vio;
11 input Host_TxD, Host_RTS, Host_DTR, Host_TxD2;
12 output RX_MODEM, CTS_MODEM, GPIO_DTR, RX_IRDA;
13
14 /* U401 buffer common part */
15 logic_ic_common U401_common (.Vcc(Vio), .GND(GND));
16
17 /* buffer slots */
18 buffer_slot_3state Host_TxD_buffer (.A(Host_TxD), .Y(RX_MODEM));
19 buffer_slot_3state Host_RTS_buffer (.A(Host_RTS), .Y(CTS_MODEM));
20 buffer_slot_3state Host_DTR_buffer (.A(Host_DTR), .Y(GPIO_DTR));
21 buffer_slot_3state Host_TxD2_buffer (.A(Host_TxD2), .Y(RX_IRDA));
22
23 /* pull-ups to VBAT */
24 resistor Host_TxD_pullup (Host_TxD, VBAT);
25 resistor Host_DTR_pullup (Host_DTR, VBAT);
26 resistor Host_TxD2_pullup (Host_TxD2, VBAT);
27
28 /* pull-down to GND */
29 resistor Host_RTS_pulldown (Host_RTS, GND);
30
31 endmodule