FreeCalypso > hg > freecalypso-schem2

comparison venus/src/periph/Si9407AEY.v @ 30:74a89c0a6466

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Venus MCL: add Q401 charging circuit MOSFET
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 21 Nov 2021 08:40:13 +0000
parents
children
comparison
equal deleted inserted replaced
29:d03d6dcd194c 30:74a89c0a6466
1 /*
2 * This Verilog module encapsulates a MOSFET in a Si9407AEY-compatible
3 * SOIC-8 footprint.
4 */
5
6 module Si9407AEY (G, S, D);
7
8 input G, S;
9 output D;
10
11 /* instantiate the package; the mapping of signals to pins is defined here */
12
13 pkg_IC_8pin pkg (.pin_1(S),
14 .pin_2(S),
15 .pin_3(S),
16 .pin_4(G),
17 .pin_5(D),
18 .pin_6(D),
19 .pin_7(D),
20 .pin_8(D)
21 );
22
23 endmodule