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comparison venus/src/periph/bl_current_select.v @ 47:9f5a3567d699

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progress toward LCD integration
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 27 Nov 2021 02:09:46 +0000
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46:c247abb89302 47:9f5a3567d699
1 module bl_current_select (GND, Vio, BL_GPIO11, BL_GPIO12, SET);
2
3 input GND, Vio;
4 input BL_GPIO11, BL_GPIO12;
5 output SET;
6
7 wire buf_out_GPIO11, buf_out_GPIO12;
8
9 /* U403 buffer common part */
10 logic_ic_common U403_common (.Vcc(Vio), .GND(GND));
11
12 /* bypass capacitor */
13 capacitor U403_bypass (Vio, GND);
14
15 /* buffer slots */
16 buffer_slot_3state buf_GPIO11 (.A(Vio), .nOE(BL_GPIO11), .Y(buf_out_GPIO11));
17 buffer_slot_3state buf_GPIO12 (.A(Vio), .nOE(BL_GPIO12), .Y(buf_out_GPIO12));
18
19 /* MAX1916 current control resistors */
20 resistor R_fixed (Vio, SET);
21 resistor R_GPIO11 (buf_out_GPIO11, SET);
22 resistor R_GPIO12 (buf_out_GPIO12, SET);
23
24 endmodule