FreeCalypso > hg > freecalypso-schem2

diff venus/src/core/clock_rf2dbb.v @ 9:3ed0f7a9c489

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Venus: first version of Verilog for the Calypso core
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 19 Nov 2021 05:58:21 +0000
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--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/core/clock_rf2dbb.v	Fri Nov 19 05:58:21 2021 +0000
@@ -0,0 +1,12 @@
+module clock_rf2dbb (In, Out);
+
+input In;
+output Out;
+
+wire mid;
+
+resistor R251 (In, mid);
+
+capacitor C253 (mid, Out);
+
+endmodule