diff venus/src/periph/Si9407AEY.v @ 30:74a89c0a6466

Venus MCL: add Q401 charging circuit MOSFET
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 21 Nov 2021 08:40:13 +0000
parents
children
line wrap: on
line diff
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/venus/src/periph/Si9407AEY.v	Sun Nov 21 08:40:13 2021 +0000
@@ -0,0 +1,23 @@
+/*
+ * This Verilog module encapsulates a MOSFET in a Si9407AEY-compatible
+ * SOIC-8 footprint.
+ */
+
+module Si9407AEY (G, S, D);
+
+input G, S;
+output D;
+
+/* instantiate the package; the mapping of signals to pins is defined here */
+
+pkg_IC_8pin pkg (.pin_1(S),
+		 .pin_2(S),
+		 .pin_3(S),
+		 .pin_4(G),
+		 .pin_5(D),
+		 .pin_6(D),
+		 .pin_7(D),
+		 .pin_8(D)
+	);
+
+endmodule