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74LVC2G125 buffer for BL control captured at MCL level
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 27 Nov 2021 01:34:05 +0000
parents 0401fe6893ea
children
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This Hg source repository contains work in progress towards schematic-level
design of FreeCalypso Venus GSM phone handset prototype and development board.
Instead of graphical schematics, we use our own in-house board-level hardware
design language (ueda, based on structural subset of Verilog), but aside from
the different form of representation, this level of design is equivalent to
schematics.