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view venus/src/periph/sim_socket_wrap.v @ 45:4c4eeacce681

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74LVC2G125 buffer for BL control captured at MCL level
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 27 Nov 2021 01:34:05 +0000
parents 5b18183f55bf
children
line wrap: on
line source

/* This module is a wrapper around our SIM socket with card detect switch */

module sim_socket_wrap (C1, C2, C3, C5, C6, C7, SW1, SW2);

inout C1, C2, C3, C5, C6, C7;
inout SW1, SW2;

pkg_SIM_socket socket (	.pin_1(C1),
			.pin_2(C2),
			.pin_3(C3),
			.pin_4(SW1),
			.pin_5(C5),
			.pin_6(C6),
			.pin_7(C7),
			.pin_8(SW2)
		);

endmodule