/*
 * This module encapsulates the USB domain of FC Venus.
 */

module usb_domain (GND, VBUS, Host_TxD, Host_RxD, Host_RTS, Host_CTS,
		   Host_DTR, Host_DCD, Host_RI, Host_TxD2, Host_RxD2,
		   RPWON, nTESTRESET);

input GND;
output VBUS;

output Host_TxD, Host_RTS, Host_DTR, Host_TxD2;
input Host_RxD, Host_CTS, Host_DCD, Host_RI, Host_RxD2;
output RPWON, nTESTRESET;

/* USB domain wires */

wire P_5V, P_3V3;

wire [7:0] ADBUS, BDBUS;
wire [3:0] ACBUS, BCBUS;

usb_core usb (  .GND(GND),
		.VBUS(VBUS),
		.P_5V(P_5V),
		.VCCIOA(P_3V3),
		.VCCIOB(P_3V3),
		.ADBUS(ADBUS),
		.ACBUS(ACBUS),
		.SI_WUA(P_3V3),
		.BDBUS(BDBUS),
		.BCBUS(BCBUS),
		.SI_WUB(P_3V3),
		.PWREN()	/* no connect */
	);

regulator_with_caps reg_3V3 (.GND(GND), .IN(P_5V), .OUT(P_3V3));

/* load resistor per USB-and-mobile-domains article section 2.4.1 */
resistor Rload (P_3V3, GND);

usb_domain_buf buf (.GND(GND),
		    .P_3V3(P_3V3),
		    .Int_TxD(ADBUS[0]),
		    .Int_RxD(ADBUS[1]),
		    .Int_RTS(ADBUS[2]),
		    .Int_CTS(ADBUS[3]),
		    .Int_DTR(ADBUS[4]),
		    .Int_DCD(ADBUS[6]),
		    .Int_RI(ADBUS[7]),
		    .Int_TxD2(BDBUS[0]),
		    .Int_RxD2(BDBUS[1]),
		    .Host_TxD(Host_TxD),
		    .Host_RxD(Host_RxD),
		    .Host_RTS(Host_RTS),
		    .Host_CTS(Host_CTS),
		    .Host_DTR(Host_DTR),
		    .Host_DCD(Host_DCD),
		    .Host_RI(Host_RI),
		    .Host_TxD2(Host_TxD2),
		    .Host_RxD2(Host_RxD2)
	);

usb_domain_bctl bctl (  .GND(GND),
			.P_3V3(P_3V3),
			.ChanB_RTS(BDBUS[2]),
			.ChanB_DTR(BDBUS[4]),
			.CTL1_out(RPWON),
			.CTL2_out(nTESTRESET)
	);

endmodule