/*
 * This Verilog module encapsulates the PCB footprint
 * for our 6.0 MHz USB crystal.
 */

module usb_xtal_wrap (electrode1, electrode2, GND);

input electrode1, electrode2, GND;

xtal_4pin_pkg xtal (.pin_1(electrode1),
		    .pin_2(GND),
		    .pin_3(electrode2),
		    .pin_4(GND)
	);

endmodule