FreeCalypso > hg > freecalypso-schem2
view venus/src/usb/FT2232D_block.v @ 96:ae6951a70d2b
U403: change from 74LVC2G125 to 74LVC2G126
The two parts have the same footprint and pinout, but '126 3-state buffers
have active-high OE inputs instead of active-low. The change is purely
for software benefit: having GPIO 11/12 set to 1 correspond to that current
contribution being enabled will be much more intuitive for developers and
tinkerers.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Mon, 09 May 2022 19:27:11 +0000 |
parents | 8f3df7a222f5 |
children |
line wrap: on
line source
/* * This module encapsulates the FT2232D chip and its immediate accessories: * the oscillator crystal, the EEPROM, the AVCC filter and the cap on 3V3OUT. */ module FT2232D_block (GND, VCC, VCCIOA, VCCIOB, USBDP, USBDM, RESET, RSTOUT, PWREN, ADBUS, ACBUS, SI_WUA, BDBUS, BCBUS, SI_WUB); input GND, VCC, VCCIOA, VCCIOB; inout USBDP, USBDM; input RESET; output RSTOUT, PWREN; inout [7:0] ADBUS, BDBUS; inout [3:0] ACBUS, BCBUS; input SI_WUA, SI_WUB; /* FT2232D pins handled within this block */ wire EECS, EESK, EEDATA; wire XTIN, XTOUT; wire AVCC, FTDI_3V3; /* instantiate the FT2232D */ FT2232D_chip FT2232D (.GND(GND), .AGND(GND), .VCC(VCC), .AVCC(AVCC), .VCCIOA(VCCIOA), .VCCIOB(VCCIOB), .OUT_3V3(FTDI_3V3), .USBDP(USBDP), .USBDM(USBDM), .EECS(EECS), .EESK(EESK), .EEDATA(EEDATA), .RESET(RESET), .RSTOUT(RSTOUT), .TEST(GND), .PWREN(PWREN), .XTIN(XTIN), .XTOUT(XTOUT), .ADBUS(ADBUS), .ACBUS(ACBUS), .SI_WUA(SI_WUA), .BDBUS(BDBUS), .BCBUS(BCBUS), .SI_WUB(SI_WUB) ); /* VCCIO bypass caps */ capacitor VCCIOA_bypass_cap (VCCIOA, GND); capacitor VCCIOB_bypass_cap (VCCIOB, GND); /* AVCC filter */ resistor AVCC_filter_R (VCC, AVCC); capacitor AVCC_cap (AVCC, GND); /* 3V3OUT */ capacitor FTDI_3V3_cap (FTDI_3V3, GND); /* crystal oscillator */ usb_xtal_wrap xtal (XTIN, XTOUT, GND); capacitor XTIN_cap (XTIN, GND); capacitor XTOUT_cap (XTOUT, GND); /* serial EEPROM */ wire EEPROM_DOUT; eeprom_93Cx6_16bit eeprom (.GND(GND), .VCC(VCC), .CS(EECS), .SK(EESK), .DIN(EEDATA), .DOUT(EEPROM_DOUT) ); resistor DOUT_series_R (EEPROM_DOUT, EEDATA); resistor DOUT_pullup_R (EEPROM_DOUT, VCC); endmodule