view venus/src/pinouts/calypso-179ghh.pinout @ 36:c1256c8757c3

eliminate R209 and tie Iota VLMEM directly to UPR We already eliminated R210 (VLMEM pull-down option) earlier, because our simplified LCD power supply and reset line wiring is incompatible with 1.8V MEMIF. But with VLMEM always needing to be high, a pull-up resistor offers no advantage over a direct tie to UPR, so let's eliminate the superfluous resistor.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 22 Nov 2021 19:19:59 +0000
parents df6086f8788d
children
line wrap: on
line source

# This pinout mapping file is intended primarily for pin function annotation
# in the post-MCL unet output, where the mapping is from the ball position
# to the logical name, rather than the other way around.

#logical function	179GHH package ball

# ARM memory interface
ADD0			F3
ADD1			F2
ADD2			G5
ADD3			G4
ADD4			G2
ADD5			G3
ADD6			H1
ADD7			H3
ADD8			H2
ADD9			H4
ADD10			H5
ADD11			J1
ADD12			J2
ADD13			J3
ADD14			J4
ADD15			K3
ADD16			K2
ADD17			K4
ADD18			J5
ADD19			L1
ADD20			L2
ADD21			L3
CS4/ADD22		D2

DATA0			B7
DATA1			D7
DATA2			E7
DATA3			D6
DATA4			A6
DATA5			C6
DATA6			E6
DATA7			C5
DATA8			B5
DATA9			D5
DATA10			E5
DATA11			B4
DATA12			C4
DATA13			D4
DATA14			A3
DATA15			B3

FDP			F4
RnW			B2
nBHE			F5
nBLE			E4
nCS0			C2
nCS1			C3
nCS2			C1
nCS3			D3
nCS4			C11
nFOE			E2
nFWE			E3

# TPU serial port
TSPCLKX			J14
TSPDI/IO4		H10
TSPDO			H11
TSPEN0			H13
TSPEN1			H12
TSPEN2			H14
TSPEN3/nSCS2		G12

# TPU parallel port
TSPACT0			M12
TSPACT1			M14
TSPACT2			L12
TSPACT3			L13
TSPACT4			J10
TSPACT5			K11
TSPACT6			K13
TSPACT7			K12
TSPACT8			K14
TSPACT9			J11
TSPACT10		J12
TSPACT11		J13

# uWire interface
SCLK			P9
SDI/SDA			M9
SDO			K8
nSCS0/SCL		L9
nSCS1			N9

# IrDA UART
TX_IRDA			C8
RX_IRDA			D8
TXIR_IRDA		C7
RXIR_IRDA		A8
SD_IRDA			B8

# MODEM UART
TX_MODEM		B9
RX_MODEM		A9
RTS_MODEM		E8
DSR_MODEM/LPG		D9
CTS_MODEM		C9

# MCSI
MCSI_TXD/IO9		L10
MCSI_RXD/IO10		M10
MCSI_CLK/IO11		N10
MCSI_FSYNCH/IO12	K9

# Generic I/O
KBC0			N4
KBC1			K5
KBC2			L5
KBC3			P5
KBC4			M5

KBR0			K6
KBR1			M6
KBR2			P6
KBR3			N6
KBR4			L6

BU/PWT			K7
LT/PWL			L7

IO0			N3
IO1			P3
IO2			L4
IO3/SIM_RnW		M4

# Miscellaneous
nRESET_OUT/IO7		N2
nIBOOT			N1
IDDQ			M2
CLKTCXO			E13
OSC32K_IN		C13
OSC32K_OUT		B13

CLK32K_OUT		C12
CLK13M_OUT		F12
nRESPWON		D12
EXT_FIQ			P1
EXT_IRQ			M3

# Power & ground pins
VDDS_MIF		A4
VDDS_MIF		B6
VDDS_MIF		G1
VDDS_MIF		D1

VDDS_2			A11
VDDS_2			L14
VDDS_1			N5

VDD			A5
VDD			B12
VDD			N14
VDD			P7
VDD			M1
VDD			E1

VSS			F1
VSS			N8
VSS			K1
VSS			P2
VSS			P4
VSS			P10
VSS			P13
VSS			G14
VSS			A10
VSS			A7
VSS			A2
VSS			B1

VDDS_RTC		D13
VDD_RTC			D14
VSS_RTC			C14

VDD_ANG			E11
VSS_ANG			E12

VDD_PLL			F11
VSS_PLL			E14

VSSO			A14

# Power control
TCXOEN			A12
RFEN			A13
ON_OFF			F10
IT_WAKEUP		B14

# JTAG & other debug
nBSCAN			D11
nEMU0			B11
nEMU1			E10

TDI			D10
TDO			C10
TCK			B10
TMS			E9

# Baseband serial port
BFSR			L11
BDR			K10
BFSX			P12
BDX			M11

BCLKR/ARMCLK		P11
BCLKX/IO6		N11

# Voice serial port
VDX			P14
VDR			N13
VFSRX			M13
VCLKRX			N12

# ARM serial port (SPI)
MCUDI			N7
MCUDO			M7
MCUEN0			M8
MCUEN1/IO8		P8
MCUEN2/IO13		L8

# SIM interface
SIM_IO			G13
SIM_CLK			F13
SIM_RST			G10
SIM_CD			G11
SIM_PWCTRL/IO5		F14