FreeCalypso > hg > freecalypso-schem2
view venus/src/Makefile @ 28:f28249ee1ee5
Venus MCL: ready for first binding
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 21 Nov 2021 03:05:26 +0000 |
parents | 4baae6215619 |
children | d03d6dcd194c |
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VSRCS= core/M034F.v core/RF3166.v core/S71PL064J.v core/abb_block.v \ core/abb_rc_network.v core/baseband.v core/calypso_179ghh.v \ core/clock_rf2dbb.v core/core.v core/dbb_block.v \ core/int_vcxo_passive.v core/iota_100ggm.v core/memory.v \ core/rf_fem_block.v core/rf_pa_block.v core/rf_section.v \ core/rfmatch_fem2rita_dcs.v core/rfmatch_fem2rita_low.v \ core/rfmatch_fem2rita_pcs.v core/rfmatch_pa2fem_pi.v \ core/rfmatch_rita2pa_hb.v core/rfmatch_rita2pa_lb.v \ core/rita_rf_chip.v core/rita_vcxo_int.v core/rita_wrap.v \ core/xtal_32khz_wrap.v \ periph/battery.v periph/calypso_uart_in.v periph/inv_buffer_74LVC1G04.v\ periph/jtag_if.v periph/sim_socket_block.v periph/sim_socket_wrap.v \ periph/sma_wrap.v \ top/board.v top/mobile.v \ usb/FT2232D_block.v usb/FT2232D_chip.v usb/eeprom_93Cx6_16bit.v \ usb/regulator_ic.v usb/regulator_with_caps.v usb/usb_conn.v \ usb/usb_core.v usb/usb_domain.v usb/usb_domain_bctl.v \ usb/usb_domain_buf.v NETS= sverp.unet all: ${NETS} sverp.unet: ${VSRCS} primitives Makefile ueda-sverp -o $@ ${VSRCS} clean: rm -f *.unet *.txt *.csv