view venus/src/periph/transistor_ext_bias.v @ 65:fb8fceab632c

venus/src/Makefile: unet-bind -c to check completeness
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 01 Dec 2021 21:47:20 +0000
parents 4a7db02ddd3e
children
line wrap: on
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/* transistor with external bias resistors */

module transistor_ext_bias (E, B, C);

inout E, B, C;

wire int_base;

transistor_slot Q (.E(E), .B(int_base), .C(C));

resistor Rbase (B, int_base);
resistor Rbe (int_base, E);

endmodule