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minnie/doc/Design-spec: finished in the first pass
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 01 Oct 2023 08:17:05 +0000
parents d55824058cfc
children
line wrap: on
line source

module bl_current_sink (GND, Vio, BL_GPIO9, BL_GPIO11, BL_GPIO12, LEDK);

input GND, Vio;
input BL_GPIO9, BL_GPIO11, BL_GPIO12;
output [1:3] LEDK;

wire SET;

MAX1916 MAX1916 (.GND(GND),
		 .EN(BL_GPIO9),
		 .SET(SET),
		 .LEDK(LEDK)
	);

resistor BL_EN_pulldown (BL_GPIO9, GND);

bl_current_select cursel (.GND(GND),
			  .Vio(Vio),
			  .BL_GPIO11(BL_GPIO11),
			  .BL_GPIO12(BL_GPIO12),
			  .SET(SET)
	);

endmodule