FreeCalypso > hg > freecalypso-schem2
changeset 16:3d5c40988a6b
Venus src: add 74LVC1G04 inverting buffer for SIM_CD
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Fri, 19 Nov 2021 20:35:10 +0000 |
| parents | 42a02257d457 |
| children | 5b18183f55bf |
| files | venus/src/MCL venus/src/periph/inv_buffer_74LVC1G04.v venus/src/primitives |
| diffstat | 3 files changed, 29 insertions(+), 0 deletions(-) [+] |
line wrap: on
line diff
--- a/venus/src/MCL Fri Nov 19 20:10:46 2021 +0000 +++ b/venus/src/MCL Fri Nov 19 20:35:10 2021 +0000 @@ -240,6 +240,15 @@ pinout=74LVC125A.pinout npins=14 +U402: + device=74LVC1G04 + manufacturer=Nexperia + manufacturer_part_number=74LVC1G04GM + description=Single inverting buffer IC, SOT886 package + vendor=Digi-Key + vendor_part_number=1727-3969-1-ND + npins=6 + U601: hier=core.rf.FEM.M034F.pkg manufacturer=Epcos
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/venus/src/periph/inv_buffer_74LVC1G04.v Fri Nov 19 20:35:10 2021 +0000 @@ -0,0 +1,17 @@ +module inv_buffer_74LVC1G04 (GND, Vcc, A, Y); + +input GND, Vcc; +input A; +output Y; + +/* instantiate the package; the mapping of signals to pins is defined here */ + +pkg_XSON6 pkg (.pin_1(), /* no connect */ + .pin_2(A), + .pin_3(GND), + .pin_4(Y), + .pin_5(), /* no connect */ + .pin_6(Vcc) + ); + +endmodule
--- a/venus/src/primitives Fri Nov 19 20:10:46 2021 +0000 +++ b/venus/src/primitives Fri Nov 19 20:35:10 2021 +0000 @@ -29,6 +29,9 @@ pkg_TLA064 grid "pkg_TLA064.bgadef"; pkg_TLC056 grid "pkg_TLC056.bgadef"; +/* misc IC packages */ +pkg_XSON6 numpins 6; + /* logic IC subpackages */ buffer_slot_basic mapped_pins (A, Y); buffer_slot_3state mapped_pins (A, nOE, Y);