FreeCalypso > hg > freecalypso-schem2
changeset 23:9f70dc110ad7
venus/src/usb: building blocks from DUART28
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sat, 20 Nov 2021 17:48:18 +0000 |
parents | 22ac331aa0f8 |
children | 4722b265cb8c |
files | venus/src/usb/FT2232D_block.v venus/src/usb/FT2232D_chip.v venus/src/usb/eeprom_93Cx6_16bit.v venus/src/usb/regulator_ic.v venus/src/usb/usb_conn.v |
diffstat | 5 files changed, 221 insertions(+), 0 deletions(-) [+] |
line wrap: on
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/venus/src/usb/FT2232D_block.v Sat Nov 20 17:48:18 2021 +0000 @@ -0,0 +1,90 @@ +/* + * This module encapsulates the FT2232D chip and its immediate accessories: + * the oscillator crystal, the EEPROM, the AVCC filter and the cap on 3V3OUT. + */ + +module FT2232D_block (GND, VCC, VCCIOA, VCCIOB, + USBDP, USBDM, RESET, RSTOUT, PWREN, + ADBUS, ACBUS, SI_WUA, BDBUS, BCBUS, SI_WUB); + +input GND, VCC, VCCIOA, VCCIOB; + +inout USBDP, USBDM; + +input RESET; +output RSTOUT, PWREN; + +inout [7:0] ADBUS, BDBUS; +inout [3:0] ACBUS, BCBUS; +input SI_WUA, SI_WUB; + +/* FT2232D pins handled within this block */ + +wire EECS, EESK, EEDATA; +wire XTIN, XTOUT; +wire AVCC, FTDI_3V3; + +/* instantiate the FT2232D */ + +FT2232D_chip FT2232D (.GND(GND), + .AGND(GND), + .VCC(VCC), + .AVCC(AVCC), + .VCCIOA(VCCIOA), + .VCCIOB(VCCIOB), + .OUT_3V3(FTDI_3V3), + .USBDP(USBDP), + .USBDM(USBDM), + .EECS(EECS), + .EESK(EESK), + .EEDATA(EEDATA), + .RESET(RESET), + .RSTOUT(RSTOUT), + .TEST(GND), + .PWREN(PWREN), + .XTIN(XTIN), + .XTOUT(XTOUT), + .ADBUS(ADBUS), + .ACBUS(ACBUS), + .SI_WUA(SI_WUA), + .BDBUS(BDBUS), + .BCBUS(BCBUS), + .SI_WUB(SI_WUB) + ); + +/* VCCIO bypass caps */ + +capacitor VCCIOA_bypass_cap (VCCIOA, GND); +capacitor VCCIOB_bypass_cap (VCCIOB, GND); + +/* AVCC filter */ + +resistor AVCC_filter_R (VCC, AVCC); +capacitor AVCC_cap (AVCC, GND); + +/* 3V3OUT */ + +capacitor FTDI_3V3_cap (FTDI_3V3, GND); + +/* crystal oscillator */ + +xtal_2pin_pkg xtal (XTIN, XTOUT); +capacitor XTIN_cap (XTIN, GND); +capacitor XTOUT_cap (XTOUT, GND); + +/* serial EEPROM */ + +wire EEPROM_DOUT; + +eeprom_93Cx6_16bit eeprom (.GND(GND), + .VCC(VCC), + .CS(EECS), + .SK(EESK), + .DIN(EEDATA), + .DOUT(EEPROM_DOUT) + ); + +resistor DOUT_series_R (EEPROM_DOUT, EEDATA); +resistor DOUT_pullup_R (EEPROM_DOUT, VCC); + +endmodule
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/venus/src/usb/FT2232D_chip.v Sat Nov 20 17:48:18 2021 +0000 @@ -0,0 +1,78 @@ +/* + * This module encapsulates the FT2232D chip and its pinout. + */ + +module FT2232D_chip (GND, AGND, VCC, AVCC, VCCIOA, VCCIOB, OUT_3V3, + USBDP, USBDM, EECS, EESK, EEDATA, RESET, RSTOUT, TEST, PWREN, + XTIN, XTOUT, ADBUS, ACBUS, SI_WUA, BDBUS, BCBUS, SI_WUB); + +input GND, AGND, VCC, AVCC, VCCIOA, VCCIOB; +output OUT_3V3; + +inout USBDP, USBDM; +output EECS, EESK; +inout EEDATA; + +input RESET, TEST; +output RSTOUT, PWREN; + +input XTIN; +output XTOUT; + +inout [7:0] ADBUS, BDBUS; +inout [3:0] ACBUS, BCBUS; +input SI_WUA, SI_WUB; + +/* instantiate the package; the mapping of signals to pins is defined here */ + +pkg_LQFP48 pkg (.pin_1(EESK), + .pin_2(EEDATA), + .pin_3(VCC), + .pin_4(RESET), + .pin_5(RSTOUT), + .pin_6(OUT_3V3), + .pin_7(USBDP), + .pin_8(USBDM), + .pin_9(GND), + .pin_10(SI_WUA), + .pin_11(ACBUS[3]), + .pin_12(ACBUS[2]), + .pin_13(ACBUS[1]), + .pin_14(VCCIOA), + .pin_15(ACBUS[0]), + .pin_16(ADBUS[7]), + .pin_17(ADBUS[6]), + .pin_18(GND), + .pin_19(ADBUS[5]), + .pin_20(ADBUS[4]), + .pin_21(ADBUS[3]), + .pin_22(ADBUS[2]), + .pin_23(ADBUS[1]), + .pin_24(ADBUS[0]), + .pin_25(GND), + .pin_26(SI_WUB), + .pin_27(BCBUS[3]), + .pin_28(BCBUS[2]), + .pin_29(BCBUS[1]), + .pin_30(BCBUS[0]), + .pin_31(VCCIOB), + .pin_32(BDBUS[7]), + .pin_33(BDBUS[6]), + .pin_34(GND), + .pin_35(BDBUS[5]), + .pin_36(BDBUS[4]), + .pin_37(BDBUS[3]), + .pin_38(BDBUS[2]), + .pin_39(BDBUS[1]), + .pin_40(BDBUS[0]), + .pin_41(PWREN), + .pin_42(VCC), + .pin_43(XTIN), + .pin_44(XTOUT), + .pin_45(AGND), + .pin_46(AVCC), + .pin_47(TEST), + .pin_48(EECS) + ); + +endmodule
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/venus/src/usb/eeprom_93Cx6_16bit.v Sat Nov 20 17:48:18 2021 +0000 @@ -0,0 +1,19 @@ +module eeprom_93Cx6_16bit (GND, VCC, CS, SK, DIN, DOUT); + +input GND, VCC; +input CS, SK, DIN; +output DOUT; + +/* instantiate the package; the mapping of signals to pins is defined here */ + +pkg_IC_8pin pkg (.pin_1(CS), + .pin_2(SK), + .pin_3(DIN), + .pin_4(DOUT), + .pin_5(GND), + .pin_6(VCC), /* ORG input on some 93Cx6 variants */ + .pin_7(), /* no connect */ + .pin_8(VCC) + ); + +endmodule
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/venus/src/usb/regulator_ic.v Sat Nov 20 17:48:18 2021 +0000 @@ -0,0 +1,13 @@ +module regulator_ic (IN, OUT, GND, EN); + +input IN, GND, EN; +output OUT; + +pkg_IC_5pin pkg (.pin_1(IN), + .pin_2(GND), + .pin_3(EN), + .pin_4(), /* no connect */ + .pin_5(OUT) + ); + +endmodule
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/venus/src/usb/usb_conn.v Sat Nov 20 17:48:18 2021 +0000 @@ -0,0 +1,21 @@ +/* + * This module captures the mini-USB connector. + */ + +module usb_conn (GND, VBUS, Dminus, Dplus, ID); + +inout GND, VBUS, Dminus, Dplus, ID; + +conn_miniUSB_plus4 conn (.pin_1(VBUS), + .pin_2(Dminus), + .pin_3(Dplus), + .pin_4(ID), + .pin_5(GND), + /* mounting pads */ + .pin_6(GND), + .pin_7(GND), + .pin_8(GND), + .pin_9(GND) + ); + +endmodule