FreeCalypso > hg > freecalypso-schem2
changeset 56:ec932276c8e6
VSP sniff tap implemented
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sat, 27 Nov 2021 20:43:23 +0000 |
parents | 59fb15426c91 |
children | 3afd172b83e1 |
files | venus/src/MCL venus/src/core/baseband.v venus/src/primitives |
diffstat | 3 files changed, 20 insertions(+), 0 deletions(-) [+] |
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--- a/venus/src/MCL Sat Nov 27 20:01:56 2021 +0000 +++ b/venus/src/MCL Sat Nov 27 20:43:23 2021 +0000 @@ -655,6 +655,17 @@ #hier=spkr.spkr_connector part=header-2pin +# VSP internal interface tap +J404: + hier=mob.core.bb.VSP_tap + footprint=JUMPER5 + description=Header, 0.100", single row, 5 posts + manufacturer=Molex + manufacturer_part_number=0901200125 + vendor=Digi-Key + vendor_part_number=WM8075-ND + npins=5 + # VBAT tap for calibration measurements J405: hier=mob.batt.vbat_tap
--- a/venus/src/core/baseband.v Sat Nov 27 20:01:56 2021 +0000 +++ b/venus/src/core/baseband.v Sat Nov 27 20:43:23 2021 +0000 @@ -266,4 +266,12 @@ /* there needs to be a pull-down resistor on the MCUDI/UDX net */ resistor R216 (USP_abb2dbb_data, GND); +/* VSP tap header */ +header_5pin VSP_tap ( .pin_1(VSP_clock), + .pin_2(VSP_UL_data), + .pin_3(VSP_DL_data), + .pin_4(VSP_sync), + .pin_5(GND) + ); + endmodule