FreeCalypso > hg > freecalypso-schem2

changeset 68:ef00bcf4a7ee

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MCL: assign value to all capacitors
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Dec 2021 05:53:13 +0000
parents 8f3df7a222f5
children de44df15cf05
files venus/src/MCL
diffstat 1 files changed, 95 insertions(+), 5 deletions(-) [+]
line wrap: on
line diff
--- a/venus/src/MCL	Thu Dec 02 01:35:34 2021 +0000
+++ b/venus/src/MCL	Thu Dec 02 05:53:13 2021 +0000
@@ -5,153 +5,180 @@
 C201:
  # bypass cap for V-RTC near Calypso
  hier=mob.core.bb.dbb.C201
+ value=100n
  footprint=0402
  npins=2
 
 C202:
  # 32.768 kHz Pierce osc cap, input
  hier=mob.core.bb.dbb.C202
+ value=22p
  footprint=0402
  npins=2
 
 C203:
  # 32.768 kHz Pierce osc cap, output
  hier=mob.core.bb.dbb.C203
+ value=22p
  footprint=0402
  npins=2
 
 C204:
  # cap on Iota VREF pin
  hier=mob.core.bb.abb.C204
+ value=100n
  footprint=0402
  npins=2
 
 C205:
  # AFC output cap
  hier=mob.core.bb.abb.C205
+ value=33n
  footprint=0402
  npins=2
 
 C208:
  # cap on UPR
  hier=mob.core.bb.abb.C208
+ value=100n
  footprint=0402
  npins=2
 
 C209:
  # bypass cap on Calypso VDDS_MIF
  hier=mob.core.bb.dbb.C209
+ value=100n
  footprint=0402
  npins=2
 
 C210:
  # bypass cap on Calypso VDDS_[12]
  hier=mob.core.bb.dbb.C210
+ value=100n
  footprint=0402
  npins=2
 
 C211:
  # bypass cap on Calypso VDD (core)
  hier=mob.core.bb.dbb.C211
+ value=100n
  footprint=0402
  npins=2
 
 C212:
  # bypass cap on Calypso VDD_PLL
  hier=mob.core.bb.dbb.C212
+ value=100n
  footprint=0402
  npins=2
 
 C213:
  # bypass cap on V-ABB
  hier=mob.core.bb.abb.C213
+ value=4u7
  footprint=0805
  npins=2
 
 C214:
  # bypass cap on V-DBB
  hier=mob.core.bb.abb.C214
+ value=22u
  footprint=0805
  npins=2
 
 C215:
  # bypass cap on V-IO
  hier=mob.core.bb.abb.C215
+ value=10u
  footprint=0805
  npins=2
 
 C216:
  # bypass cap on V-FLASH
  hier=mob.core.bb.abb.C216
+ value=4u7
  footprint=0805
  npins=2
 
 C217:
  # bypass cap on V-SRAM
  hier=mob.core.bb.abb.C217
+ value=4u7
  footprint=0805
  npins=2
 
 C218:
  # bypass cap on V-SIM
  hier=mob.core.bb.abb.C218
+ value=1u
  footprint=0603
  npins=2
 
 C219:
  # bypass cap on V-RTC
  hier=mob.core.bb.abb.C219
+ value=1u
  footprint=0603
  npins=2
 
 C220:
  # one of the bypass caps on the VBAT power input to the ABB
  hier=mob.core.bb.abb.C220
+ value=100n
  footprint=0402
  npins=2
 
 C221:
  # the other one - C220's twin
  hier=mob.core.bb.abb.C221
+ value=100n
  footprint=0402
  npins=2
 
 C223:
  # extra (3rd) cap to ground in the 32.768 kHz crystal osc circuit
  hier=mob.core.bb.dbb.C223
+ value=10p
  footprint=0402
  npins=2
 
 C224:
  hier=mob.core.rf.Rita_vcxo.vcxo_passive.C224
+ value=4p7
  footprint=0402
  npins=2
 
 C225:
  hier=mob.core.rf.Rita_vcxo.vcxo_passive.C225
+ value=100p
  footprint=0402
  npins=2
 
 C226:
  hier=mob.core.rf.Rita_vcxo.vcxo_passive.C226
  footprint=0402
+ value=DNP
+ part=none
  npins=2
 
 C253:
  # series cap in the 26 MHz signal from Rita to Calypso
  hier=mob.core.clock_rf2dbb.C253
+ value=1n
  footprint=0402
  npins=2
 
 C295:
  # cap in the analog I&Q circuit between Iota and Rita (the one for Q)
  hier=mob.core.bb.abb.abb_rc_network.C295
+ value=470p
  footprint=0402
  npins=2
 
 C296:
  # cap in the analog I&Q circuit between Iota and Rita (the one for I)
  hier=mob.core.bb.abb.abb_rc_network.C296
+ value=470p
  footprint=0402
  npins=2
 
@@ -165,6 +192,7 @@
 C318:
  # bypass cap for V-SRAM near U301
  hier=mob.core.mem.C318
+ value=100n
  footprint=0402
  npins=2
 
@@ -179,6 +207,7 @@
 C322:
  # bypass cap for V-FLASH near U301
  hier=mob.core.mem.C322
+ value=100n
  footprint=0402
  npins=2
 
@@ -195,8 +224,8 @@
 C330:
  # power supply decoupling cap for U302
  hier=mob.spkr.C330
- value=1uF
- footprint=0402
+ value=1u
+ footprint=0603
  npins=2
 
 C331:
@@ -230,29 +259,33 @@
 # Cap in charging circuit between ICTL and VCHG
 C401:
  hier=mob.chg.C401
- value=22nF
+ value=22n
  footprint=0402
  npins=2
 
 # Bypass cap for U401
 C402:
  hier=mob.uart.U401_bypass
+ value=100n
  footprint=0402
  npins=2
 
 # Bypass cap for U402
 C403:
  hier=mob.sim.inv_bypass
+ value=100n
  footprint=0402
  npins=2
 
 C404:
  hier=mob.lcd.LCD_bypass_cap
+ value=100n
  footprint=0402
  npins=2
 
 C405:
  hier=mob.lcd.bl.cursel.U403_bypass
+ value=100n
  footprint=0402
  npins=2
 
@@ -264,7 +297,7 @@
 
 C407:
  hier=mob.audio_hso.C23
- value=2.2u
+ value=2u2
  footprint=0603
  npins=2
 
@@ -282,52 +315,61 @@
 
 C410:
  hier=mob.audio_main.C32
+ value=33p
  footprint=0402
  npins=2
 
 C411:
  hier=mob.audio_main.C21
+ value=100n
  footprint=0402
  npins=2
 
 C412:
  hier=mob.audio_main.C12
+ value=100n
  footprint=0402
  npins=2
 
 C413:
  hier=mob.audio_main.C13
- value=10uF
+ value=10u
  footprint=0805
  npins=2
 
 C414:
  hier=mob.audio_main.C14
+ value=33p
  footprint=0402
  npins=2
 
 C415:
  hier=mob.audio_main.C15
+ value=33p
  footprint=0402
  npins=2
 
 C416:
  hier=mob.audio_main.C16
+ value=18p
  footprint=0402
  npins=2
 
 C417:
  hier=mob.audio_main.C17
+ value=33p
  footprint=0402
  npins=2
 
 C418:
  hier=mob.audio_main.C18
+ value=18p
  footprint=0402
  npins=2
 
 C419:
  hier=mob.audio_main.C19
+ value=33p
  footprint=0402
  npins=2
 
@@ -339,245 +381,293 @@
 
 C600:
  hier=mob.core.rf.rita2pa_hb.C600
+ value=27p
  footprint=0402
  npins=2
 
 C606:
  hier=mob.core.rf.Rita_vcxo.rita.C606
+ value=100n
  footprint=0402
  npins=2
 
 C607:
  hier=mob.core.rf.Rita_vcxo.rita.C607
+ value=100p
  footprint=0402
  npins=2
 
 C608:
  hier=mob.core.rf.Rita_vcxo.rita.C608
+ value=100n
  footprint=0402
  npins=2
 
 C609:
  hier=mob.core.rf.Rita_vcxo.rita.C609
+ value=10p
  footprint=0402
  npins=2
 
 C610:
  hier=mob.core.rf.Rita_vcxo.rita.C610
+ value=100p
  footprint=0402
  npins=2
 
 C613:
  hier=mob.core.rf.Rita_vcxo.rita.C613
+ value=1u
  footprint=0603
  npins=2
 
 C614:
  hier=mob.core.rf.fem2rita_low.C614
+ value=100p
  footprint=0402
  npins=2
 
 C615:
  hier=mob.core.rf.fem2rita_low.C615
+ value=100p
  footprint=0402
  npins=2
 
 C616:
  hier=mob.core.rf.Rita_vcxo.rita.C616
+ value=100n
  footprint=0402
  npins=2
 
 C617:
  hier=mob.core.rf.Rita_vcxo.rita.C617
+ value=100p
  footprint=0402
  npins=2
 
 C619:
  hier=mob.core.rf.Rita_vcxo.rita.C619
+ value=1u
  footprint=0603
  npins=2
 
 C620:
  hier=mob.core.rf.Rita_vcxo.rita.C620
+ value=100n
  footprint=0402
  npins=2
 
 C622:
  hier=mob.core.rf.Rita_vcxo.rita.C622
+ value=1u
  footprint=0603
  npins=2
 
 C624:
  hier=mob.core.rf.fem2rita_pcs.C624
+ value=15p
  footprint=0402
  npins=2
 
 C625:
  hier=mob.core.rf.fem2rita_pcs.C625
+ value=15p
  footprint=0402
  npins=2
 
 C628:
  hier=mob.core.rf.Rita_vcxo.rita.XEN_cap
+ value=100n
  footprint=0402
  npins=2
 
 C629:
  hier=mob.core.rf.Rita_vcxo.rita.C629
+ value=100p
  footprint=0402
  npins=2
 
 C630:
  hier=mob.core.rf.Rita_vcxo.rita.C630
+ value=100p
  footprint=0402
  npins=2
 
 C631:
  hier=mob.core.rf.Rita_vcxo.rita.C631
+ value=100n
  footprint=0402
  npins=2
 
 C632:
  hier=mob.core.rf.Rita_vcxo.rita.C632
+ value=100n
  footprint=0402
  npins=2
 
 C633:
  hier=mob.core.rf.Rita_vcxo.rita.C633
+ value=100p
  footprint=0402
  npins=2
 
 C634:
  hier=mob.core.rf.Rita_vcxo.rita.C634
+ value=470n
  footprint=0402
  npins=2
 
 C635:
  hier=mob.core.rf.FEM.C635
+ value=47p
  footprint=0402
  npins=2
 
 C643:
  hier=mob.core.rf.FEM.C643
+ value=33p
  footprint=0402
  npins=2
 
 C644:
  hier=mob.core.rf.FEM.C644
+ value=12p
  footprint=0402
  npins=2
 
 C645:
  hier=mob.core.rf.FEM.C645
+ value=47p
  footprint=0402
  npins=2
 
 C648:
  hier=mob.core.rf.PA.C648
+ value=680p
  footprint=0402
  npins=2
 
 C651:
  # PA power supply small cap
  hier=mob.core.rf.PA.C651
+ value=12p
  footprint=0402
  npins=2
 
 C652:
  # PA power supply small cap
  hier=mob.core.rf.PA.C652
+ value=47p
  footprint=0402
  npins=2
 
 C653:
  # PA power supply small cap
  hier=mob.core.rf.PA.C653
+ value=100n
  footprint=0402
  npins=2
 
 C654:
  # PA power supply big cap
  hier=mob.core.rf.PA.C654
+ value=22u
  footprint=0805
  npins=2
 
 C655:
  hier=mob.core.rf.rita2pa_lb.C655
+ value=47p
  footprint=0402
  npins=2
 
 C656:
  hier=mob.core.rf.PA.C656
+ value=100p
  footprint=0402
  npins=2
 
 C698:
  hier=mob.core.rf.Rita_vcxo.rita.XEN_cap2
+ value=10u
  footprint=0805
  npins=2
 
 C699:
  hier=mob.core.rf.fem2rita_dcs.C699
+ value=0p5
  footprint=0402
  npins=2
 
 C701:
  hier=usb.usb.FT2232D.VCCIOA_bypass_cap
+ value=100n
  footprint=0402
  npins=2
 
 C702:
  hier=usb.usb.FT2232D.VCCIOB_bypass_cap
+ value=100n
  footprint=0402
  npins=2
 
 C703:
  hier=usb.usb.FT2232D.AVCC_cap
+ value=100n
  footprint=0402
  npins=2
 
 C704:
  hier=usb.usb.FT2232D.FTDI_3V3_cap
+ value=100n
  footprint=0402
  npins=2
 
 C705:
  hier=usb.usb.FT2232D.XTIN_cap
+ value=22p
  footprint=0402
  npins=2
 
 C706:
  hier=usb.usb.FT2232D.XTOUT_cap
+ value=22p
  footprint=0402
  npins=2
 
 C707:
  hier=usb.usb.P_5V_cap
+ value=100n
  footprint=0402
  npins=2
 
 C708:
  hier=usb.usb.P_5V_cap2
+ value=22u
  footprint=0805
  npins=2
 
 C709:
  hier=usb.reg_3V3.input_cap
+ value=1u
  footprint=0603
  npins=2
 
 C710:
  hier=usb.reg_3V3.output_cap
+ value=1u
  footprint=0603
  npins=2
 
 C711:
  hier=usb.buf.bypass_cap
+ value=100n
  footprint=0402
  npins=2
 
 C712:
  hier=usb.bctl.od_buf_bypass_cap
+ value=100n
  footprint=0402
  npins=2