| Wed, 01 Dec 2021 03:26:15 +0000 |
Mychaela Falconia |
HSO audio channel implemented
|
| Wed, 01 Dec 2021 02:22:39 +0000 |
Mychaela Falconia |
main audio channel implemented
|
| Sat, 27 Nov 2021 20:43:23 +0000 |
Mychaela Falconia |
VSP sniff tap implemented
|
| Sat, 27 Nov 2021 20:01:56 +0000 |
Mychaela Falconia |
add VBAT tap for calibration measurements
|
| Sat, 27 Nov 2021 19:46:01 +0000 |
Mychaela Falconia |
LPG and PWL LEDs implemented
|
| Sat, 27 Nov 2021 19:16:58 +0000 |
Mychaela Falconia |
MCL: prebiased transistor pair parts
|
| Sat, 27 Nov 2021 18:34:05 +0000 |
Mychaela Falconia |
ON_nOFF indicator LED implemented
|
| Sat, 27 Nov 2021 07:03:14 +0000 |
Mychaela Falconia |
keypad initial implementation
|
| Sat, 27 Nov 2021 04:43:53 +0000 |
Mychaela Falconia |
Verilog src: preparations for adding the keypad
|
| Sat, 27 Nov 2021 04:25:30 +0000 |
Mychaela Falconia |
MCL: preliminary part selection for keypad switches
|
| Sat, 27 Nov 2021 02:46:19 +0000 |
Mychaela Falconia |
LCD subsystem integrated
|
| Sat, 27 Nov 2021 02:09:46 +0000 |
Mychaela Falconia |
progress toward LCD integration
|
| Sat, 27 Nov 2021 01:43:32 +0000 |
Mychaela Falconia |
MAX1916.v and lcd_module.v from lunalcd2
|
| Sat, 27 Nov 2021 01:34:05 +0000 |
Mychaela Falconia |
74LVC2G125 buffer for BL control captured at MCL level
|
| Sat, 27 Nov 2021 01:09:05 +0000 |
Mychaela Falconia |
MCL and primitives: LCD and MAX1916 from lunalcd2
|
| Sat, 27 Nov 2021 00:25:20 +0000 |
Mychaela Falconia |
add top README
|
