FreeCalypso > hg > freecalypso-schem2

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age author description
Sat, 20 Nov 2021 04:32:50 +0000 Mychaela Falconia Venus src: jtag_if.v adapted from FCDEV3B
Fri, 19 Nov 2021 20:59:14 +0000 Mychaela Falconia Venus src: SIM socket block captured
Fri, 19 Nov 2021 20:35:10 +0000 Mychaela Falconia Venus src: add 74LVC1G04 inverting buffer for SIM_CD
Fri, 19 Nov 2021 20:10:46 +0000 Mychaela Falconia venus/src/periph/calypso_uart_in.v written
Fri, 19 Nov 2021 19:46:03 +0000 Mychaela Falconia Venus primitives: add logic IC subpackages
Fri, 19 Nov 2021 18:57:57 +0000 Mychaela Falconia Venus MCL: add 74LVC125A for Calypso UART inputs
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