| Fri, 19 Nov 2021 06:09:13 +0000 |
Mychaela Falconia |
Venus core: bring out SIM_CD
|
| Fri, 19 Nov 2021 05:58:21 +0000 |
Mychaela Falconia |
Venus: first version of Verilog for the Calypso core
|
| Fri, 19 Nov 2021 03:47:49 +0000 |
Mychaela Falconia |
Venus primitives: add TRRS jack
|
| Fri, 19 Nov 2021 03:44:51 +0000 |
Mychaela Falconia |
Venus MCL: add audio jacks
|
| Fri, 19 Nov 2021 03:07:48 +0000 |
Mychaela Falconia |
Venus primitives file started
|
| Fri, 19 Nov 2021 01:43:41 +0000 |
Mychaela Falconia |
Venus MCL: add LEDs
|
| Fri, 19 Nov 2021 01:02:52 +0000 |
Mychaela Falconia |
Venus MCL: connectors from FCDEV3B
|
| Fri, 19 Nov 2021 00:35:01 +0000 |
Mychaela Falconia |
venus/src/pinouts: from FCDEV3B and Tango
|
| Fri, 19 Nov 2021 00:26:08 +0000 |
Mychaela Falconia |
Venus MCL: put Epcos FEM at U601
|
| Fri, 19 Nov 2021 00:24:16 +0000 |
Mychaela Falconia |
Venus MCL: specify X201 32.768 kHz crystal
|
| Thu, 18 Nov 2021 23:35:57 +0000 |
Mychaela Falconia |
Venus MCL: starting with major components
|
