log

age author description
2021-11-24 Mychaela Falconia venus/doc/MEMIF-fixed-2.8V: explanatory article
2021-11-22 Mychaela Falconia eliminate R209 and tie Iota VLMEM directly to UPR
2021-11-22 Mychaela Falconia starpoints in core: commit to using pcb-rnd intnoconn
2021-11-22 Mychaela Falconia charging LED circuit captured
2021-11-22 Mychaela Falconia intnoconn approach to charging current sense resistor
2021-11-21 Mychaela Falconia Venus src: charging circuit captured
2021-11-21 Mychaela Falconia Venus MCL: use new ipc-diode.pinout, add SS34 for charging
2021-11-21 Mychaela Falconia Venus MCL: add Q401 charging circuit MOSFET
2021-11-21 Mychaela Falconia venus/src/Makefile: generate bound.unet
2021-11-21 Mychaela Falconia Venus MCL: ready for first binding
2021-11-21 Mychaela Falconia Venus MCL: first steps toward binding,
2021-11-20 Mychaela Falconia Venus: reached the point of compiling sverp.unet
2021-11-20 Mychaela Falconia Venus: preliminary choice of slide switch part for charging control
2021-11-20 Mychaela Falconia Venus src: USB domain captured
2021-11-20 Mychaela Falconia venus/src/usb: building blocks from DUART28
2021-11-20 Mychaela Falconia Venus primitives: additions for USB
2021-11-20 Mychaela Falconia Venus MCL: smaller package for USB EEPROM
2021-11-20 Mychaela Falconia Venus MCL: USB connector and ICs from DUART28
2021-11-20 Mychaela Falconia venus/src/top/mobile.v written
2021-11-20 Mychaela Falconia Venus src: jtag_if.v adapted from FCDEV3B
2021-11-19 Mychaela Falconia Venus src: SIM socket block captured
2021-11-19 Mychaela Falconia Venus src: add 74LVC1G04 inverting buffer for SIM_CD
2021-11-19 Mychaela Falconia venus/src/periph/calypso_uart_in.v written
2021-11-19 Mychaela Falconia Venus primitives: add logic IC subpackages
2021-11-19 Mychaela Falconia Venus MCL: add 74LVC125A for Calypso UART inputs
2021-11-19 Mychaela Falconia venus/src/periph/battery.v: adapted from FCDEV3B
2021-11-19 Mychaela Falconia venus/src/periph/sma_wrap.v: unchanged from FCDEV3B
2021-11-19 Mychaela Falconia Venus core: bring out SIM_CD
2021-11-19 Mychaela Falconia Venus: first version of Verilog for the Calypso core
2021-11-19 Mychaela Falconia Venus primitives: add TRRS jack
2021-11-19 Mychaela Falconia Venus MCL: add audio jacks
2021-11-19 Mychaela Falconia Venus primitives file started
2021-11-19 Mychaela Falconia Venus MCL: add LEDs
2021-11-19 Mychaela Falconia Venus MCL: connectors from FCDEV3B
2021-11-19 Mychaela Falconia venus/src/pinouts: from FCDEV3B and Tango
2021-11-19 Mychaela Falconia Venus MCL: put Epcos FEM at U601
2021-11-19 Mychaela Falconia Venus MCL: specify X201 32.768 kHz crystal
2021-11-18 Mychaela Falconia Venus MCL: starting with major components