| Sat, 27 Nov 2021 07:03:14 +0000 |
Mychaela Falconia |
keypad initial implementation
|
| Sat, 27 Nov 2021 04:43:53 +0000 |
Mychaela Falconia |
Verilog src: preparations for adding the keypad
|
| Sat, 27 Nov 2021 04:25:30 +0000 |
Mychaela Falconia |
MCL: preliminary part selection for keypad switches
|
| Sat, 27 Nov 2021 02:46:19 +0000 |
Mychaela Falconia |
LCD subsystem integrated
|
| Sat, 27 Nov 2021 02:09:46 +0000 |
Mychaela Falconia |
progress toward LCD integration
|
| Sat, 27 Nov 2021 01:43:32 +0000 |
Mychaela Falconia |
MAX1916.v and lcd_module.v from lunalcd2
|
| Sat, 27 Nov 2021 01:34:05 +0000 |
Mychaela Falconia |
74LVC2G125 buffer for BL control captured at MCL level
|
| Sat, 27 Nov 2021 01:09:05 +0000 |
Mychaela Falconia |
MCL and primitives: LCD and MAX1916 from lunalcd2
|
| Sat, 27 Nov 2021 00:25:20 +0000 |
Mychaela Falconia |
add top README
|
| Fri, 26 Nov 2021 23:45:48 +0000 |
Mychaela Falconia |
add missing bypass caps for mobile domain peripherals
|
| Fri, 26 Nov 2021 23:32:00 +0000 |
Mychaela Falconia |
charging_circuit structural module contains no connections to GND
|
| Fri, 26 Nov 2021 23:18:12 +0000 |
Mychaela Falconia |
use buffer_slot_od primitive for slots of 74LVC2G07
|
