FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/riviera/init/Makefile @ 632:02d14592bb73
ramImage build change: load iram.text directly into IRAM w/o wasting XRAM
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Mon, 01 Sep 2014 18:02:06 +0000 |
parents | afceeeb2cba1 |
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rev | line source |
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129
7d7950d7f924
Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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1 CC= arm-elf-gcc |
7d7950d7f924
Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
2 CFLAGS= -Os -fno-builtin -mthumb-interwork -mthumb |
7d7950d7f924
Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
3 |
7d7950d7f924
Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
4 OBJS= create_RVtasks.o |
7d7950d7f924
Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
5 |
7d7950d7f924
Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
6 all: ${OBJS} |
7d7950d7f924
Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
7 |
7d7950d7f924
Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
8 clean: |
7d7950d7f924
Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
9 rm -f *.[oa] *errs |