FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/L1/tpudrv/tpudrv12.h @ 281:082d12a1651e

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
fc-fsio: single command invokation works
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Mon, 24 Feb 2014 07:44:33 +0000
parents 47754cdb6248
children 7f305eb3c530
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
153
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1 /****************** Revision Controle System Header ***********************
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2 * GSM Layer 1 software
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3 * Copyright (c) Texas Instruments 1998
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
4 *
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
5 * Filename tpudrv12.h
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
6 * Copyright 2003 (C) Texas Instruments
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
7 *
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
8 ****************** Revision Controle System Header ***********************/
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
9
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
10 //--- Configuration values
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
11 #define FEM_TEST 0 // 1 => ENABLE the FEM_TEST mode
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
12 #define RF_VERSION 1 // 1 or V1, 5 for V5, etc
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
13 #define SAFE_INIT_WA 0 // 1 => ENABLE the "RITA safe init"
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
14 // TeST - Enable Main VCO buffer for test
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
15 #define MAIN_VCO_ACCESS_WA 0 // 1 => ENABLE the Main VCO buffer
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
16
154
47754cdb6248 abb.c compiles!
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 153
diff changeset
17 #if 0 // FreeCalypso
153
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
18 #include "rf.cfg"
154
47754cdb6248 abb.c compiles!
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 153
diff changeset
19 #endif
153
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
20
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
21 //--- RITA PG declaration
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
22
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
23 #define R_PG_10 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
24 #define R_PG_13 1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
25 #define R_PG_20 2 // For RFPG 2.2, use 2.0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
26 #define R_PG_23 3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
27
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
28 //--- PA declaration
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
29 #define PA_MGF9009 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
30 #define PA_RF3146 1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
31 #define PA_RF3133 2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
32 #define PA_PF08123B 3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
33 #define PA_AWT6108 4
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
34
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
35 #if (RF_PA == PA_MGF9009 || RF_PA == PA_PF08123B)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
36 #define PA_CTRL_INT 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
37 #else
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
38 #define PA_CTRL_INT 1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
39 #endif
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
40
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
41 //- Select the RF PG (x10), i.e. 10 for 1.0, 11 for 1.1 or 20 for 2.0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
42 // AlphaRF7 => "PG #1.3" for TPU purposes (not an official PC number)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
43 // This is also used in l1_rf12.h to select the SWAP_IQ
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
44 #if (RF_PG >= R_PG_20)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
45 // TeST - PLL2 WA activation => Set PLL2 Speed-up ON in RX
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
46 #define PLL2_WA 0 // 0 => DISABLE the PLL2_WA (Rene's "Work-Around")
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
47 #define ALPHA_RF7_WA 0 // 0 => DISABLE the Alpha RF7 work-arounds
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
48 #elif (RF_PG == R_PG_13)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
49 // TeST - PLL2 WA activation => Set PLL2 Speed-up ON in RX
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
50 #define PLL2_WA 1 // 1 => ENABLE the PLL2_WA (Rene's "Work-Around")
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
51 #define ALPHA_RF7_WA 1 // 1 => ENABLE the Alpha RF7 work-arounds
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
52 #else
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
53 // TeST - PLL2 WA activation => Set PLL2 Speed-up ON in RX
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
54 #define PLL2_WA 1 // 1 => ENABLE the PLL2_WA (Rene's "Work-Around")
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
55 #define ALPHA_RF7_WA 1 // 1 => ENABLE the Alpha RF7 work-arounds
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
56 #endif
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
57
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
58 //- Bit definitions for TST register programings, etc
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
59 #define BIT_0 0x000001
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
60 #define BIT_1 0x000002
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
61 #define BIT_2 0x000004
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
62 #define BIT_3 0x000008
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
63 #define BIT_4 0x000010
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
64 #define BIT_5 0x000020
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
65 #define BIT_6 0x000040
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
66 #define BIT_7 0x000080
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
67 #define BIT_8 0x000100
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
68 #define BIT_9 0x000200
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
69 #define BIT_10 0x000400
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
70 #define BIT_11 0x000800
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
71 #define BIT_12 0x001000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
72 #define BIT_13 0x002000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
73 #define BIT_14 0x004000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
74 #define BIT_15 0x008000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
75 #define BIT_16 0x010000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
76 #define BIT_17 0x020000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
77 #define BIT_18 0x040000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
78 #define BIT_19 0x080000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
79 #define BIT_20 0x100000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
80 #define BIT_21 0x200000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
81 #define BIT_22 0x400000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
82 #define BIT_23 0x800000
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
83
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
84 //--- TRF6151 definitions ------------------------------------------
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
85
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
86 //- BASE REGISTER definitions
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
87 #define REG_RX 0x000000 // MODE0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
88 #define REG_PLL 0x000001 // MODE1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
89 #define REG_PWR 0x000002 // MODE2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
90 #define REG_CFG 0x000003 // MODE3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
91
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
92 //- TeST REGISTER definitions => Used for WA only
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
93 // TeST - PLL2 WA => Define PLL2 TEST register
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
94 #define TST_PLL2 0x00001E // MODE 14
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
95
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
96 // TeST - Enable Main VCO buffer for test => Define TST_VCO3 register
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
97 #define TST_VCO3 0x00000F // MODE 15 (0*16+15*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
98 #define TST_VCO4 0x000024 // MODE 36 (2*16+4*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
99
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
100 // Alpha RF7 WA TeST registers
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
101 #define TST_LDO 0x000027 // MODE 39 (2*16+7*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
102 #define TST_PLL1 0x00001D // MODE 29 (1*16+13*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
103 #define TST_TX2 0x000037 // MODE 55 (3*16+7*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
104
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
105 // More Alpha RF7 WA TeST registers
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
106 #define TST_TX3 0x00003C // MODE 61 (3*16+12*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
107 #define TST_TX4 0x00003D // MODE 61 (3*16+13*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
108
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
109 // PG 2.1 WA TeST registers
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
110 #define TST_PLL3 0x00001F // MODE 31 (1*16+15*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
111 // #define TST_PLL4 0x00002C // MODE 44 (2*16+12*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
112 #define TST_MISC 0x00003E // MODE 62 (3*16+14*1) => Used for setting the VCXO current
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
113 #define TST_LO 0x00001C // MODE 28 (1*16+12*1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
114
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
115 // Registers used to improve the Modulation Spectrum in DCS/PCS for PG2.1 V1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
116 // UPDATE_SERIAL_REGISTER_COPY is a "dummy addres" that,
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
117 // when accessed, triggers the copy of the serial registers.
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
118 // This is necessary to switch into "manual operation mode"
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
119 #define UPDATE_SERIAL_INTERFACE_COPY 0x000007
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
120 #define TX_LOOP_MANUAL BIT_3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
121
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
122
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
123 //- REG_RX - MODE0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
124 #define BLOCK_DETECT_0 BIT_3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
125 #define BLOCK_DETECT_1 BIT_4
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
126 #define RST_BLOCK_DETECT_0 BIT_5
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
127 #define RST_BLOCK_DETECT_1 BIT_6
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
128 #define READ_EN BIT_7
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
129 #define RX_CAL_MODE BIT_8
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
130 #define RF_GAIN (BIT_10 | BIT_9)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
131
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
132
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
133 //- REG_PLL - MODE1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
134 //PLL_REGB
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
135 //PLL_REGA
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
136
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
137 //- REG_PWR - MODE2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
138 #define BANDGAP_MODE_OFF 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
139 #define BANDGAP_MODE_ON_ENA BIT_4
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
140 #define BANDGAP_MODE_ON_DIS (BIT_4 | BIT_3)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
141 #define REGUL_MODE_ON BIT_5
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
142 // BIT[8..6] band
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
143 #define BAND_SELECT_GSM BIT_6
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
144 #define BAND_SELECT_DCS BIT_7
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
145 #define BAND_SELECT_850_LO BIT_8
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
146 #define BAND_SELECT_850_HI (BIT_8 | BIT_6)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
147 #define BAND_SELECT_PCS (BIT_8 | BIT_7)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
148
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
149 #define SYNTHE_MODE_OFF 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
150 #define SYNTHE_MODE_RX BIT_9
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
151 #define SYNTHE_MODE_TX BIT_10
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
152 #define RX_MODE_OFF 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
153 #define RX_MODE_A BIT_11
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
154 #define RX_MODE_B1 BIT_12
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
155 #define RX_MODE_B2 (BIT_12 | BIT_11)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
156 #define TX_MODE_OFF 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
157 #define TX_MODE_ON BIT_13
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 #define PACTRL_APC_OFF 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159 #define PACTRL_APC_ON BIT_14
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
160 #define PACTRL_APC_DIS 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161 #define PACTRL_APC_ENA BIT_15
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
162
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164 //- REG_CFG - MODE3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
165 // Common PA controller settings:
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166 #define PACTRL_TYPE_PWR 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
167 #define PACTRL_TYPE_CUR BIT_3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168 #define PACTRL_IDIOD_30_UA 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169 #define PACTRL_IDIOD_300_UA BIT_4
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
170
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
171 // PA controller Clara-like (Power Sensing) settings:
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
172 #define PACTRL_VHOME_610_MV (BIT_7 | BIT_5)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
173 #define PACTRL_VHOME_839_MV (BIT_7 | BIT_5)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
174 #define PACTRL_VHOME_1000_MV (BIT_6 | BIT_9)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
175 #define PACTRL_VHOME_1600_MV (BIT_8 | BIT_5)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
176 #define PACTRL_RES_OPEN 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
177 #define PACTRL_RES_150_K BIT_10
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
178 #define PACTRL_RES_300_K BIT_11
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
179 #define PACTRL_RES_NU (BIT_10 | BIT_11)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
180 #define PACTRL_CAP_0_PF 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
181 #define PACTRL_CAP_12_5_PF BIT_12
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
182 #define PACTRL_CAP_25_PF (BIT_13 | BIT_12)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
183 #define PACTRL_CAP_50_PF BIT_13
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
184
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
185 // PACTRL_CFG contains the configuration of the PACTRL that will
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
186 // be put into the REG_CFG register at initialization time
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
187 // WARNING - Do not forget to set the PACTRL_TYPE (PWR or CUR)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
188 // in this #define!!!
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
189 #if (RF_PA == 0) // MGF9009 (LCPA)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
190 #define PACTRL_CFG \
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
191 PACTRL_IDIOD_300_UA | \
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
192 PACTRL_CAP_25_PF | \
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
193 PACTRL_VHOME_1000_MV | \
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
194 PACTRL_RES_300_K
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
195 #elif (RF_PA == 1) // 3146
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
196 #define PACTRL_CFG 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
197
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
198 #elif (RF_PA == 2) // 3133
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
199 #define PACTRL_CFG 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
200
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
201 #elif (RF_PA == 3) // PF08123B
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
202 #define PACTRL_CFG \
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
203 PACTRL_TYPE_PWR | \
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
204 PACTRL_CAP_50_PF | \
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
205 PACTRL_RES_300_K | \
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
206 PACTRL_VHOME_610_MV
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
207 #elif (RF_PA == 4) // AWT6108
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
208 #define PACTRL_CFG 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
209 #else
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
210 #error Unknown PA specifiec!
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
211 #endif
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
212
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
213 // Temperature sensor
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
214 #define TEMP_SENSOR_OFF 0x0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
215 #define TEMP_SENSOR_ON BIT_14
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
216 // Internal Logic Init Disable
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
217 #define ILOGIC_INIT_DIS BIT_15
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
218 // ILOGIC_INIT_DIS must be ALWAYS set when programming the REG_CFG register
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
219 // It was introduced in PG 1.2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
220 // For previous PGs this BIT was unused, so it can be safelly programmed
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
221 // for all PGs
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
222
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
223
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
224 // RF signals connected to TSPACT [0..7]
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
225 //#define RESET_RF BIT_0 // act0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
226 #define RF_SER_ON BIT_0 // act0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
227 #define RF_SER_OFF 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
228
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
229
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
230 #if (FEM_TEST==1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
231 //for test
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
232 #define TEST_TX_ON BIT_2 // act2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
233 #define TEST_RX_ON BIT_3 // act3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
234
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
235 //3-band config (D-sample)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
236 #define FEM_1 BIT_1 // act1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
237 #define FEM_2 0 //BIT_2 // act2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
238 #define FEM_3 0 //BIT_3 // act3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
239 #elif (BOARD == 42 || BOARD == 43 || BOARD == 35 || (BOARD == 41 && (RF_PA == 0 || RF_PA == 1 || RF_PA == 2 || RF_PA == 4))) // ESample, P2, Leonardo
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
240 #define TEST_TX_ON 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
241 #define TEST_RX_ON 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
242 // 4-band config (E-sample, P2, Leonardo)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
243 #define FEM_7 BIT_2 // act2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
244 #define FEM_8 BIT_1 // act1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
245 #define FEM_9 BIT_4 // act4
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
246
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
247 #if (RF_PA == 0) // LCPA for ES, P2 and Leo
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
248 #define PA_HI_BAND BIT_3 // act3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
249 #define PA_LO_BAND 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
250 #define PA_OFF 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
251 #elif (RF_PA == 1) // RF3146 for ES and Leonardo
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
252 #define PA_HI_BAND BIT_3 // act3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
253 #define PA_LO_BAND 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
254 #define PA_OFF 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
255 #elif (RF_PA == 2) // RF3133 for P2 and Leonardo
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
256 #define PA_HI_BAND BIT_3 // act3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
257 #define PA_LO_BAND 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
258 #define PA_OFF 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
259 #elif (RF_PA == 4) // AWT6108 for Leonardo
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
260 #define PA_HI_BAND BIT_3 // act3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
261 #define PA_LO_BAND 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
262 #define PA_OFF 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
263 #else
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
264 #error "RF_PA not correctly defined"
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
265 #endif
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
266
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
267 #else // DSample + EVARITA
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
268 #if (RF_PA != 3) // Hitachi for EVARITA
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
269 #error
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
270 #endif
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
271
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
272 //#define TEST_RX_ON 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
273 //#define TEST_TX_ON BIT_3 // act3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
274 #define TEST_TX_ON 0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
275 #define TEST_RX_ON BIT_3 // act3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
276
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
277 //3-band config (D-sample)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
278 #define FEM_1 BIT_1 // act1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
279 #define FEM_2 BIT_2 // act2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
280 #define FEM_3 BIT_3 // act3
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
281 #endif
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
282
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
283 #if (BOARD == 42 || BOARD == 43 || BOARD == 35 || (BOARD == 41 && (RF_PA == 0 || RF_PA == 1 || RF_PA == 2 || RF_PA == 4))) // ESample, P2, Leonardo
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
284
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
285 #define FEM_PINS (FEM_7 | FEM_8 | FEM_9)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
286
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
287 #define FEM_OFF ( FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
288
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
289 #define FEM_SLEEP ( 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
290
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
291 // This configuration is always inverted.
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
292
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
293 // 4-band config
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
294 // RX_UP/DOWN and TX_UP/DOWN
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
295 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
296 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
297 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_9 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
298 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
299
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
300 #define RU_850 ( PA_LO_BAND | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
301 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
302 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_9 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
303 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
304
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
305 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
306 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
307 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
308 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
309
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
310 #define RU_1900 ( PA_LO_BAND | FEM_PINS ^ FEM_8 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
311 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
312 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
313 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
314
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
315 #else // end BOARD = 43
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
316 // start RF HW interfacing with EVARITA
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
317
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
318 #define FEM_OFF (FEM_1 | FEM_2)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
319 #define FEM_SLEEP (0) // To avoid leakage during Deep-Seep
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
320
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
321 // 3-band config
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
322 // RX_UP/DOWN and TX_UP/DOWN
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
323 #define RU_900 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
324 #define RD_900 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
325 #define TU_900 ( FEM_1 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
326 #define TD_900 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
327
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
328 #define RU_850 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
329 #define RD_850 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
330 #define TU_850 ( FEM_1 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
331 #define TD_850 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
332
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
333 #define RU_1800 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
334 #define RD_1800 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
335 #define TU_1800 ( FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
336 #define TD_1800 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
337
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
338 #define RU_1900 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
339 #define RD_1900 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
340 #define TU_1900 ( FEM_2)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
341 #define TD_1900 ( FEM_1 | FEM_2 )
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
342
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
343 #endif // BOARD != 43
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
344
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
345 #define TC1_DEVICE_ABB TC1_DEVICE0 // TSPEN0
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
346 #define TC1_DEVICE_RF TC1_DEVICE2 // TSPEN2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
347
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
348
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
349 //--- TIMINGS ----------------------------------------------------------
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
350
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
351 /*------------------------------------------*/
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
352 /* Download delay values */
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
353 /*------------------------------------------*/
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
354 // 1 qbit = 12/13 usec (~0.9230769), i.e. 200 usec is ~ 217 qbit (200 * 13 / 12)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
355
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
356 #define T TPU_CLOCK_RANGE
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
357
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
358
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
359 // - TPU instruction into TSP timings ---
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
360 // 1 tpu instruction = 1 qbit
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
361 #define DLT_1 1 // 1 tpu instruction = 1 qbit
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
362 #define DLT_2 2 // 2 tpu instruction = 2 qbit
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
363 #define DLT_3 3 // 3 tpu instruction = 3 qbit
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
364 #define DLT_4 4 // 4 tpu instruction = 4 qbit
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
365 #define SL_SU_DELAY2 DLT_3 // Needed to compile with old l1_rf12
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
366
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
367 // - Serialization timings ---
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
368 // The following values where calculated with Katrin Matthes...
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
369 //#define SL_7 3 // To send 7 bits to the ABB, 14*T (1/6.5MHz) are needed,
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
370 // // i.e. 14 / 6 qbit = 2.333 ~ 3 qbit
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
371 //#define SL_2B 6 // To send 2 bytes to the RF, 34*T (1/6.5MHz) are needed,
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
372 // // i.e. 34 / 6 qbit = 5.7 ~ 6 qbit
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
373 // ... while the following values are based on the HYP004.doc document
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
374 #define SL_7 2 // To send 7 bits to the ABB, 12*T (1/6.5MHz) are needed,
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
375 // i.e. 12 / 6 qbit = 2 qbit
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
376 #define SL_2B 4 // To send 2 bytes to the RF, 21*T (1/6.5MHz) are needed,
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
377 // i.e. 21 / 6 qbit = 3.5 ~ 4 qbit
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
378
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
379 // - TPU command execution + serialization length ---
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
380 #define DLT_1B 4 // 3*move + serialization of 7 bits
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
381 #define DLT_2B 7 // 4*move + serialization of 2 bytes
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
382 //#define DLT_1B DLT_3 + SL_7 // 3*move + serialization of 7 bits
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
383 //#define DLT_2B DLT_4 + SL_2B // 4*move + serialization of 2 bytes
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
384
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
385
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
386 // - INIT (delta or DLT) timings ---
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
387 #define DLT_I1 5 // Time required to set EN high before RF_SER_OFF -> RF_SER_ON
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
388 #define DLT_I2 8 // Time required to set RF_SER_OFF
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
389 #define DLT_I3 5 // Time required to set RF_SER_ON
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
390 #define DLT_I4 110 // Regulator Turn-ON time
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
391
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
392
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
393 // - tdt & rdt ---
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
394 // MAX GSM (not GPRS) rdt and tdt values are...
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
395 //#define rdt 380 // MAX GSM rx delta timing
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
396 //#define tdt 400 // MAX GSM tx delta timing
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
397 // but current rdt and tdt values are...
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
398 #define rdt 0 // rx delta timing
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
399 #define tdt 0 // tx delta timing
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
400
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
401 // - RX timings ---
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
402 // - RX down:
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
403 // The times below are offsets to when BDLENA goes down
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
404 #define TRF_R10 ( 0 - DLT_1B ) // disable BDLENA & BDLON -> power DOWN ABB (end of RX burst), needs DLT_1B to execute
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
405 #define TRF_R9 ( - 30 - DLT_2B ) // disable RF SWITCH, power DOWN Rita (go to Idle2 mode)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
406
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
407 // - RX up:
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
408 // The times below are offsets to when BDLENA goes high
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
409 // Burst data comes here
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
410 #define TRF_R8 ( PROVISION_TIME - 0 - DLT_1B ) // enable BDLENA, disable BDLCAL (I/Q comes 32qbit later)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
411 #define TRF_R7 ( PROVISION_TIME - 7 - DLT_1 ) // enable RF SWITCH
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
412 #define TRF_R6 ( PROVISION_TIME - 67 - DLT_1B ) // enable BDLCAL -> ABB DL filter init
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
413 #define TRF_R5 ( PROVISION_TIME - 72 - DLT_1B ) // enable BDLON -> power ON ABB DL path
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
414 #define TRF_R4 ( PROVISION_TIME - 76 - DLT_2B - rdt ) // power ON RX
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
415 #define TRF_R3 (PROVISION_TIME - 143 - DLT_2B - rdt ) // select the AGC & LNA gains + start DC offset calibration (stops automatically)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
416 //l1dmacro_adc_read_rx() called here requires ~ 16 tpuinst
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
417 #define TRF_R2 (PROVISION_TIME - 198 - DLT_2B - rdt ) // set BAND + power ON RX Synth
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
418 #define TRF_R1 (PROVISION_TIME - 208 - DLT_2B - rdt ) // set RX Synth channel
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
419
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
420 // - TX timings ---
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
421 // - TX down:
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
422 // The times below are offsets to when BULENA goes down
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
423
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
424 #if (PA_CTRL_INT == 1)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
425 #define TRF_T13 ( 35 - DLT_1B ) // right after, BULON low
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
426 #define TRF_T12_5 ( 32 - DLT_2B ) // Power OFF TX loop => power down RF.
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
427 #define TRF_T12_3 ( 23 - DLT_1 ) // Disable TXEN.
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
428 #endif
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
429
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
430 #if (PA_CTRL_INT == 0)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
431 #define TRF_T13 ( 35 - DLT_1B ) // right after, BULON low
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
432 #define TRF_T12_2 ( 32 - DLT_2B ) // power down RF step 2
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
433 #define TRF_T12 ( 18 - DLT_2B ) // power down RF step 1
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
434 #endif
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
435
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
436 #define TRF_T11 ( 0 - DLT_1B ) // disable BULENA -> end of TX burst
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
437 #define TRF_T10_5 ( - 40 - DLT_1B ) // ADC read
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
438
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
439 // - TX up:
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
440 // The times below are offsets to when BULENA goes high
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
441 //burst data comes here
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
442 #define TRF_T10_4 ( 22 - DLT_1 ) // enable RF SWITCH + TXEN
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
443 #define TRF_T10 ( 17 - DLT_1 ) // enable RF SWITCH
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
444
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
445 #if (PA_CTRL_INT == 0)
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
446 #define TRF_T9 ( 8 - DLT_2B ) // enable PACTRL
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
447 #endif
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
448
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
449 #define TRF_T8 ( - 0 - DLT_1B ) // enable BULENA -> start of TX burst
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
450 #define TRF_T7 ( - 50 - DLT_1B - tdt ) // disable BULCAL -> stop ABB UL calibration
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
451 #define TRF_T6 ( - 130 - DLT_1B - tdt ) // enable BULCAL -> start ABB UL calibration
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
452 #define TRF_T5 ( - 158 - DLT_2B - tdt ) // power ON TX
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
453 #define TRF_T4 ( - 190 - DLT_1B - tdt ) // enable BULON -> power ON ABB UL path
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
454 // TRF_T3_MAN_1, TRF_T3_MAN_2 & TRF_T3_MAN_3 are only executed in DCS for PG 2.0 and above
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
455 #define TRF_T3_MAN_3 ( - 239 - DLT_2B - tdt ) // PG2.1: Set the right TX loop charge pump current for DCS & PCS
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
456 #define TRF_T3_MAN_2 ( - 249 - DLT_2B - tdt ) // PG2.1: Go into "TX Manual mode"
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
457 #define TRF_T3_MAN_1 ( - 259 - DLT_2B - tdt ) // PG2.1: IN DCS, use manual mode: Copy Serial Interface Registers for "Manual operation"
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
458 #define TRF_T3 ( - 259 - DLT_2B - tdt ) // PG2.1: In GSM & PCS go to "Automatic TX mode"
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
459 #define TRF_T2 ( - 269 - DLT_2B - tdt ) // PG2.0: set BAND + Power ON Main TX PLL + PACTRL ON
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
460 #define TRF_T1 ( - 279 - DLT_2B - tdt ) // set TX Main PLL channel
65efffcb28dc tpudrv*.h headers imported
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
461