FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/L1/include/l1_const.h @ 318:0c87c1f9dac5
GPF: beginning of Makefile hierarchy
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Fri, 11 Apr 2014 05:46:44 +0000 |
parents | afceeeb2cba1 |
children | 1affe428bf72 |
rev | line source |
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1 /************* Revision Controle System Header ************* |
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2 * GSM Layer 1 software |
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3 * L1_CONST.H |
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4 * |
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5 * Filename l1_const.h |
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6 * Copyright 2003 (C) Texas Instruments |
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7 * |
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8 ************* Revision Controle System Header *************/ |
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9 |
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10 #ifdef __MSDOS__ // Running BORLANDC compiler. |
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11 #ifdef MVC |
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12 #define EXIT exit(0) |
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13 #define FAR |
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14 #else |
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15 #define EXIT DOS_Exit(0) |
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16 #define FAR far |
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17 #endif |
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18 #else // Running ARM compiler. |
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19 #define FAR |
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20 #define EXIT exit(0) |
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21 #define stricmp strcmp |
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22 #endif |
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23 |
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24 |
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25 #if (CODE_VERSION != SIMULATION) |
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26 #define NULL 0 |
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27 #endif |
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28 |
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29 #define NO_PAR 0 |
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30 |
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31 #define NO_TASK 0 |
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32 #define ALL_TASK 0xffffffff |
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33 #define ALL_PARAM 0xffffffff |
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34 |
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35 #define TRUE 1 |
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36 #define TRUE_L 1L |
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37 #define FALSE 0 |
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38 |
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39 #define NOT_PENDING 0 |
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40 #define PENDING 1 |
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41 |
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42 #define INACTIVE 2 |
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43 #define ACTIVE 3 |
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44 #define RE_ENTERED 4 |
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45 #define WAIT_IQ 5 |
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46 |
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47 //--------------------------------------------- |
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48 // MCU-DSP bit-field bit position definitions |
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49 //--------------------------------------------- |
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50 #if L1_GPRS |
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51 #define GPRS_SCHEDULER 1 // Select GPRS scheduler |
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52 #endif |
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53 #define GSM_SCHEDULER 2 // Select GSM scheduler |
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54 |
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55 //----------------------------- |
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56 // POWER MANAGEMENT............ |
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57 //----------------------------- |
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58 #define MIN_SLEEP_TIME (SETUP_FRAME+2+l1_config.params.setup_afc_and_rf) //HW WAKE-UP+MIN_SLEEP(2)+AFC RESTORE(2) |
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59 #define TPU_LOAD 01 |
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60 #define TPU_FREEZE 02 |
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61 |
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62 // SLEEP ALGO SWITCH |
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63 #define NO_SLEEP 00 // ------ + ------ + ------ |
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64 #define SMALL_SLEEP 01 // SMALL + ------ + ------ |
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65 #define BIG_SLEEP 02 // ------ + BIG + ------ |
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66 #define DEEP_SLEEP 03 // ------ + BIG + DEEP |
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67 #define ALL_SLEEP 04 // SMALL + BIG + DEEP |
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68 |
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69 // GAUGING SAMPLES |
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70 #define SIZE_HIST 10 |
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71 #define MAX_BAD_GAUGING 3 |
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72 |
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73 // GAUG_IN_32T = (HF in clock of 13Mhz*dpll) * ( LF in Khz) |
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74 #define GAUG_IN_32T 1348 // gauging duration is 1348*T32 measured on eva4 |
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75 |
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76 // DSP state need to be used to enter Deep Sleep mode |
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77 #if (W_A_DSP_IDLE3 == 1) |
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78 #define C_DSP_IDLE3 3 |
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79 #endif |
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80 |
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81 //------------------------------------------------- |
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82 // INIT: value is 32.768Khz at [-500 ppm, +100 ppm] |
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83 // to face temperature variation |
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84 // |
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85 // ACQUIS: variations allowed 32.768Khz +- 50 ppm |
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86 // 9 frames gauging is 1348*T32 (measured on eva4) |
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87 // UPDATE: variation allowed is +- 6 ppm jitter |
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88 //------------------------------------------------- |
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89 |
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90 #define MCUCLK 13000 // 13 Mhz |
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91 #define LF 32.768 |
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92 #define LF_100PPM 32.7712768 // 32.768*(1+100*10E-6) |
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93 #define LF_500PPM 32.751616 // 32.768*(1-500*10E-6) |
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94 #define LF_50PPM 32.7696384 // 32.768*(1+50*10E-6) |
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95 #define LF_6PPM 32.76819661 // 32.768*(1+6*10E-6) |
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96 |
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97 #define NB_INIT 5 // nbr of gauging to pass to ACQUIS |
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98 #define NB_ACQU 10 // nbr of gauging to pass to UPDATE |
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99 |
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100 #if (CHIPSET ==2 || CHIPSET ==3 || CHIPSET == 5 || CHIPSET == 6 || CHIPSET == 9) // PLL is at 65 Mhz !!!!!! |
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101 #define PLL 5 // 5*13Mhz = 65 Mhz |
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102 //------------------------------------------------- |
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103 // INIT: value is 32.768Khz at [-500 ppm, +100 ppm] |
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104 // |
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105 // ACQUIS: variations allowed 32.768Khz +- 50 ppm |
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106 // 9 frames gauging is 1348*T32 (measured on eva4) |
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107 // UPDATE: variation allowed is +- 6 ppm jitter |
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108 //------------------------------------------------- |
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109 #define C_CLK_MIN 1983 // 65000/32.7712768 = 1983.444234 |
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110 #define C_CLK_INIT_MIN 29113 // 0.444234*2^16 |
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111 #define C_CLK_MAX 1984 // 65000 / 32.751616 = 1984.634896 |
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112 #define C_CLK_INIT_MAX 41608 // 0.634896*2^16 |
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113 #define C_DELTA_HF_ACQUIS 130 // 1348/32.768-1348/32.7696384 = 0.002056632ms |
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114 // 0.002056632/0.0001538 = 130 T65Mhz |
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115 #define C_DELTA_HF_UPDATE 15 // 1348/32.768-1348/32.76819661 =0.00024691ms |
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116 // 0.00024691/0.0001538 = 15 T65Mhz |
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117 #endif |
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118 |
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119 #define ARMIO_CLK_CUT 0x0001 |
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120 #define UWIRE_CLK_CUT 0x0002 |
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121 |
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122 //----------------------------- |
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123 // Neighbour cell sync. reading |
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124 //----------------------------- |
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125 #if (L1_12NEIGH) |
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126 #define NBR_NEIGHBOURS 12 |
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127 #else |
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128 #define NBR_NEIGHBOURS 6 |
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129 #endif |
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130 |
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131 //----------------------------- |
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132 // LAYER 1 MEASUREMENT TASKS... |
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133 //----------------------------- |
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134 #define NBR_L1S_MEAS_TASKS 4 |
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135 |
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136 #define FSMS 0 |
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137 #define I_BAMS 1 |
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138 #define D_BAMS 2 |
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139 #define SERVMS 3 |
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140 |
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141 #define FSMS_MEAS (TRUE_L << FSMS) // Measurement task on FULL list (Cell Selection/Idle). |
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142 #define I_BAMS_MEAS (TRUE_L << I_BAMS) // Measurement task on BA list in Idle. |
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143 #define D_BAMS_MEAS (TRUE_L << D_BAMS) // Measurement task on BA list in Dedicated. |
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144 #define SERVMS_MEAS (TRUE_L << SERVMS) // Measurement task for Serving. |
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145 |
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146 #define FSMS_MEAS_MASK ALL_TASK ^ FSMS_MEAS |
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147 #define I_BAMS_MEAS_MASK ALL_TASK ^ I_BAMS_MEAS |
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148 #define D_BAMS_MEAS_MASK ALL_TASK ^ D_BAMS_MEAS |
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149 #define SERVMS_MEAS_MASK ALL_TASK ^ SERVMS_MEAS |
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150 |
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151 #define A_D_BLEN 456 // SACCH/SDCCH data block length (GSM 5.01 $7) |
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152 #define TCH_FS_BLEN 378 // TCH FULL SPEECH block length |
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153 #define TCH_HS_BLEN 211 // TCH HALF SPEECH block length |
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154 #define TCH_F_D_BLEN 456 // FACCH, TCH_DATA block length |
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155 |
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156 // Define max PM/TDMA according to DSP code and TPU RAM size |
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157 //---------------------------------------------------------- |
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158 |
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159 // NOTE: we should use a global variable initialized at L1 start and function of rx synth setup time. |
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160 |
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161 #if ((CHIPSET == 2) || (CHIPSET == 3) || (CHIPSET == 4)) |
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162 |
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163 // TPU RAM size limitation |
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164 |
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165 #define NB_MEAS_MAX 4 |
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166 #define NB_MEAS_MAX_GPRS 4 |
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167 |
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168 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
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169 |
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170 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
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171 |
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172 // DSP code 33: upto 8 PMs with GSM and GPRS scheduler |
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173 |
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174 #define NB_MEAS_MAX 8 |
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175 #define NB_MEAS_MAX_GPRS 8 |
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176 |
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177 #elif (DSP == 32) |
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178 |
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179 // DSP code prior to code 33 support upto 4 PMs with GSM scheduler |
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180 // and 8 PMs with GPRS scheduler, 6 for DSP 32 because of CPU load |
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181 |
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182 #define NB_MEAS_MAX 4 |
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183 #define NB_MEAS_MAX_GPRS 6 |
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184 |
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185 #else |
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186 |
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187 |
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188 // DSP code prior to code 33 support upto 4 PMs with GSM scheduler |
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189 // and 8 PMs with GPRS scheduler |
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190 |
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191 #define NB_MEAS_MAX 4 |
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192 #define NB_MEAS_MAX_GPRS 8 |
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193 |
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194 #endif |
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195 #endif |
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196 #if (AMR == 1) |
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197 #define SID_UPDATE_BLEN 212 // SID UPDATE block length |
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198 #define RATSCCH_BLEN 212 // RATSCCH block length |
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199 #define TCH_AFS_BLEN 448 // TCH Adaptative Full rate Speech block length |
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200 // Note: the d_nerr value is calculated thanks to the bit class 1 of the block. |
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201 // But the number AHS bit class 1 depends on the type of vocoder currently used (c.f. 5.03 &3.10.7.2) |
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202 #define TCH_AHS_7_95_BLEN 188 // TCH AHS 7.95 Speech block length |
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203 #define TCH_AHS_7_4_BLEN 196 // TCH AHS 7.4 Speech block length |
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204 #define TCH_AHS_6_7_BLEN 200 // TCH AHS 6.7 Speech block length |
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205 #define TCH_AHS_5_9_BLEN 208 // TCH AHS 5.9 Speech block length |
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206 #define TCH_AHS_5_15_BLEN 212 // TCH AHS 5.15 Speech block length |
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207 #define TCH_AHS_4_75_BLEN 212 // TCH AHS 4.75 Speech block length |
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208 #endif |
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209 //---------------------------------------- |
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210 // LAYER 1 Asynchronous processes names... |
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211 //---------------------------------------- |
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212 #if (TESTMODE) && !(L1_GPRS) |
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213 #if (AUDIO_TASK == 1) |
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214 #if (L1_GTT) |
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215 #if (OP_L1_STANDALONE == 1) |
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216 #define NBR_L1A_PROCESSES 45 |
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217 #else |
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218 #define NBR_L1A_PROCESSES 44 |
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219 #endif |
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220 #else |
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221 #if (OP_L1_STANDALONE == 1) |
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222 #define NBR_L1A_PROCESSES 44 |
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223 #else |
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224 #define NBR_L1A_PROCESSES 43 |
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225 #endif |
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226 #endif |
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227 #else |
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228 #if (L1_GTT) |
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229 #if (OP_L1_STANDALONE == 1) |
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230 #define NBR_L1A_PROCESSES 27 |
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231 #else |
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232 #define NBR_L1A_PROCESSES 26 |
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233 #endif |
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234 #else |
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235 #if (OP_L1_STANDALONE == 1) |
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236 #define NBR_L1A_PROCESSES 26 |
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237 #else |
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238 #define NBR_L1A_PROCESSES 25 |
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239 #endif |
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240 #endif |
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241 #endif |
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242 #endif |
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243 |
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244 #if (TESTMODE) && (L1_GPRS) |
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245 #if (AUDIO_TASK == 1) |
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246 #if (L1_GTT) |
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247 #if (OP_L1_STANDALONE == 1) |
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248 #define NBR_L1A_PROCESSES 46 |
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249 #else |
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250 #define NBR_L1A_PROCESSES 45 |
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251 #endif |
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252 #else |
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253 #if (OP_L1_STANDALONE == 1) |
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254 #define NBR_L1A_PROCESSES 45 |
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255 #else |
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256 #define NBR_L1A_PROCESSES 44 |
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257 #endif |
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258 #endif |
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259 #else |
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260 #if (L1_GTT) |
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261 #if (OP_L1_STANDALONE == 1) |
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262 #define NBR_L1A_PROCESSES 28 |
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263 #else |
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264 #define NBR_L1A_PROCESSES 27 |
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265 #endif |
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266 #else |
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267 #if (OP_L1_STANDALONE == 1) |
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268 #define NBR_L1A_PROCESSES 27 |
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269 #else |
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270 #define NBR_L1A_PROCESSES 26 |
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271 #endif |
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272 #endif |
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273 #endif |
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274 #endif |
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275 |
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276 #if !(TESTMODE) |
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277 #if (AUDIO_TASK == 1) |
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278 #if (L1_GTT) |
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279 #if (OP_L1_STANDALONE == 1) |
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280 #define NBR_L1A_PROCESSES 37 |
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281 #else |
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282 #define NBR_L1A_PROCESSES 36 |
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283 #endif |
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284 #else |
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285 #if (OP_L1_STANDALONE == 1) |
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286 #define NBR_L1A_PROCESSES 36 |
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287 #else |
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288 #define NBR_L1A_PROCESSES 35 |
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289 #endif |
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290 #endif |
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291 #else |
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292 #if (L1_GTT) |
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293 #if (OP_L1_STANDALONE == 1) |
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294 #define NBR_L1A_PROCESSES 19 |
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295 #else |
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296 #define NBR_L1A_PROCESSES 18 |
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297 #endif |
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298 #else |
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299 #if (OP_L1_STANDALONE == 1) |
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300 #define NBR_L1A_PROCESSES 18 |
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301 #else |
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302 #define NBR_L1A_PROCESSES 17 |
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303 #endif |
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304 #endif |
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305 #endif |
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306 #endif |
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307 |
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308 |
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309 #define FULL_MEAS 0 // l1a_full_list_meas_process(msg) |
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310 #define CS_NORM 1 // l1a_cs_bcch_process(msg) |
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311 #define I_6MP 2 // l1a_idle_6strongest_monitoring_process(msg) |
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312 #define I_SCP 3 // l1a_idle_serving_cell_paging_process(msg) |
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313 #define I_SCB 4 // l1a_idle_serving_cell_bcch_reading_process(msg) |
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314 #define I_SMSCB 5 // l1a_idle_smscb_process(msg) |
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315 #define CR_B 6 // l1a_cres_process(msg) |
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316 #define ACCESS 7 // l1a_access_process(msg) |
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317 #define DEDICATED 8 // l1a_dedicated_process(msg) |
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318 #define I_FULL_MEAS 9 // l1a_dedicated_process(msg) |
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319 #define I_NMEAS 10 // l1a_idle_ba_meas_process(msg) |
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320 #define DEDIC_6 11 // l1a_dedic6_process(msg) |
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321 #define D_NMEAS 12 // l1a_dedic_ba_list_meas_process(msg) |
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322 #define HW_TEST 13 // l1a_test_process(msg) |
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323 #define I_BCCHN 14 // l1a_idle_neighbour_cell_bcch_reading_process(msg) |
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324 #define I_ADC 15 // l1a_mmi_adc_req(msg) |
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325 |
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326 #if (TESTMODE) && !(L1_GPRS) |
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327 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg) |
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328 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg) |
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329 #define TMODE_SB 18 // l1a_tmode_sb_process(msg) |
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330 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg) |
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331 #define TMODE_RA 20 // l1a_tmode_access_process(msg) |
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332 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg) |
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333 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg) |
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334 #define TMODE_PM 23 // l1a_tmode_meas_process(msg) |
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335 #if (AUDIO_TASK == 1) |
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336 #define L1A_KEYBEEP_STATE 24 // l1a_mmi_keybeep_process(msg) |
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337 #define L1A_TONE_STATE 25 // l1a_mmi_tone_process(msg) |
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338 #define L1A_MELODY0_STATE 26 // l1a_mmi_melody0_process(msg) |
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339 #define L1A_MELODY1_STATE 27 // l1a_mmi_melody1_process(msg) |
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340 #define L1A_VM_PLAY_STATE 28 // l1a_mmi_vm_playing_process(msg) |
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341 #define L1A_VM_RECORD_STATE 29 // l1a_mmi_vm_recording_process(msg) |
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342 #define L1A_SR_ENROLL_STATE 30 // l1a_mmi_sr_enroll_process(msg) |
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343 #define L1A_SR_UPDATE_STATE 31 // l1a_mmi_sr_update_process(msg) |
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344 #define L1A_SR_RECO_STATE 32 // l1a_mmi_sr_reco_process(msg) |
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345 #define L1A_SR_UPDATE_CHECK_STATE 33 // l1a_mmi_sr_update_check_process(msg) |
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346 #define L1A_AEC_STATE 34 // l1a_mmi_aec_process(msg) |
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347 #define L1A_FIR_STATE 35 // l1a_mmi_fir_process(msg) |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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348 #define L1A_AUDIO_MODE_STATE 36 // l1a_mmi_audio_mode_process(msg) |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
349 #define L1A_MELODY0_E2_STATE 37 // l1a_mmi_melody0_e2_process(msg) |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
350 #define L1A_MELODY1_E2_STATE 38 // l1a_mmi_melody1_e2_process(msg) |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
351 #define L1A_VM_AMR_PLAY_STATE 39 // l1a_mmi_vm_amr_playing_process(msg) |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
352 #define L1A_VM_AMR_RECORD_STATE 40 // l1a_mmi_vm_amr_recording_process(msg) |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
353 #define L1A_CPORT_STATE 41 // l1a_mmi_cport_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
354 #if (L1_GTT == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
355 #define L1A_GTT_STATE 42 // l1a_mmi_gtt_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
356 #define INIT_L1 43 // l1a_init_layer1_process(msg) |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
357 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
358 #define HSW_CONF 44 // l1a_test_config_process(msg) |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
359 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
360 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
361 #define INIT_L1 42 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
362 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
363 #define HSW_CONF 43 // l1a_test_config_process(msg) |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
364 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
365 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
366 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
367 #if (L1_GTT == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
368 #define L1A_GTT_STATE 24 // l1a_mmi_gtt_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
369 #define INIT_L1 25 // l1a_init_layer1_process(msg) |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
370 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
371 #define HSW_CONF 26 // l1a_test_config_process(msg) |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
372 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
373 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
374 #define INIT_L1 24 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
375 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
376 #define HSW_CONF 25 // l1a_test_config_process(msg) |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
377 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
378 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
379 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
380 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
381 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
382 #if (TESTMODE) && (L1_GPRS) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
383 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
384 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
385 #define TMODE_SB 18 // l1a_tmode_sb_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
386 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
387 #define TMODE_RA 20 // l1a_tmode_access_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
388 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
389 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
390 #define TMODE_PM 23 // l1a_tmode_meas_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
391 #define TMODE_TRANSFER 24 // l1a_tmode_transfer_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
392 #if (AUDIO_TASK == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
393 #define L1A_KEYBEEP_STATE 25 // l1a_mmi_keybeep_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
394 #define L1A_TONE_STATE 26 // l1a_mmi_tone_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
395 #define L1A_MELODY0_STATE 27 // l1a_mmi_melody0_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
396 #define L1A_MELODY1_STATE 28 // l1a_mmi_melody1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
397 #define L1A_VM_PLAY_STATE 29 // l1a_mmi_vm_playing_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
398 #define L1A_VM_RECORD_STATE 30 // l1a_mmi_vm_recording_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
399 #define L1A_SR_ENROLL_STATE 31 // l1a_mmi_sr_enroll_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
400 #define L1A_SR_UPDATE_STATE 32 // l1a_mmi_sr_update_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
401 #define L1A_SR_RECO_STATE 33 // l1a_mmi_sr_reco_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
402 #define L1A_SR_UPDATE_CHECK_STATE 34 // l1a_mmi_sr_update_check_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
403 #define L1A_AEC_STATE 35 // l1a_mmi_aec_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
404 #define L1A_FIR_STATE 36 // l1a_mmi_fir_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
405 #define L1A_AUDIO_MODE_STATE 37 // l1a_mmi_audio_mode_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
406 #define L1A_MELODY0_E2_STATE 38 // l1a_mmi_melody0_e2_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
407 #define L1A_MELODY1_E2_STATE 39 // l1a_mmi_melody1_e2_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
408 #define L1A_VM_AMR_PLAY_STATE 40 // l1a_mmi_vm_amr_playing_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
409 #define L1A_VM_AMR_RECORD_STATE 41 // l1a_mmi_vm_amr_recording_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
410 #define L1A_CPORT_STATE 42 // l1a_mmi_cport_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
411 #if (L1_GTT == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
412 #define L1A_GTT_STATE 43 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
413 #define INIT_L1 44 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
414 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
415 #define HSW_CONF 45 // l1a_test_config_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
416 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
417 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
418 #define INIT_L1 43 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
419 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
420 #define HSW_CONF 44 // l1a_test_config_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
421 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
422 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
423 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
424 #if (L1_GTT == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
425 #define L1A_GTT_STATE 25 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
426 #define INIT_L1 26 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
427 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
428 #define HSW_CONF 27 // l1a_test_config_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
429 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
430 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
431 #define INIT_L1 25 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
432 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
433 #define HSW_CONF 26 // l1a_test_config_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
434 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
435 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
436 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
437 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
438 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
439 #if !(TESTMODE) && (AUDIO_TASK == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
440 #define L1A_KEYBEEP_STATE 16 // l1a_mmi_keybeep_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
441 #define L1A_TONE_STATE 17 // l1a_mmi_tone_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
442 #define L1A_MELODY0_STATE 18 // l1a_mmi_melody0_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
443 #define L1A_MELODY1_STATE 19 // l1a_mmi_melody1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
444 #define L1A_VM_PLAY_STATE 20 // l1a_mmi_vm_playing_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
445 #define L1A_VM_RECORD_STATE 21 // l1a_mmi_vm_recording_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
446 #define L1A_SR_ENROLL_STATE 22 // l1a_mmi_sr_enroll_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
447 #define L1A_SR_UPDATE_STATE 23 // l1a_mmi_sr_update_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
448 #define L1A_SR_RECO_STATE 24 // l1a_mmi_sr_reco_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
449 #define L1A_SR_UPDATE_CHECK_STATE 25 // l1a_mmi_sr_update_check_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
450 #define L1A_AEC_STATE 26 // l1a_mmi_aec_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
451 #define L1A_FIR_STATE 27 // l1a_mmi_fir_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
452 #define L1A_AUDIO_MODE_STATE 28 // l1a_mmi_audio_mode_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
453 #define L1A_MELODY0_E2_STATE 29 // l1a_mmi_melody0_e2_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
454 #define L1A_MELODY1_E2_STATE 30 // l1a_mmi_melody1_e2_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
455 #define L1A_VM_AMR_PLAY_STATE 31 // l1a_mmi_vm_amr_playing_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
456 #define L1A_VM_AMR_RECORD_STATE 32 // l1a_mmi_vm_amr_recording_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
457 #define L1A_CPORT_STATE 33 // l1a_mmi_cport_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
458 #if (L1_GTT == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
459 #define L1A_GTT_STATE 34 // l1a_mmi_tty_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
460 #define INIT_L1 35 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
461 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
462 #define HSW_CONF 36 // l1a_test_config_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
463 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
464 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
465 #define INIT_L1 34 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
466 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
467 #define HSW_CONF 35 // l1a_test_config_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
468 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
469 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
470 #elif !(TESTMODE) && !(AUDIO_TASK == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
471 #if (L1_GTT == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
472 #define L1A_GTT_STATE 16 // l1a_mmi_tty_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
473 #define INIT_L1 17 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
474 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
475 #define HSW_CONF 18 // l1a_test_config_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
476 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
477 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
478 #define INIT_L1 16 // l1a_init_layer1_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
479 #if (OP_L1_STANDALONE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
480 #define HSW_CONF 17 // l1a_test_config_process(msg) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
481 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
482 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
483 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
484 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
485 #if TESTMODE |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
486 #define TMODE_UPLINK (1<<0) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
487 #define TMODE_DOWNLINK (1<<1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
488 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
489 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
490 //------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
491 // LAYER 1 DOWNLINK & UPLINK TASKS... |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
492 //------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
493 #define TASK_DISABLED 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
494 #define TASK_ENABLED 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
495 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
496 #define SEMAPHORE_RESET 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
497 #define SEMAPHORE_SET 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
498 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
499 #define NO_NEW_TASK -1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
500 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
501 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
502 // Tasks in the order of their priority (low to high). |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
503 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
504 #if !L1_GPRS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
505 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
506 #define NBR_DL_L1S_TASKS 32 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
507 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
508 //GSM_TASKS/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
509 #define HWTEST 0 // DSP checksum reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
510 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
511 #define DEDIC 2 // Global Dedicated mode switch |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
512 #define RAACC 3 // Channel access (ul) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
513 #define RAHO 4 // Handover access (ul) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
514 #define NSYNC 5 // Global Neighbour cell synchro switch |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
515 #define FBNEW 6 // Frequency burst search (Idle mode) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
516 #define SBCONF 7 // Synchro. burst confirmation |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
517 #define SB2 8 // Synchro. burst read (1 frame uncertainty / SB position) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
518 #define FB26 9 // Frequency burst search, dedic/transfer mode MF26 or MF52 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
519 #define SB26 10 // Synchro burst search, dedic/transfer mode MF26 or MF52 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
520 #define SBCNF26 11 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
521 #define FB51 12 // Frequency burst search, dedic mode MF51 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
522 #define SB51 13 // Synchro burst search, dedic MF51 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
523 #define SBCNF51 14 // Synchro burst confirmation, dedic MF51 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
524 #define BCCHN 15 // BCCH Neighbor in GSM Idle |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
525 #define ALLC 16 // All CCCH Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
526 #define EBCCHS 17 // Extended BCCH Serving Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
527 #define NBCCHS 18 // Normal BCCH ServingReading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
528 #define SMSCB 19 // CBCH serving Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
529 #define NP 20 // Normal paging Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
530 #define EP 21 // Extended pagingReading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
531 #define ADL 22 // SACCH(SDCCH) DL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
532 #define AUL 23 // SACCH(SDCCH) UL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
533 #define DDL 24 // SDCCH DL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
534 #define DUL 25 // SDCCH UL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
535 #define TCHD 26 // Dummy for TCH Half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
536 #define TCHA 27 // SACCH(TCH) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
537 #define TCHTF 28 // TCH Full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
538 #define TCHTH 29 // TCH Half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
539 #define BCCHN_TOP 30 // BCCH Neighbour TOP priority in Idle mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
540 #define SYNCHRO 31 // synchro task: L1S reset |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
541 //END_GSM_TASKS/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
542 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
543 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
544 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
545 #define NBR_DL_L1S_TASKS 45 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
546 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
547 //GPRS_TASKS/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
548 #define HWTEST 0 // DSP checksum reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
549 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
550 #define DEDIC 2 // Global Dedicated mode switch |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
551 #define RAACC 3 // Channel access (ul) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
552 #define RAHO 4 // Handover access (ul) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
553 #define NSYNC 5 // Global Neighbour cell synchro switch |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
554 #define POLL 6 // Packet Polling (Access) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
555 #define PRACH 7 // Packet Random Access Channel |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
556 #define ITMEAS 8 // Interference measurements |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
557 #define FBNEW 9 // Frequency burst search (Idle mode) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
558 #define SBCONF 10 // Synchro. burst confirmation |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
559 #define SB2 11 // Synchro. burst read (1 frame uncertainty / SB position) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
560 #define PTCCH 12 // Packet Timing Advance control channel |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
561 #define FB26 13 // Frequency burst search, dedic/transfer mode MF26 or MF52 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
562 #define SB26 14 // Synchro burst search, dedic/transfer mode MF26 or MF52 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
563 #define SBCNF26 15 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
564 #define FB51 16 // Frequency burst search, dedic mode MF51 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
565 #define SB51 17 // Synchro burst search, dedic MF51 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
566 #define SBCNF51 18 // Synchro burst confirmation, dedic MF51 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
567 #define PDTCH 19 // Packet Data channel |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
568 #define BCCHN 20 // BCCH Neighbor in GSM Idle |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
569 #define ALLC 21 // All CCCH Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
570 #define EBCCHS 22 // Extended BCCH Serving Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
571 #define NBCCHS 23 // Normal BCCH Serving Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
572 #define ADL 24 // SACCH(SDCCH) DL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
573 #define AUL 25 // SACCH(SDCCH) UL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
574 #define DDL 26 // SDCCH DL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
575 #define DUL 27 // SDCCH UL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
576 #define TCHD 28 // Dummy for TCH Half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
577 #define TCHA 29 // SACCH(TCH) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
578 #define TCHTF 30 // TCH Full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
579 #define TCHTH 31 // TCH Half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
580 #define PALLC 32 // All PCCCH reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
581 #define SMSCB 33 // CBCH serving Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
582 #define PBCCHS 34 // PBCCH serving reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
583 #define PNP 35 // Packet Normal paging Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
584 #define PEP 36 // Packet Extended paging Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
585 #define SINGLE 37 // Single Block for GPRS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
586 #define PBCCHN_TRAN 38 // Packet BCCH Neighbor in Packet Transfer mode. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
587 #define PBCCHN_IDLE 39 // Packet BCCH Neighbor in Idle mode. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
588 #define BCCHN_TRAN 40 // BCCH Neighbour in Packet Transfer mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
589 #define NP 41 // Normal paging Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
590 #define EP 42 // Extended paging Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
591 #define BCCHN_TOP 43 // BCCH Neighbour TOP priority in Idle mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
592 #define SYNCHRO 44 // synchro task: L1S reset |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
593 //END_GPRS_TASKS/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
594 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
595 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
596 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
597 //------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
598 // LAYER 1 API |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
599 //------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
600 #define MCSI_PORT1 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
601 #define MCSI_PORT2 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
602 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
603 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
604 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
605 // DSP vocoder Enable/ Disable |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
606 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
607 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
608 #if (L1M_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE ==1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
609 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
610 #define TCH_VOCODER_DISABLE_REQ 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
611 #define TCH_VOCODER_ENABLE_REQ 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
612 #define TCH_VOCODER_ENABLED 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
613 #define TCH_VOCODER_DISABLED 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
614 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
615 // Number of TDMA wait frames until the DSP output is steady |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
616 #define DSP_VOCODER_ON_TRANSITION 165 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
617 #endif // FF_L1_TCH_VOCODER_CONTROL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
618 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
619 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
620 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
621 // Handover Finished cause defines. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
622 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
623 #define HO_COMPLETE 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
624 #define HO_TIMEOUT 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
625 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
626 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
627 // FB detection algorithm defines. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
628 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
629 #define FB_MODE_0 0 // FB detec. mode 0. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
630 #define FB_MODE_1 1 // FB detec. mode 1. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
631 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
632 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
633 // AFC control defines. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
634 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
635 #define AFC_INIT 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
636 #define AFC_OPEN_LOOP 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
637 #define AFC_CLOSED_LOOP 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
638 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
639 // For VCXO algo. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
640 #if (VCXO_ALGO) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
641 #define AFC_INIT_CENTER 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
642 #define AFC_INIT_MAX 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
643 #define AFC_INIT_MIN 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
644 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
645 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
646 // TOA control defines. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
647 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
648 #define TOA_INIT 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
649 #define TOA_RUN 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
650 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
651 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
652 // Neighbour Synchro possible status. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
653 //--------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
654 #define NSYNC_FREE 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
655 #define NSYNC_PENDING 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
656 #define NSYNC_COMPLETED 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
657 #if (L1_12NEIGH ==1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
658 #define NSYNC_WAIT 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
659 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
660 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
661 /************************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
662 /* Layer 1 constants declaration... */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
663 /************************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
664 #define MAX_FN ((UWORD32)26*51*2048) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
665 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
666 #if L1_GPRS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
667 #define MAX_BLOCK_ID ((UWORD32) (3 * (UWORD32) (MAX_FN / 13))) // Block ID corresponding to fn = FN MAX |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
668 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
669 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
670 //-------------------------------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
671 // standard specific constants used in l1_config.std.xxx |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
672 //-------------------------------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
673 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
674 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
675 // GSM |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
676 #define FIRST_ARFCN_GSM 1 // 1st arfcn is 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
677 #define NBMAX_CARRIER_GSM 124 // 124 for GSM, 174 for E_GSM, 374 for DCS1800. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
678 #define MAX_TXPWR_GSM 19 // lowest power ctrl level value in GSM band |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
679 // GSM_E |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
680 #define FIRST_ARFCN_EGSM 1 // 1st arfcn is 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
681 #define NBMAX_CARRIER_EGSM 174 // 174 carriers for GSM_E. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
682 #define MAX_TXPWR_EGSM 19 // lowest power ctrl level value in GSM-E band |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
683 // PCS1900 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
684 #define FIRST_ARFCN_PCS 512 // 1st arfcn is 512 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
685 #define NBMAX_CARRIER_PCS 299 // 299 carriers for PCS1900. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
686 #define MAX_TXPWR_PCS 15 // lowest power ctrl level value in PCS band |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
687 #define TXPWR_TURNING_POINT_PCS 21 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
688 // DCS1800 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
689 #define FIRST_ARFCN_DCS 512 // 1st arfcn is 512 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
690 #define NBMAX_CARRIER_DCS 374 // 374 carriers for DCS1800. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
691 #define MAX_TXPWR_DCS 15 // lowest power ctrl level value in DCS band |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
692 #define TXPWR_TURNING_POINT_DCS 28 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
693 // GSM850 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
694 #define FIRST_ARFCN_GSM850 128 // 1st arfcn is 128 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
695 #define NBMAX_CARRIER_GSM850 124 // 124 carriers for GSM850 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
696 #define NBMEAS_GSM850 3 // 3 measurement per frame TBD |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
697 #define MAX_TXPWR_GSM850 19 // lowest power ctrl level value in GSM band |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
698 // DUAL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
699 #define FIRST_DCS_INDEX_DUAL 125 // 1st DCS index within the 498 continu list |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
700 #define NBMAX_CARRIER_DUAL 124+374 // 374 carriers for DCS1800 + 124 carriers for GSM900 Band |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
701 #define TXPWR_TURNING_POINT_DUAL 28 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
702 // DUALEXT |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
703 #define FIRST_DCS_INDEX_DUALEXT 175 // 1st DCS index within the 548 continu list |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
704 #define NBMAX_CARRIER_DUALEXT 174+374 // 374 carriers for DCS1800 + 174 carriers for E-GSM900 Band |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
705 #define TXPWR_TURNING_POINT_DUALEXT 28 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
706 // DUAL_US |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
707 #define FIRST_ARFCN_GSM850_DUAL_US 1 // 1st GSM850 index within the 423 continu list |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
708 #define FIRST_PCS_INDEX_DUAL_US 125 // 1st PCS index within the 423 continu list |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
709 #define NBMAX_CARRIER_DUAL_US 124+299 // 299 carriers for PCS1900 + 124 carriers for GSM850\ Band |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
710 #define NBMEAS_DUAL_US 4 // 4 measurements per frames. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
711 #define TXPWR_TURNING_POINT_DUAL_US 28 // TBD |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
712 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
713 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
714 #define NBMAX_CARRIER NBMAX_CARRIER_DUALEXT //used in arrays for power measurement |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
715 //non optimized!!! (dynamic memory allocation to optimize) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
716 #define BAND1 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
717 #define BAND2 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
718 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
719 #define NO_TXPWR 255 // sentinal value used with UWORD8 type. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
720 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
721 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
722 //-------------------------------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
723 // Receive level values. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
724 //-------------------------------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
725 #define RXLEV63 63 // max value for RXLEV. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
726 #define IL_MIN 240 // minimum input level is -120 dbm. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
727 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
728 //-------------------------------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
729 // Max number of cell to report in MPHC_RXLEV_IND. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
730 // Nb cells to check to see if cell of MPHC_NETWORK_SYNC_REQ has been detected |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
731 //-------------------------------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
732 #define MAX_MEAS_RXLEV_IND_TRACE 10 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
733 #define NB_FQ_TO_CHK 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
734 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
735 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
736 /* Max value for GSM Paging Parameters. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
737 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
738 #define MAX_AG_BLKS_RES_NCOMB 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
739 #define MAX_AG_BLKS_RES_COMB 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
740 #define MAX_PG_BLOC_INDEX_NCOMB 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
741 #define MAX_PG_BLOC_INDEX_COMB 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
742 #define MAX_BS_PA_MFRMS 9 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
743 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
744 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
745 /* Position of different blocs in a MF51. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
746 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
747 #define NBCCH_POSITION 2 // Normal BCCH position in a MF51. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
748 #define EBCCH_POSITION 6 // Extended BCCH position in a MF51. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
749 #define CCCH_0 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
750 #define CCCH_1 12 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
751 #define CCCH_2 16 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
752 #define CCCH_3 22 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
753 #define CCCH_4 26 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
754 #define CCCH_5 32 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
755 #define CCCH_6 36 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
756 #define CCCH_7 42 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
757 #define CCCH_8 46 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
758 #define FB_0 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
759 #define FB_1 10 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
760 #define FB_2 20 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
761 #define FB_3 30 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
762 #define FB_4 40 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
763 #define SB_0 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
764 #define SB_1 11 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
765 #define SB_2 21 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
766 #define SB_3 31 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
767 #define SB_4 41 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
768 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
769 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
770 /* System information position in the "si_bit_map". */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
771 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
772 #define SI_1 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
773 #define SI_2 0x0002 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
774 #define SI_2BIS 0x0100 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
775 #define SI_2TER 0x0200 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
776 #define SI_3 0x0004 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
777 #define SI_4 0x0008 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
778 #define SI_7 0x0040 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
779 #define SI_8 0x0080 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
780 #define ALL_SI SI_1 | SI_2 | SI_2BIS | SI_2TER | SI_3 | SI_4 | SI_7 | SI_8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
781 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
782 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
783 /* CBCH position in the "smscb_bit_map". */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
784 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
785 #define CBCH_TB1 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
786 #define CBCH_TB2 0x0002 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
787 #define CBCH_TB3 0x0004 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
788 #define CBCH_TB5 0x0008 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
789 #define CBCH_TB6 0x0010 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
790 #define CBCH_TB7 0x0020 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
791 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
792 #define CBCH_CONTINUOUS_READING 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
793 #define CBCH_SCHEDULED 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
794 #define CBCH_INACTIVE 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
795 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
796 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
797 /* Channel type definitions for DEDICATED mode. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
798 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
799 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
800 //TABLE/ CHAN TYPE |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
801 #define INVALID_CHANNEL 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
802 #define TCH_F 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
803 #define TCH_H 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
804 #define SDCCH_4 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
805 #define SDCCH_8 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
806 //END_TABLE/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
807 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
808 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
809 /* Channel mode definitions for DEDICATED. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
810 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
811 #define SIG_ONLY_MODE 0 // signalling only |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
812 #define TCH_FS_MODE 1 // speech full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
813 #define TCH_HS_MODE 2 // speech half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
814 #define TCH_96_MODE 3 // data 9,6 kb/s |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
815 #define TCH_48F_MODE 4 // data 4,8 kb/s full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
816 #define TCH_48H_MODE 5 // data 4,8 kb/s half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
817 #define TCH_24F_MODE 6 // data 2,4 kb/s full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
818 #define TCH_24H_MODE 7 // data 2,4 kb/s half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
819 #define TCH_EFR_MODE 8 // enhanced full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
820 #define TCH_144_MODE 9 // data 14,4 kb/s half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
821 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
822 #define TCH_AHS_MODE 10 // adaptative speech half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
823 #define TCH_AFS_MODE 11 // adaptative speech full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
824 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
825 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
826 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
827 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
828 /* Layer 1 functional modes for "mode" setting pupose. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
829 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
830 #define CS_MODE0 0 // functional mode at reset. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
831 #define CS_MODE 1 // functional mode in CELL SELECTION. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
832 #define I_MODE 2 // functional mode in IDLE. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
833 #define CON_EST_MODE1 3 // functional mode in ACCESS (before 1st RA, for TOA convergency). |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
834 #define CON_EST_MODE2 4 // functional mode in ACCESS (after 1st RA). |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
835 #define DEDIC_MODE 5 // functional mode in DEDICATED. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
836 #define DEDIC_MODE_HALF_DATA 6 // used only for TOA histogram length purpose. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
837 #if L1_GPRS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
838 #define PACKET_TRANSFER_MODE 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
839 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
840 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
841 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
842 /* Error causes for MPHC_NO_BCCH message. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
843 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
844 #define NO_FB_SB 0 // FB or SB not found. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
845 #define NCC_NOT_PERMITTED 1 // Synchro OK! but PLMN not permitted. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
846 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
847 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
848 /* MFTAB constants and flags. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
849 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
850 #define L1_MAX_FCT 5 /* Max number of fctions in a frame */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
851 #define MFTAB_SIZE 20 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
852 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
853 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
854 /* Software register/flags */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
855 /* definitions. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
856 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
857 #define NO_CTRL (TRUE_L << 0) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
858 #define CTRL_MS (TRUE_L << 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
859 #define CTRL_TX (TRUE_L << 2) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
860 #define CTRL_RX (TRUE_L << 3) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
861 #define CTRL_ADC (TRUE_L << 4) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
862 #define CTRL_SYNC (TRUE_L << 5) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
863 #define CTRL_ABORT (TRUE_L << 6) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
864 #define CTRL_TEST (TRUE_L << 7) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
865 #define CTRL_SYCB (TRUE_L << 8) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
866 #define CTRL_FB_ABORT (TRUE_L << 9) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
867 #if L1_GPRS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
868 #define CTRL_PRACH (TRUE_L << 10) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
869 #define CTRL_SYSINGLE (TRUE_L << 11) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
870 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
871 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
872 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
873 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
874 /* MISC management */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
875 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
876 #define GSM_CTL 0 // DSP ctrl for a GSM task |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
877 #define MISC_CTL 1 // DSP ctrl for a MISC task |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
878 #define GSM_MISC_CTL 2 // DSP ctrl for a GSM and MISC tasks |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
879 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
880 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
881 /* TOA management */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
882 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
883 #define ISH_INVALID 128 // value used to disable the toa offset |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
884 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
885 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
886 /* AGC management */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
887 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
888 #define DPAGC_FIFO_LEN 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
889 #define DPAGC_MAX_FLAG 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
890 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
891 #define DPAGC_AMR_FIFO_LEN 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
892 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
893 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
894 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
895 /* ADC management */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
896 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
897 #define ADC_DISABLED 0x0000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
898 // Traffic part |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
899 #define ADC_MASK_RESET_TRAFFIC 0xFF00 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
900 #define ADC_NEXT_TRAFFIC_UL 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
901 #define ADC_EACH_TRAFFIC_UL 0x0002 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
902 #define ADC_NEXT_TRAFFIC_DL 0x0004 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
903 #define ADC_EACH_TRAFFIC_DL 0x0008 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
904 #define ADC_EACH_RACH 0x0010 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
905 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
906 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
907 // Idle part |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
908 #define ADC_MASK_RESET_IDLE 0x00FF |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
909 #define ADC_NEXT_NORM_PAGING 0x0100 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
910 #define ADC_EACH_NORM_PAGING 0x0200 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
911 #define ADC_NEXT_MEAS_SESSION 0x0400 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
912 #define ADC_EACH_MEAS_SESSION 0x0800 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
913 #define ADC_NEXT_NORM_PAGING_REORG 0x1000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
914 #define ADC_EACH_NORM_PAGING_REORG 0x2000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
915 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
916 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
917 // CS_MODE0 part |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
918 #define ADC_NEXT_CS_MODE0 0x4000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
919 #define ADC_EACH_CS_MODE0 0x8000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
920 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
921 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
922 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
923 /* Neighbor BCCH priorities */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
924 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
925 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
926 #define TOP_PRIORITY 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
927 #define HIGH_PRIORITY 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
928 #define NORMAL_PRIORITY 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
929 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
930 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
931 /* Driver constants definitions */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
932 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
933 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
934 // Used to identify the 1st and last burst for offset management in Drivers. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
935 #define BURST_1 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
936 #define BURST_2 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
937 #define BURST_3 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
938 #define BURST_4 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
939 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
940 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
941 // Identifier for all DSP tasks. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
942 // ...RX & TX tasks identifiers. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
943 #define NO_DSP_TASK 0 // No task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
944 #define NP_DSP_TASK 21 // Normal Paging reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
945 #define EP_DSP_TASK 22 // Extended Paging reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
946 #define NBS_DSP_TASK 19 // Normal BCCH serving reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
947 #define EBS_DSP_TASK 20 // Extended BCCH serving reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
948 #define NBN_DSP_TASK 17 // Normal BCCH neighbour reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
949 #define EBN_DSP_TASK 18 // Extended BCCH neighbour reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
950 #define ALLC_DSP_TASK 24 // CCCH reading task while performing FULL BCCH/CCCH reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
951 #define CB_DSP_TASK 25 // CBCH reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
952 #define DDL_DSP_TASK 26 // SDCCH/D (data) reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
953 #define ADL_DSP_TASK 27 // SDCCH/A (SACCH) reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
954 #define DUL_DSP_TASK 12 // SDCCH/D (data) transmit task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
955 #define AUL_DSP_TASK 11 // SDCCH/A (SACCH) transmit task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
956 #define RACH_DSP_TASK 10 // RACH transmit task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
957 #define TCHT_DSP_TASK 13 // TCH Traffic data DSP task id (RX or TX) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
958 #define TCHA_DSP_TASK 14 // TCH SACCH data DSP task id (RX or TX) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
959 #define TCHD_DSP_TASK 28 // TCH Traffic data DSP task id (RX or TX) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
960 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
961 #define TCH_DTX_UL 15 // Replace UL task in DSP->MCU com. to say "burst not transmitted". |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
962 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
963 #if (L1_GPRS) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
964 // Identifier for DSP tasks Packet dedicated. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
965 // ...RX & TX tasks identifiers. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
966 //------------------------------------------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
967 // WARNING ... Need to aligned following macro with MCU/DSP GPRS Interface |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
968 //------------------------------------------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
969 #define PNP_DSP_TASK 30 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
970 #define PEP_DSP_TASK 31 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
971 #define PALLC_DSP_TASK 32 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
972 #define PBS_DSP_TASK 33 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
973 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
974 #define PTCCH_DSP_TASK 33 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
975 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
976 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
977 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
978 // Identifier for measurement, FB / SB search tasks. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
979 // Values 1,2,3 reserved for "number of measurements". |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
980 #define FB_DSP_TASK 5 // Freq. Burst reading task in Idle mode. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
981 #define SB_DSP_TASK 6 // Sync. Burst reading task in Idle mode. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
982 #define TCH_FB_DSP_TASK 8 // Freq. Burst reading task in Dedicated mode. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
983 #define TCH_SB_DSP_TASK 9 // Sync. Burst reading task in Dedicated mode. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
984 #define IDLE1 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
985 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
986 // Debug tasks |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
987 #define CHECKSUM_DSP_TASK 33 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
988 #define TST_NDB 35 // Checksum DSP->MCU |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
989 #define TST_DB 36 // DB communication check |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
990 #define INIT_VEGA 37 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
991 #define DSP_LOOP_C 38 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
992 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
993 // Identifier for measurement, FB / SB search tasks. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
994 // Values 1,2,3 reserved for "number of measurements". |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
995 #define TCH_LOOP_A 31 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
996 #define TCH_LOOP_B 32 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
997 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
998 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
999 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x08DB - 0x800))) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1000 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1001 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x09A0 - 0x800))) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1002 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1003 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1004 // bits in d_gsm_bgd_mgt - background task management |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1005 #define B_DSPBGD_RECO 1 // start of reco in dsp background |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1006 #define B_DSPBGD_UPD 2 // start of alignement update in dsp background |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1007 #define B_DSPBGD_STOP_RECO 256 // stop of reco in dsp background |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1008 #define B_DSPBGD_STOP_UPD 512 // stop of alignement update in dsp background |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1009 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1010 // bit in d_pll_config |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1011 #define B_32KHZ_CALIB (TRUE_L << 14) // force DSP in Idle1 during 32 khz calibration |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1012 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1013 // NDB AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1014 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1015 // bits in d_tch_mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1016 #define B_EOTD (TRUE_L << 0) // EOTD mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1017 #define B_PLAY_UL (TRUE_L << 3) // Play UL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1018 #define B_DCO_ON (TRUE_L << 4) // DCO ON/OFF |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1019 #define B_AUDIO_ASYNC (TRUE_L << 1) // WCP reserved |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1020 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1021 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1022 // PARAMETER AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1023 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1024 #define C_POND_RED 1L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1025 // below values are defined in the file l1_time.h |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1026 //#define D_NSUBB_IDLE 296L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1027 //#define D_NSUBB_DEDIC 30L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1028 #define D_FB_THR_DET_IACQ 0x3333L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1029 #define D_FB_THR_DET_TRACK 0x28f6L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1030 #define D_DC_OFF_THRES 0x7fffL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1031 #define D_DUMMY_THRES 17408L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1032 #define D_DEM_POND_GEWL 26624L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1033 #define D_DEM_POND_RED 20152L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1034 #define D_HOLE 0L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1035 #define D_TRANSFER_RATE 0x6666L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1036 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1037 // Full Rate vocoder definitions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1038 #define D_MACCTHRESH1 7872L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1039 #define D_MLDT -4L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1040 #define D_MACCTHRESH 7872L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1041 #define D_GU 5772L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1042 #define D_GO 7872L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1043 #define D_ATTMAX 53L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1044 #define D_SM -892L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1045 #define D_B 208L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1046 #define D_SD_MIN_THR_TCHFS 15L //(24L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1047 #define D_MA_MIN_THR_TCHFS 738L //(1200L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1048 #define D_MD_MAX_THR_TCHFS 1700L //(2000L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1049 #define D_MD1_MAX_THR_TCHFS 99L //(160L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1050 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1051 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1052 // Frequency burst definitions |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1053 #define D_FB_MARGIN_BEG 24 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1054 #define D_FB_MARGIN_END 22 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1055 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1056 // V42bis definitions |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1057 #define D_V42B_SWITCH_HYST 16L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1058 #define D_V42B_SWITCH_MIN 64L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1059 #define D_V42B_SWITCH_MAX 250L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1060 #define D_V42B_RESET_DELAY 10L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1061 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1062 // Latencies definitions |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1063 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1064 // C.f. BUG1404 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1065 #define D_LAT_MCU_BRIDGE 0x000FL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1066 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1067 #define D_LAT_MCU_BRIDGE 0x0009L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1068 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1069 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1070 #define D_LAT_MCU_HOM2SAM 0x000CL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1071 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1072 #define D_LAT_MCU_BEF_FAST_ACCESS 0x0005L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1073 #define D_LAT_DSP_AFTER_SAM 0x0004L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1074 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1075 // Background Task in GSM mode: Initialization. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1076 #define D_GSM_BGD_MGT 0L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1077 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1078 #if (CHIPSET == 4) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1079 #define D_MISC_CONFIG 0L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1080 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1081 #define D_MISC_CONFIG 1L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1082 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1083 #define D_MISC_CONFIG 0L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1084 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1085 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1086 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1087 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1088 // Hall Rate vocoder and ched definitions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1089 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1090 #define D_SD_MIN_THR_TCHHS 37L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1091 #define D_MA_MIN_THR_TCHHS 344L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1092 #define D_MD_MAX_THR_TCHHS 2175L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1093 #define D_MD1_MAX_THR_TCHHS 138L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1094 #define D_SD_AV_THR_TCHHS 1845L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1095 #define D_WED_FIL_TC 0x7c00L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1096 #define D_WED_FIL_INI 4650L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1097 #define D_X_MIN 15L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1098 #define D_X_MAX 23L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1099 #define D_Y_MIN 703L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1100 #define D_Y_MAX 2460L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1101 #define D_SLOPE 135L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1102 #define D_WED_DIFF_THRESHOLD 406L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1103 #define D_MABFI_MIN_THR_TCHHS 5320L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1104 #define D_LDT_HR -5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1105 #define D_MACCTRESH_HR 6500 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1106 #define D_MACCTRESH1_HR 6500 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1107 #define D_GU_HR 2620 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1108 #define D_GO_HR 3700 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1109 #define D_B_HR 182 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1110 #define D_SM_HR -1608 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1111 #define D_ATTMAX_HR 53 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1112 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1113 // Enhanced Full Rate vocoder and ched definitions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1114 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1115 #define C_MLDT_EFR -4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1116 #define C_MACCTHRESH_EFR 8000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1117 #define C_MACCTHRESH1_EFR 8000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1118 #define C_GU_EFR 4522 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1119 #define C_GO_EFR 6500 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1120 #define C_B_EFR 174 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1121 #define C_SM_EFR -878 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1122 #define C_ATTMAX_EFR 53 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1123 #define D_SD_MIN_THR_TCHEFS 15L //(24L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1124 #define D_MA_MIN_THR_TCHEFS 738L //(1200L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1125 #define D_MD_MAX_THR_TCHEFS 1230L //(2000L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1126 #define D_MD1_MAX_THR_TCHEFS 99L //(160L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1127 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1128 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1129 // Integrated Data Services definitions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1130 #define D_MAX_OVSPD_UL 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1131 // Detect frames containing 90% of 1s as synchro frames |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1132 #define D_SYNC_THRES 0x3f50 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1133 // IDLE frames are only frames with 100 % of 1s |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1134 #define D_IDLE_THRES 0x4000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1135 #define D_M1_THRES 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1136 #define D_MAX_OVSP_DL 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1137 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1138 // d_ra_act: bit field definition |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1139 #define B_F48BLK 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1140 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1141 // Mask for b_itc information (d_ra_conf) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1142 #define CE_MASK 0x04 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1143 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1144 #define D_FACCH_THR 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1145 #define D_DSP_TEST 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1146 #define D_VERSION_NUMBER 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1147 #define D_TI_VERSION 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1148 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1149 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1150 /*------------------------------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1151 /* */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1152 /* DEFINITIONS FOR DSP <-> MCU COMMUNICATION. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1153 /* ++++++++++++++++++++++++++++++++++++++++++ */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1154 /* */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1155 /*------------------------------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1156 // COMMUNICATION Interrupt definition |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1157 //------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1158 #define ALL_16BIT 0xffffL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1159 #define B_GSM_PAGE (TRUE_L << 0) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1160 #define B_GSM_TASK (TRUE_L << 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1161 #define B_MISC_PAGE (TRUE_L << 2) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1162 #define B_MISC_TASK (TRUE_L << 3) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1163 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1164 #define B_GSM_PAGE_MASK (ALL_16BIT ^ B_GSM_PAGE) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1165 #define B_GSM_TASK_MASK (ALL_16BIT ^ B_GSM_TASK) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1166 #define B_MISC_PAGE_MASK (ALL_16BIT ^ B_MISC_PAGE) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1167 #define B_MISC_TASK_MASK (ALL_16BIT ^ B_MISC_TASK) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1168 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1169 // Common definition |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1170 //---------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1171 // Index to *_DEMOD* arrays. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1172 #define D_TOA 0 // Time Of Arrival. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1173 #define D_PM 1 // Power Measurement. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1174 #define D_ANGLE 2 // Angle (AFC correction) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1175 #define D_SNR 3 // Signal / Noise Ratio. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1176 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1177 // Bit name/position definitions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1178 #define B_FIRE0 5 // Fire result bit 0. (00 -> NO ERROR) (01 -> ERROR CORRECTED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1179 #define B_FIRE1 6 // Fire result bit 1. (10 -> ERROR) (11 -> unused) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1180 #define B_SCH_CRC 8 // CRC result for SB decoding. (1 for ERROR). |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1181 #define B_BLUD 15 // Uplink,Downlink data block Present. (1 for PRESENT). |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1182 #define B_AF 14 // Activity bit: 1 if data block is valid. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1183 #define B_BFI 2 // Bad Frame Indicator |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1184 #define B_UFI 0 // UNRELIABLE FRAME Indicator |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1185 #define B_ECRC 9 // Enhanced full rate CRC bit |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1186 #define B_EMPTY_BLOCK 10 // for voice memo purpose, this bit is used to determine |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1187 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1188 #if (DEBUG_DEDIC_TCH_BLOCK_STAT == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1189 #define FACCH_GOOD 10 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1190 #define FACCH_BAD 11 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1191 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1192 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1193 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1194 // Place of the RX type in the AMR block header |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1195 #define RX_TYPE_SHIFT 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1196 #define RX_TYPE_MASK 0x0038 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1197 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1198 // Place of the vocoder type in the AMR block header |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1199 #define VOCODER_TYPE_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1200 #define VOCODER_TYPE_MASK 0x0007 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1201 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1202 // List of the possible RX types in a_dd block |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1203 #define SPEECH_GOOD 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1204 #define SPEECH_DEGRADED 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1205 #define ONSET 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1206 #define SPEECH_BAD 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1207 #define SID_FIRST 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1208 #define SID_UPDATE 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1209 #define SID_BAD 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1210 #define AMR_NO_DATA 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1211 #define AMR_INHIBIT 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1212 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1213 // List of possible RX types in RATSCCH block |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1214 #define C_RATSCCH_GOOD 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1215 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1216 // List of the possible AMR channel rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1217 #define AMR_CHANNEL_4_75 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1218 #define AMR_CHANNEL_5_15 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1219 #define AMR_CHANNEL_5_9 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1220 #define AMR_CHANNEL_6_7 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1221 #define AMR_CHANNEL_7_4 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1222 #define AMR_CHANNEL_7_95 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1223 #define AMR_CHANNEL_10_2 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1224 #define AMR_CHANNEL_12_2 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1225 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1226 // Types of RATSCCH blocks |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1227 #define C_RATSCCH_UNKNOWN 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1228 #define C_RATSCCH_CMI_PHASE_REQ 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1229 #define C_RATSCCH_AMR_CONFIG_REQ_MAIN 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1230 #define C_RATSCCH_AMR_CONFIG_REQ_ALT 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1231 #define C_RATSCCH_AMR_CONFIG_REQ_ALT_IGNORE 4 // Alternative AMR_CONFIG_REQ with updates coming in the next THRES_REQ block |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1232 #define C_RATSCCH_THRES_REQ 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1233 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1234 // These flags define a bitmap that indicates which AMR parameters are being modified by a RATSCCH |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1235 #define C_AMR_CHANGE_CMIP 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1236 #define C_AMR_CHANGE_ACS 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1237 #define C_AMR_CHANGE_ICM 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1238 #define C_AMR_CHANGE_THR1 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1239 #define C_AMR_CHANGE_THR2 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1240 #define C_AMR_CHANGE_THR3 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1241 #define C_AMR_CHANGE_HYST1 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1242 #define C_AMR_CHANGE_HYST2 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1243 #define C_AMR_CHANGE_HYST3 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1244 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1245 // CMIP default value |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1246 #define C_AMR_CMIP_DEFAULT 1 // According to ETSI specification 05.09, cmip is always 1 by default (new channel, handover...) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1247 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1248 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1249 // "d_ctrl_tch" bits positions for TCH configuration. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1250 #define B_CHAN_MODE 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1251 #define B_CHAN_TYPE 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1252 #define B_RESET_SACCH 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1253 #define B_VOCODER_ON 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1254 #define B_SYNC_TCH_UL 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1255 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1256 #define B_SYNC_AMR 9 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1257 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1258 #define B_SYNC_TCH_DL 9 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1259 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1260 #define B_STOP_TCH_UL 10 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1261 #define B_STOP_TCH_DL 11 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1262 #define B_TCH_LOOP 12 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1263 #define B_SUBCHANNEL 15 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1264 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1265 // "d_ctrl_abb" bits positions for conditionnal loading of abb registers. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1266 #define B_RAMP 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1267 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3)) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1268 #define B_BULRAMPDEL 3 // Note: this name is changed |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1269 #define B_BULRAMPDEL2 2 // Note: this name is changed |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1270 #define B_BULRAMPDEL_BIS 9 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1271 #define B_BULRAMPDEL2_BIS 10 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1272 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1273 #define B_AFC 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1274 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1275 // "d_ctrl_system" bits positions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1276 #define B_TSQ 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1277 #define B_BCCH_FREQ_IND 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1278 #define B_TASK_ABORT 15 // Abort RF tasks for DSP. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1279 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1280 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1281 // POLESTAR EVABOARD 3 REGISTERS & ADRESSES DEFINITIONS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1282 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1283 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1284 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1285 // DSP ADRESSES |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1286 //-------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1287 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1288 #define DB_SIZE (4*20L) // 4 pages of 20 words... |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1289 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1290 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1291 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1292 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1293 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1294 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1295 #define NDB_ADR 0xFFD001A8L // NDB start address : 268 words |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1296 #define PARAM_ADR 0xFFD00862L // PARAM start address : 57 words |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1297 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1298 #if (DSP_DEBUG_TRACE_ENABLE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1299 #define DB2_R_PAGE_0 0xFFD00184L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1300 #define DB2_R_PAGE_1 0xFFD00188L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1301 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1302 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1303 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1304 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1305 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1306 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1307 #define NDB_ADR 0xFFD000a0L // NDB start address : 268 words |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1308 #define PARAM_ADR 0xFFD002b8L // PARAM start address : 57 words |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1309 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1310 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1311 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1312 // ADC reading definitions |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1313 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1314 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1315 #define ADC_READ_PERIOD (40) //30 * 4.615 = 140ms |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1316 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1317 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1318 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1319 // AGC: IL table identifier used by function Cust_get_agc_from_IL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1320 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1321 #define MAX_ID 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1322 #define AV_ID 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1323 #define PWR_ID 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1324 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1325 #if TESTMODE |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1326 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1327 // Testmode: State of the continous mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1328 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1329 #define TM_NO_CONTINUOUS 1 // continuous mode isn't active |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1330 #define TM_START_RX_CONTINUOUS 2 // start the Rx continuous mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1331 #define TM_START_TX_CONTINUOUS 3 // start the Tx continuous mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1332 #define TM_CONTINUOUS 4 // Rx or Tx continuous mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1333 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1334 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1335 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1336 // AMR: Position of each AMR parameters in the AMR API buffer |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1337 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1338 #define NSCB_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1339 #define NSCB_SHIFT 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1340 #define ICMUL_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1341 #define ICMUL_SHIFT 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1342 #define ICMDL_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1343 #define ICMDL_SHIFT 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1344 #define ICMIUL_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1345 #define ICMIUL_SHIFT 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1346 #define ICMIDL_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1347 #define ICMIDL_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1348 #define ACSUL_INDEX 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1349 #define ACSUL_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1350 #define ACSDL_INDEX 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1351 #define ACSDL_SHIFT 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1352 #define THR1_INDEX 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1353 #define THR1_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1354 #define THR2_INDEX 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1355 #define THR2_SHIFT 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1356 #define THR3_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1357 #define THR3_SHIFT 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1358 #define HYST1_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1359 #define HYST1_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1360 #define HYST2_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1361 #define HYST2_SHIFT 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1362 #define HYST3_INDEX 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1363 #define HYST3_SHIFT 12 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1364 #define NSYNC_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1365 #define NSYNC_SHIFT 14 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1366 #define CMIP_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1367 #define CMIP_SHIFT 15 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1368 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1369 #define NSCB_MASK 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1370 #define ICM_MASK 0x0003 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1371 #define ICMI_MASK 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1372 #define ACS_MASK 0x00FF |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1373 #define THR_MASK 0x003F |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1374 #define HYST_MASK 0x000F |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1375 #define CMIP_MASK 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1376 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1377 |