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annotate gsm-fw/L1/cust0/Makefile @ 940:0fb9b7f2ef87

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gsm-fw/services/ffs/drv.c: Intel single bank flash driver hooked in
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Sat, 31 Oct 2015 23:39:41 +0000
parents fa119e49673b
children
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ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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1 CC= arm-elf-gcc
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a6ff7b513bcf gsm-fw/L1/cust0: use -I flags in the Makefile to make C code files less ugly
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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2 CPPFLAGS=-I../../include -I../include -I../audio_include -I../audio_cust0 \
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1affe428bf72 getting closer to compiling l1_cust.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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3 -I../tm_include -I../tm_cust0 -I../tpudrv
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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4 CFLAGS= -O2 -fno-builtin -mthumb-interwork
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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5 LD= arm-elf-ld
ed6071292a5c L1: first C module compiles: ind_os.c
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6
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452a4aea3fc5 gsm-fw: implemented reading of Pirelli's factory calibration records
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 543
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7 sinclude ../../include/config.mk
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8
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9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
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9 IOBJS= ind_os.o l1_cust_iram.o
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10 XOBJS= l1_cust_xip.o l1_rf12.o
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11
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parents: 543
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12 ifeq (${CONFIG_TARGET_PIRELLI},1)
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13 XOBJS+= pirelli.o
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14 endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
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16 all: iramcode.o xipcode.o
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
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9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
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18 l1_cust_iram.o: l1_cust.c
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
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19 ${CC} ${CFLAGS} ${CPPFLAGS} -DRUN_INT_RAM -c -o $@ $<
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ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
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parents: 528
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21 l1_cust_xip.o: l1_cust.c
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2dccd2b4e5a2 gsm-fw/L1/cust0/Makefile: forgot -mthumb for l1_cust_xip.o
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 542
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22 ${CC} ${CFLAGS} ${CPPFLAGS} -DRUN_FLASH -mthumb -c -o $@ $<
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9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
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parents: 528
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23
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fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
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24 ifeq (${CONFIG_TARGET_PIRELLI},1)
fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
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25 pirelli.o: pirelli.c
fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
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26 ${CC} ${CFLAGS} ${CPPFLAGS} -mthumb -c $<
fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
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27 endif
fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
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29 iramcode.o: ${IOBJS}
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
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30 ${LD} -r -o $@ ${IOBJS}
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31
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parents: 528
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32 xipcode.o: ${XOBJS}
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parents: 528
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33 ${LD} -r -o $@ ${XOBJS}
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ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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35 clean:
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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36 rm -f *.[oa] *.out *errs