FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/L1/include/l1_mftab.h @ 940:0fb9b7f2ef87
gsm-fw/services/ffs/drv.c: Intel single bank flash driver hooked in
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Sat, 31 Oct 2015 23:39:41 +0000 |
parents | 25a7fe25864c |
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rev | line source |
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1 /************* Revision Controle System Header ************* |
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2 * GSM Layer 1 software |
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3 * L1_MFTAB.H |
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4 * |
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5 * Filename l1_mftab.h |
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6 * Copyright 2003 (C) Texas Instruments |
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7 * |
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8 ************* Revision Controle System Header *************/ |
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9 |
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10 /*********************************************************** |
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11 * Content: |
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12 * This file contains the MultiFrame tables for all L1S |
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13 * basic tasks. |
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14 ***********************************************************/ |
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15 |
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16 /*******************************************************************************************/ |
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17 /* Multiframe Blocks for Dynamic MFTAB Building purpose. */ |
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18 /*******************************************************************************************/ |
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19 // Multiframe table size.... |
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20 |
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21 #ifndef L1_MFTAB_H |
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22 #define L1_MFTAB_H |
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23 |
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24 #define BLOC_FBNEW_SIZE 14 + 2 // FB. |
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25 |
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26 #define BLOC_SB2_SIZE 5 + 2 // SB2. |
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27 #if ((REL99 == 1) && (FF_BHO == 1)) |
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28 #define BLOC_FBSB_SIZE 12 + 2 + 2 + 2 // FB + SB + AGC |
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29 #endif |
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30 #define BLOC_SBCONF_SIZE 4 + 2 // SBCONF. |
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31 #define BLOC_BCCHN_SIZE 7 + 2 // BCCHN. |
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32 #define BLOC_BCCHN_TOP_SIZE 7 + 2 // BCCHN_TOP (BCCHN top priority) |
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33 |
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34 #define BLOC_SYNCHRO_SIZE 1 // SYNC. |
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35 #define BLOC_ADC_SIZE 1 // ADC in CS_MODE0 |
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36 #define BLOC_ABORT_SIZE 3 // ABORT. |
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37 #define BLOC_RAACC_SIZE 3 // RAACC. |
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38 #define S_RECT4_SIZE 6 // All "rectangular 4" serving tasks: NP/EP/BCCHS/ALLC. |
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39 #define BLOC_TCHT_SIZE 3 // TCHTF / TCHTH / TCHD. |
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40 #define BLOC_TCHA_SIZE 3 // TCHA. |
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41 #define BLOC_SMSCB_SIZE 6 // SMSCB. |
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42 #define BLOC_FB51_SIZE 14 // FB51. |
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43 #define BLOC_SB51_SIZE 4 // SB51. |
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44 #define BLOC_SBCNF51_SIZE 4 // SBCNF51. |
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45 #define BLOC_FB26_SIZE 4 // FB26. |
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46 #define BLOC_SB26_SIZE 5 // SB26. |
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47 #define BLOC_SBCNF26_SIZE 5 // SBCNF26. |
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48 #define BLOC_HWTEST_SIZE 4 // HWTEST. |
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49 #define BLOC_DUL_ADL_MIXED_SIZED 7 |
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50 #if (L1_GPRS) |
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51 #define BLOC_BCCHN_TRAN_SIZE 7 // BCCHN_TRAN. |
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52 #endif |
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53 |
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54 |
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55 |
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56 #ifdef L1_ASYNC_C |
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57 /*----------------------------------------------------*/ |
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58 /* TASK: Frequency Burst search... */ |
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59 /*----------------------------------------------------*/ |
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60 const T_FCT BLOC_FBNEW[] = |
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61 { |
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62 {l1s_ctrl_msagc,FBNEW,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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63 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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64 {l1s_read_msagc,FBNEW,NO_PAR},{l1s_ctrl_fb,FBNEW,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 3 |
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65 {NULL,NO_PAR,NO_PAR}, // frame 4 |
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66 {l1s_read_mon_result,FBNEW, 1},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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67 {l1s_read_mon_result,FBNEW, 2},{NULL,NO_PAR,NO_PAR}, // frame 6 |
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68 {l1s_read_mon_result,FBNEW, 3},{NULL,NO_PAR,NO_PAR}, // frame 7 |
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69 {l1s_read_mon_result,FBNEW, 4},{NULL,NO_PAR,NO_PAR}, // frame 8 |
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70 {l1s_read_mon_result,FBNEW, 5},{NULL,NO_PAR,NO_PAR}, // frame 9 |
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71 {l1s_read_mon_result,FBNEW, 6},{NULL,NO_PAR,NO_PAR}, // frame 10 |
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72 {l1s_read_mon_result,FBNEW, 7},{NULL,NO_PAR,NO_PAR}, // frame 11 |
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73 {l1s_read_mon_result,FBNEW, 8},{NULL,NO_PAR,NO_PAR}, // frame 12 |
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74 {l1s_read_mon_result,FBNEW, 9},{NULL,NO_PAR,NO_PAR}, // frame 13 |
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75 {l1s_read_mon_result,FBNEW,10},{NULL,NO_PAR,NO_PAR}, // frame 14 |
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76 {l1s_read_mon_result,FBNEW,11},{NULL,NO_PAR,NO_PAR}, // frame 15 |
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77 {l1s_read_mon_result,FBNEW,12},{NULL,NO_PAR,NO_PAR} // frame 16 |
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78 }; |
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79 |
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80 /*----------------------------------------------------*/ |
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81 /* TASK: SB2, New Synchro Burst search... */ |
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82 /*----------------------------------------------------*/ |
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83 /* C W R -> AGC */ |
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84 /* C W W R -> 1st SB */ |
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85 /* C W W R -> 2nd SB */ |
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86 /*----------------------------------------------------*/ |
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87 const T_FCT BLOC_SB2[] = |
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88 { |
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89 {l1s_ctrl_msagc,SB2,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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90 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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91 {l1s_read_msagc,SB2,NO_PAR}, {l1s_ctrl_sbgen,SB2,1}, {NULL,NO_PAR,NO_PAR}, // frame 3 |
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92 {l1s_ctrl_sbgen,SB2,2}, {NULL,NO_PAR,NO_PAR}, // frame 4 |
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93 {NULL,NO_PAR,NO_PAR}, // frame 5 |
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94 {l1s_read_mon_result,SB2,1}, {NULL,NO_PAR,NO_PAR}, // frame 6 |
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95 {l1s_read_mon_result,SB2,2}, {NULL,NO_PAR,NO_PAR} // frame 7 |
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96 }; |
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97 |
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98 /*----------------------------------------------------*/ |
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99 /* TASK: SBCONF, Synchro confirmation. */ |
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100 /*----------------------------------------------------*/ |
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101 /* C W R -> AGC */ |
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102 /* C W W R -> SBCONF */ |
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103 /*----------------------------------------------------*/ |
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104 const T_FCT BLOC_SBCONF[] = |
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105 { |
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106 {l1s_ctrl_msagc,SBCONF,1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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107 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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108 {l1s_read_msagc,SBCONF,1},{l1s_ctrl_sbgen,SBCONF,1}, {NULL,NO_PAR,NO_PAR}, // frame 3 |
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109 {NULL,NO_PAR,NO_PAR}, // frame 4 |
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110 {NULL,NO_PAR,NO_PAR}, // frame 5 |
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111 {l1s_read_mon_result,SBCONF,1},{NULL,NO_PAR,NO_PAR} // frame 6 |
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112 }; |
115
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113 |
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114 |
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115 #if ((REL99 == 1) && (FF_BHO == 1)) |
115
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116 /*----------------------------------------------------*/ |
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117 /* TASK: FBSB Frequency + Synchro Bursts Search... */ |
115
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118 /*----------------------------------------------------*/ |
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119 const T_FCT BLOC_FBSB[] = |
115
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120 { |
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121 {l1s_ctrl_msagc,FBSB,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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122 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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123 {l1s_read_msagc,FBSB,NO_PAR},{l1s_ctrl_fbsb,FBSB,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 3 |
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124 {NULL,NO_PAR,NO_PAR}, // frame 4 |
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125 {l1s_read_mon_result,FBSB, 1},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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126 {l1s_read_mon_result,FBSB, 2},{NULL,NO_PAR,NO_PAR}, // frame 6 |
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127 {l1s_read_mon_result,FBSB, 3},{NULL,NO_PAR,NO_PAR}, // frame 7 |
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128 {l1s_read_mon_result,FBSB, 4},{NULL,NO_PAR,NO_PAR}, // frame 8 |
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129 {l1s_read_mon_result,FBSB, 5},{NULL,NO_PAR,NO_PAR}, // frame 9 |
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130 {l1s_read_mon_result,FBSB, 6},{NULL,NO_PAR,NO_PAR}, // frame 10 |
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131 {l1s_read_mon_result,FBSB, 7},{NULL,NO_PAR,NO_PAR}, // frame 11 |
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132 {l1s_read_mon_result,FBSB, 8},{NULL,NO_PAR,NO_PAR}, // frame 12 |
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133 {l1s_read_mon_result,FBSB, 9},{NULL,NO_PAR,NO_PAR}, // frame 13 |
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134 {l1s_read_mon_result,FBSB,10},{NULL,NO_PAR,NO_PAR}, // frame 14 |
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135 {l1s_read_mon_result,FBSB,11},{NULL,NO_PAR,NO_PAR}, // frame 15 |
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136 {l1s_read_mon_result,FBSB,12},{NULL,NO_PAR,NO_PAR}, // frame 16 |
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137 {l1s_read_mon_result,FBSB,13},{NULL,NO_PAR,NO_PAR}, // frame 17 |
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138 {l1s_read_mon_result,FBSB,14},{NULL,NO_PAR,NO_PAR} // frame 18 |
115
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139 }; |
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140 #endif |
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141 |
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142 /*----------------------------------------------------*/ |
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143 /* TASK: Serving cell Normal BCCH reading. */ |
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144 /*----------------------------------------------------*/ |
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145 /* frame 1 2 3 4 5 6 */ |
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146 /* | | | | | | */ |
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147 /* C W R | | | -> burst 1 */ |
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148 /* C W R | | -> burst 2 */ |
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149 /* C W R | -> burst 3 */ |
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150 /* C W R -> burst 4 */ |
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151 /*----------------------------------------------------*/ |
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152 const T_FCT BLOC_NBCCHS[] = |
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153 { |
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154 {l1s_ctrl_snb_dl,NBCCHS,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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155 {l1s_ctrl_snb_dl,NBCCHS,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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156 {l1s_read_snb_dl,NBCCHS,BURST_1},{l1s_ctrl_snb_dl,NBCCHS,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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157 {l1s_read_snb_dl,NBCCHS,BURST_2},{l1s_ctrl_snb_dl,NBCCHS,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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158 {l1s_read_snb_dl,NBCCHS,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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159 {l1s_read_snb_dl,NBCCHS,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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160 }; |
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161 |
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162 /*----------------------------------------------------*/ |
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163 /* TASK: Serving cell Extended BCCH reading. */ |
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164 /*----------------------------------------------------*/ |
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165 /* frame 1 2 3 4 5 6 */ |
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166 /* | | | | | | */ |
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167 /* C W R | | | -> burst 1 */ |
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168 /* C W R | | -> burst 2 */ |
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169 /* C W R | -> burst 3 */ |
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170 /* C W R -> burst 4 */ |
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171 /*----------------------------------------------------*/ |
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172 const T_FCT BLOC_EBCCHS[] = |
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173 { |
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174 {l1s_ctrl_snb_dl,EBCCHS,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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175 {l1s_ctrl_snb_dl,EBCCHS,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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176 {l1s_read_snb_dl,EBCCHS,BURST_1},{l1s_ctrl_snb_dl,EBCCHS,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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177 {l1s_read_snb_dl,EBCCHS,BURST_2},{l1s_ctrl_snb_dl,EBCCHS,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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178 {l1s_read_snb_dl,EBCCHS,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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179 {l1s_read_snb_dl,EBCCHS,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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180 }; |
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181 |
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182 /*----------------------------------------------------*/ |
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183 /* TASK: Neighbour Cell SYStem info reading. */ |
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184 /*----------------------------------------------------*/ |
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185 /* C W R -> AGC */ |
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186 /* C W W W W W R -> all bursts */ |
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187 /*----------------------------------------------------*/ |
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188 const T_FCT BLOC_BCCHN[] = |
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189 { |
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190 {l1s_ctrl_msagc,BCCHN,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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191 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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192 {l1s_read_msagc,BCCHN,NO_PAR},{l1s_ctrl_nnb,BCCHN,NO_PAR},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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193 {NULL,NO_PAR,NO_PAR}, // frame 4 |
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194 {NULL,NO_PAR,NO_PAR}, // frame 5 |
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195 {NULL,NO_PAR,NO_PAR}, // frame 6 |
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196 {NULL,NO_PAR,NO_PAR}, // frame 7 |
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197 {NULL,NO_PAR,NO_PAR}, // frame 8 |
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198 {l1s_read_nnb,BCCHN,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 9 |
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199 }; |
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200 |
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201 /*----------------------------------------------------*/ |
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202 /* TASK: Neighbour Cell SYStem info reading. */ |
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203 /*----------------------------------------------------*/ |
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204 /* C W R -> AGC */ |
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205 /* C W W W W W R -> all bursts */ |
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206 /*----------------------------------------------------*/ |
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207 const T_FCT BLOC_BCCHN_TOP[] = |
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208 { |
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209 {l1s_ctrl_msagc,BCCHN_TOP,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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210 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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211 {l1s_read_msagc,BCCHN_TOP,NO_PAR},{l1s_ctrl_nnb,BCCHN_TOP,NO_PAR},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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212 {NULL,NO_PAR,NO_PAR}, // frame 4 |
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213 {NULL,NO_PAR,NO_PAR}, // frame 5 |
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214 {NULL,NO_PAR,NO_PAR}, // frame 6 |
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215 {NULL,NO_PAR,NO_PAR}, // frame 7 |
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216 {NULL,NO_PAR,NO_PAR}, // frame 8 |
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217 {l1s_read_nnb,BCCHN_TOP,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 9 |
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218 }; |
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219 |
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220 /*----------------------------------------------------*/ |
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221 /* TASK: Neighbour Cell SYStem info reading. */ |
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222 /* for packet transfer mode */ |
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223 /*----------------------------------------------------*/ |
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224 /* C W W W W W R -> all bursts */ |
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225 /*----------------------------------------------------*/ |
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226 #if (L1_GPRS) |
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227 const T_FCT BLOC_BCCHN_TRAN[] = |
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228 { |
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229 {l1s_ctrl_nnb,BCCHN_TRAN,NO_PAR},{NULL,NO_PAR,NO_PAR}, // frame 1 |
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230 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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231 {NULL,NO_PAR,NO_PAR}, // frame 3 |
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232 {NULL,NO_PAR,NO_PAR}, // frame 4 |
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233 {NULL,NO_PAR,NO_PAR}, // frame 5 |
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234 {NULL,NO_PAR,NO_PAR}, // frame 6 |
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235 {l1s_read_nnb,BCCHN_TRAN,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 7 |
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236 }; |
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237 #endif |
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238 |
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239 /*----------------------------------------------------*/ |
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240 /* TASK: Synchronization (camp on a new serving cell) */ |
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241 /*----------------------------------------------------*/ |
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242 const T_FCT BLOC_SYNCHRO[] = |
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243 { |
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244 {l1s_new_synchro,NO_PAR,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 1 |
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245 }; |
115
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246 |
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247 |
530
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248 /*----------------------------------------------------*/ |
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249 /* TASK: ADC measurement in CS_MODE0 */ |
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250 /* C */ |
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251 /* the ADC is performed inside the frame and the */ |
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252 /* result is red in the same frame due to an */ |
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253 /* Interrupt (handle by Riviera) */ |
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254 /*----------------------------------------------------*/ |
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255 const T_FCT BLOC_ADC[] = |
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256 { |
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257 {l1s_ctrl_ADC,NO_PAR,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 1 |
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258 }; |
115
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259 |
530
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260 |
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261 /*----------------------------------------------------*/ |
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262 /* TASK: Short Message Service Cell Broadcast */ |
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263 /*----------------------------------------------------*/ |
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264 /* frame 1 2 3 4 5 6 */ |
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265 /* | | | | | | */ |
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266 /* C W R | | | -> hopp. + burst 1 */ |
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267 /* C W R | | -> hopp. + burst 2 */ |
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268 /* C W R | -> hopp. + burst 3 */ |
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269 /* C W R -> hopp. + burst 4 + Synch back*/ |
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270 /*----------------------------------------------------*/ |
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271 const T_FCT BLOC_SMSCB[] = |
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272 { |
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273 {l1s_hopping_algo,SMSCB,NO_PAR},{l1s_ctrl_smscb, SMSCB,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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274 {l1s_hopping_algo,SMSCB,NO_PAR},{l1s_ctrl_smscb, SMSCB,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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275 {l1s_hopping_algo,SMSCB,NO_PAR},{l1s_read_snb_dl,SMSCB,BURST_1},{l1s_ctrl_smscb, SMSCB,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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276 {l1s_hopping_algo,SMSCB,NO_PAR},{l1s_read_snb_dl,SMSCB,BURST_2},{l1s_ctrl_smscb, SMSCB,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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277 {l1s_read_snb_dl,SMSCB,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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278 {l1s_read_snb_dl,SMSCB,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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279 }; |
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280 |
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281 /*----------------------------------------------------*/ |
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282 /* TASK: Normal Paging... */ |
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283 /*----------------------------------------------------*/ |
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284 /* frame 1 2 3 4 5 6 */ |
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285 /* | | | | | | */ |
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286 /* C W R | | | -> burst 1 */ |
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287 /* C W R | | -> burst 2 */ |
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288 /* C W R | -> burst 3 */ |
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289 /* C W R -> burst 4 */ |
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290 /*----------------------------------------------------*/ |
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291 const T_FCT BLOC_NP[] = |
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292 { |
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293 {l1s_ctrl_snb_dl,NP,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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294 {l1s_ctrl_snb_dl,NP,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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295 {l1s_read_snb_dl,NP,BURST_1},{l1s_ctrl_snb_dl,NP,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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296 {l1s_read_snb_dl,NP,BURST_2},{l1s_ctrl_snb_dl,NP,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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297 {l1s_read_snb_dl,NP,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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298 {l1s_read_snb_dl,NP,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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299 }; |
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300 |
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301 /*----------------------------------------------------*/ |
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302 /* TASK: Extended Paging task... */ |
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303 /*----------------------------------------------------*/ |
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304 /* frame 1 2 3 4 5 6 */ |
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305 /* | | | | | | */ |
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306 /* C W R | | | -> burst 1 */ |
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307 /* C W R | | -> burst 2 */ |
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308 /* C W R | -> burst 3 */ |
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309 /* C W R -> burst 4 */ |
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310 /*----------------------------------------------------*/ |
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311 const T_FCT BLOC_EP[] = |
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312 { |
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313 {l1s_ctrl_snb_dl,EP,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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314 {l1s_ctrl_snb_dl,EP,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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315 {l1s_read_snb_dl,EP,BURST_1},{l1s_ctrl_snb_dl,EP,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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316 {l1s_read_snb_dl,EP,BURST_2},{l1s_ctrl_snb_dl,EP,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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317 {l1s_read_snb_dl,EP,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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318 {l1s_read_snb_dl,EP,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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319 }; |
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320 |
530
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321 /*----------------------------------------------------*/ |
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322 /* TASK: All CCCH reading task... */ |
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323 /*----------------------------------------------------*/ |
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324 /* frame 1 2 3 4 5 6 */ |
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325 /* | | | | | | */ |
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326 /* C W R | | | -> burst 1 */ |
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327 /* C W R | | -> burst 2 */ |
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328 /* C W R | -> burst 3 */ |
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329 /* C W R -> burst 4 */ |
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330 /*----------------------------------------------------*/ |
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331 const T_FCT BLOC_ALLC[] = |
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332 { |
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333 {l1s_ctrl_snb_dl,ALLC,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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334 {l1s_ctrl_snb_dl,ALLC,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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335 {l1s_read_snb_dl,ALLC,BURST_1},{l1s_ctrl_snb_dl,ALLC,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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336 {l1s_read_snb_dl,ALLC,BURST_2},{l1s_ctrl_snb_dl,ALLC,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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337 {l1s_read_snb_dl,ALLC,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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338 {l1s_read_snb_dl,ALLC,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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339 }; |
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340 |
530
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341 /*----------------------------------------------------*/ |
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342 /* TASK: SDCCH */ |
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343 /*----------------------------------------------------*/ |
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344 /* frame 1 2 3 4 5 6 */ |
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345 /* | | | | | | */ |
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346 /* C W R | | | -> burst 1 */ |
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347 /* C W R | | -> burst 2 */ |
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348 /* C W R | -> burst 3 */ |
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349 /* C W R -> burst 4 */ |
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350 /*----------------------------------------------------*/ |
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351 const T_FCT BLOC_DDL[] = |
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352 { |
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353 {l1s_hopping_algo,DDL,NO_PAR},{l1s_ctrl_snb_dl, DDL,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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354 {l1s_hopping_algo,DDL,NO_PAR},{l1s_ctrl_snb_dl, DDL,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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355 {l1s_hopping_algo,DDL,NO_PAR},{l1s_read_dedic_dl,DDL,BURST_1},{l1s_ctrl_snb_dl, DDL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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356 {l1s_hopping_algo,DDL,NO_PAR},{l1s_read_dedic_dl,DDL,BURST_2},{l1s_ctrl_snb_dl, DDL,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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357 {l1s_read_dedic_dl,DDL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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358 {l1s_read_dedic_dl,DDL,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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359 }; |
115
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|
360 |
530
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361 const T_FCT BLOC_DUL[] = |
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362 { |
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363 {l1s_hopping_algo,DUL,NO_PAR},{l1s_ctrl_snb_ul, DUL,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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364 {l1s_hopping_algo,DUL,NO_PAR},{l1s_ctrl_snb_ul, DUL,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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365 {l1s_hopping_algo,DUL,NO_PAR},{l1s_read_tx_result,DUL,BURST_1},{l1s_ctrl_snb_ul, DUL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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366 {l1s_hopping_algo,DUL,NO_PAR},{l1s_read_tx_result,DUL,BURST_2},{l1s_ctrl_snb_ul, DUL,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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367 {l1s_read_tx_result,DUL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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368 {l1s_read_tx_result,DUL,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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369 }; |
115
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|
370 |
530
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371 const T_FCT BLOC_ADL[] = |
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372 { |
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373 {l1s_hopping_algo,ADL,NO_PAR},{l1s_ctrl_snb_dl, ADL,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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374 {l1s_hopping_algo,ADL,NO_PAR},{l1s_ctrl_snb_dl, ADL,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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375 {l1s_hopping_algo,ADL,NO_PAR},{l1s_read_dedic_dl,ADL,BURST_1},{l1s_ctrl_snb_dl, ADL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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376 {l1s_hopping_algo,ADL,NO_PAR},{l1s_read_dedic_dl,ADL,BURST_2},{l1s_ctrl_snb_dl, ADL,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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377 {l1s_read_dedic_dl,ADL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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378 {l1s_read_dedic_dl,ADL,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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379 }; |
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380 |
530
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381 const T_FCT BLOC_AUL[] = |
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382 { |
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383 {l1s_hopping_algo,AUL,NO_PAR},{l1s_ctrl_snb_ul, AUL,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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384 {l1s_hopping_algo,AUL,NO_PAR},{l1s_ctrl_snb_ul, AUL,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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385 {l1s_hopping_algo,AUL,NO_PAR},{l1s_read_tx_result,AUL,BURST_1},{l1s_ctrl_snb_ul, AUL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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386 {l1s_hopping_algo,AUL,NO_PAR},{l1s_read_tx_result,AUL,BURST_2},{l1s_ctrl_snb_ul, AUL,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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387 {l1s_read_tx_result,AUL,BURST_3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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388 {l1s_read_tx_result,AUL,BURST_4},{NULL,NO_PAR,NO_PAR} // frame 6 |
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389 }; |
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390 |
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391 /*-----------------------------------------------------------------------*/ |
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392 /* SPECIAL CASE: (ADL4,DDL4),(ADL5,DDL5),(ADL6,DDL6). */ |
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393 /*-----------------------------------------------------------------------*/ |
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394 /* frame 1 2 3 4 5 6 7 */ |
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395 /* | | | | | | | */ |
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396 /* C(DUL,1) W(DUL,1) R(DUL,1) | | | | */ |
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397 /* C(ADL,1) W(ADL,1) R(ADL,1) | | | */ |
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398 /* C(DUL,2) W(DUL,2) R(DUL,2) | | | */ |
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399 /* C(ADL,2) W(ADL,2) R(ADL,2) | | */ |
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400 /* C(DUL,3) W(DUL,3) R(DUL,3) | | */ |
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401 /* C(ADL,3) W(ADL,3) R(ADL,3) | */ |
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402 /* C(DUL,4) W(DUL,4) R(DUL,4) | */ |
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403 /* C(ADL,4) W(ADL,4) R(ADL,4) */ |
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404 /*-----------------------------------------------------------------------*/ |
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405 const T_FCT BLOC_DUL_ADL_MIXED[] = |
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406 { |
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407 {l1s_hopping_algo,AUL,NO_PAR},{l1s_ctrl_snb_ul, DUL,BURST_1}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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408 {l1s_hopping_algo,ADL,NO_PAR},{l1s_ctrl_snb_dl, ADL,BURST_1},{l1s_ctrl_snb_ul, DUL,BURST_2}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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409 {l1s_hopping_algo,ADL,NO_PAR},{l1s_read_tx_result,DUL,BURST_1},{l1s_ctrl_snb_dl, ADL,BURST_2},{l1s_ctrl_snb_ul, DUL,BURST_3}, {NULL,NO_PAR,NO_PAR}, // frame 3 |
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410 {l1s_hopping_algo,ADL,NO_PAR},{l1s_read_dedic_dl, ADL,BURST_1},{l1s_read_tx_result,DUL,BURST_2},{l1s_ctrl_snb_dl, ADL,BURST_3},{l1s_ctrl_snb_ul, DUL,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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411 {l1s_hopping_algo,ADL,NO_PAR},{l1s_read_dedic_dl, ADL,BURST_2},{l1s_read_tx_result,DUL,BURST_3},{l1s_ctrl_snb_dl, ADL,BURST_4}, {NULL,NO_PAR,NO_PAR}, // frame 5 |
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412 {l1s_read_dedic_dl,ADL,BURST_3},{l1s_read_tx_result,DUL,BURST_4},{NULL,NO_PAR,NO_PAR}, // frame 6 |
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413 {l1s_read_dedic_dl,ADL,BURST_4}, {NULL,NO_PAR,NO_PAR} // frame 7 |
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414 }; |
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415 |
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416 /*----------------------------------------------------*/ |
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417 /* ABORT: used to abort a running task when a new */ |
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418 /* task with higher priority occurs. */ |
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419 /*----------------------------------------------------*/ |
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420 const T_FCT BLOC_ABORT[] = |
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421 { |
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422 {l1s_abort,NO_PAR,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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423 {l1s_reset_tx_ptr,NO_PAR,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 2 |
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424 {l1s_read_dummy,NO_PAR,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 3 |
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425 }; |
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426 |
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427 /*----------------------------------------------------*/ |
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428 /* TASK: RACH in access mode... */ |
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429 /*----------------------------------------------------*/ |
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430 const T_FCT BLOC_RAACC[] = |
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431 { |
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432 {l1s_ctrl_rach,RAACC,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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433 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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434 {l1s_read_tx_result,RAACC,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 3 |
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435 }; |
115
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436 |
530
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437 /*----------------------------------------------------*/ |
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438 /* TASK: TCH */ |
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439 /*----------------------------------------------------*/ |
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440 /* C W R */ |
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441 /*----------------------------------------------------*/ |
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442 const T_FCT BLOC_TCHTF[] = |
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443 { |
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444 {l1s_hopping_algo,TCHTF,NO_PAR},{l1s_ctrl_tchtf,TCHTF,NO_PAR}, {NULL,NO_PAR}, // frame 1 |
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445 {NULL,NO_PAR}, // frame 2 |
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446 {l1s_read_dedic_dl,TCHTF,NO_PAR}, {NULL,NO_PAR} // frame 3 |
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447 }; |
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448 |
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449 const T_FCT BLOC_TCHTH[] = |
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450 { |
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451 {l1s_hopping_algo,TCHTH,NO_PAR},{l1s_ctrl_tchth,TCHTH,NO_PAR}, {NULL,NO_PAR}, // frame 1 |
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452 {NULL,NO_PAR}, // frame 2 |
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453 {l1s_read_dedic_dl,TCHTH,NO_PAR}, {NULL,NO_PAR} // frame 3 |
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454 }; |
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455 |
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456 const T_FCT BLOC_TCHD[] = |
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457 { |
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458 {l1s_ctrl_tchtd,TCHD,NO_PAR}, {NULL,NO_PAR}, // frame 1 |
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459 {NULL,NO_PAR}, // frame 2 |
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460 {l1s_read_dummy,TCHD,NO_PAR}, {NULL,NO_PAR} // frame 3 |
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461 }; |
115
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462 |
530
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463 const T_FCT BLOC_TCHA[] = |
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464 { |
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465 {l1s_hopping_algo,TCHA,NO_PAR},{l1s_ctrl_tcha,TCHA,NO_PAR}, {NULL,NO_PAR}, // frame 1 |
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466 {NULL,NO_PAR}, // frame 2 |
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467 {l1s_read_dedic_dl,TCHA,NO_PAR}, {NULL,NO_PAR} // frame 3 |
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|
468 }; |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
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|
469 |
530
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470 /*----------------------------------------------------*/ |
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471 /* TASK: Frequency Burst search in dedic/SDCCH... */ |
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472 /*----------------------------------------------------*/ |
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473 const T_FCT BLOC_FB51[] = |
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474 { |
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475 {l1s_ctrl_fb,FB51,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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476 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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477 {l1s_read_mon_result,FB51, 1},{NULL,NO_PAR,NO_PAR}, // frame 3 |
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478 {l1s_read_mon_result,FB51, 2},{NULL,NO_PAR,NO_PAR}, // frame 4 |
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479 {l1s_read_mon_result,FB51, 3},{NULL,NO_PAR,NO_PAR}, // frame 5 |
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480 {l1s_read_mon_result,FB51, 4},{NULL,NO_PAR,NO_PAR}, // frame 6 |
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481 {l1s_read_mon_result,FB51, 5},{NULL,NO_PAR,NO_PAR}, // frame 7 |
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482 {l1s_read_mon_result,FB51, 6},{NULL,NO_PAR,NO_PAR}, // frame 8 |
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483 {l1s_read_mon_result,FB51, 7},{NULL,NO_PAR,NO_PAR}, // frame 9 |
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484 {l1s_read_mon_result,FB51, 8},{NULL,NO_PAR,NO_PAR}, // frame 10 |
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485 {l1s_read_mon_result,FB51, 9},{NULL,NO_PAR,NO_PAR}, // frame 11 |
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486 {l1s_read_mon_result,FB51,10},{NULL,NO_PAR,NO_PAR}, // frame 12 |
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487 {l1s_read_mon_result,FB51,11},{NULL,NO_PAR,NO_PAR}, // frame 13 |
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488 {l1s_read_mon_result,FB51,12},{NULL,NO_PAR,NO_PAR} // frame 14 |
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489 }; |
115
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nuc-fw: Init_Target() reconstructed
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diff
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|
490 |
530
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491 /*----------------------------------------------------*/ |
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492 /* TASK: SB51, Synchro Burst reading. Dedic/SDCCH. */ |
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493 /*----------------------------------------------------*/ |
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494 /* C W W R -> SB */ |
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495 /*----------------------------------------------------*/ |
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496 const T_FCT BLOC_SB51[] = |
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497 { |
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498 {l1s_ctrl_sbgen,SB51,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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499 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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500 {NULL,NO_PAR,NO_PAR}, // frame 3 |
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501 {l1s_read_mon_result,SB51,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 4 |
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|
502 }; |
115
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nuc-fw: Init_Target() reconstructed
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diff
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|
503 |
530
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|
504 /*----------------------------------------------------*/ |
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|
505 /* TASK: SBCNF51, Synchro confirmation. Dedic/SDCCH. */ |
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506 /*----------------------------------------------------*/ |
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507 /* C W W R -> SBCONF */ |
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508 /*----------------------------------------------------*/ |
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|
509 const T_FCT BLOC_SBCNF51[] = |
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|
510 { |
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511 {l1s_ctrl_sbgen,SBCNF51,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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|
512 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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|
513 {NULL,NO_PAR,NO_PAR}, // frame 3 |
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514 {l1s_read_mon_result,SBCNF51,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 4 |
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|
515 }; |
115
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nuc-fw: Init_Target() reconstructed
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diff
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|
516 |
530
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|
517 /*----------------------------------------------------*/ |
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|
518 /* TASK: FB26, Frequency Burst search in dedic/TCH... */ |
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|
519 /*----------------------------------------------------*/ |
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|
520 /* C W W R */ |
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|
521 /*----------------------------------------------------*/ |
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|
522 const T_FCT BLOC_FB26[] = |
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|
523 { |
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|
524 {l1s_ctrl_fb26,FB26,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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|
525 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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|
526 {NULL,NO_PAR,NO_PAR}, // frame 3 |
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|
527 {l1s_read_mon_result,FB26,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 4 |
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|
528 }; |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
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diff
changeset
|
529 |
530
25a7fe25864c
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|
530 /*----------------------------------------------------*/ |
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|
531 /* TASK: SB26, Synchro. Burst reading in dedic/TCH... */ |
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|
532 /*----------------------------------------------------*/ |
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|
533 /* C W W W R */ |
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|
534 /*----------------------------------------------------*/ |
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|
535 const T_FCT BLOC_SB26[] = |
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|
536 { |
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537 {l1s_ctrl_sb26,SB26,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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|
538 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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|
539 {NULL,NO_PAR,NO_PAR}, // frame 3 |
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|
540 {NULL,NO_PAR,NO_PAR}, // frame 4 |
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|
541 {l1s_read_mon_result,SB26,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 5 |
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|
542 }; |
115
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nuc-fw: Init_Target() reconstructed
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diff
changeset
|
543 |
530
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|
544 /*----------------------------------------------------*/ |
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|
545 /* TASK: SBCNF26, Synchro. Burst reading in dedic/TCH.*/ |
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|
546 /*----------------------------------------------------*/ |
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|
547 /* C W W W R */ |
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|
548 /*----------------------------------------------------*/ |
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|
549 const T_FCT BLOC_SBCNF26[] = |
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|
550 { |
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551 {l1s_ctrl_sb26,SBCNF26,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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|
552 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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|
553 {NULL,NO_PAR,NO_PAR}, // frame 3 |
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|
554 {NULL,NO_PAR,NO_PAR}, // frame 4 |
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|
555 {l1s_read_mon_result,SBCNF26,NO_PAR},{NULL,NO_PAR,NO_PAR} // frame 5 |
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|
556 }; |
115
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nuc-fw: Init_Target() reconstructed
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diff
changeset
|
557 |
530
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|
558 /*----------------------------------------------------*/ |
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|
559 /* TASK: HWTEST after power-on... */ |
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560 /*----------------------------------------------------*/ |
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561 const T_FCT BLOC_HWTEST[] = |
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562 { |
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563 {l1s_ctrl_hwtest,HWTEST,NO_PAR}, {NULL,NO_PAR,NO_PAR}, // frame 1 |
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564 {NULL,NO_PAR,NO_PAR}, // frame 2 |
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565 {NULL,NO_PAR,NO_PAR}, // frame 3 |
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566 {l1s_read_hwtest,HWTEST,NO_PAR}, {NULL,NO_PAR,NO_PAR} // frame 4 |
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567 }; |
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568 |
530
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569 #else |
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570 extern T_FCT BLOC_FB[]; |
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571 extern T_FCT BLOC_SB[]; |
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572 extern T_FCT BLOC_BCCHS[]; |
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573 extern T_FCT BLOC_BCCHN[]; |
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574 extern T_FCT BLOC_BCCHN_TOP[]; |
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575 extern T_FCT BLOC_EP[]; |
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576 extern T_FCT BLOC_SYNCHRO[]; |
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577 extern T_FCT BLOC_ADC[]; |
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578 extern T_FCT BLOC_SMSCB[]; |
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579 extern T_FCT BLOC_NP[]; |
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580 extern T_FCT BLOC_ALLC[]; |
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581 extern T_FCT BLOC_DDL[]; |
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582 extern T_FCT BLOC_DUL[]; |
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583 extern T_FCT BLOC_ADL[]; |
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584 extern T_FCT BLOC_AUL[]; |
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585 extern T_FCT BLOC_DUL_ADL_MIXED[]; |
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586 extern T_FCT BLOC_ABORT[]; |
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587 extern T_FCT BLOC_RAACC[]; |
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588 extern T_FCT BLOC_TCHTF[]; |
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589 extern T_FCT BLOC_TCHTH[]; |
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590 extern T_FCT BLOC_TCHTD[]; |
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591 extern T_FCT BLOC_TCHA[]; |
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592 extern T_FCT BLOC_FB51[]; |
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593 extern T_FCT BLOC_SB51[]; |
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594 extern T_FCT BLOC_SBCNF51[]; |
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595 extern T_FCT BLOC_FB26[]; |
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596 extern T_FCT BLOC_SB26[]; |
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597 extern T_FCT BLOC_SBCNF26[]; |
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598 extern T_FCT BLOC_HWTEST[]; |
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599 #if ((REL99 == 1) && (FF_BHO == 1)) |
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600 extern T_FCT BLOC_FBSB[]; |
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601 #endif |
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602 #if (L1_GPRS) |
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603 extern T_FCT BLOC_BCCHN_TRAN[]; |
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604 #endif |
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605 |
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606 #endif |
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607 #endif //ndef L1_MFTAB_H |
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608 |
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609 |
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610 |