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annotate gsm-fw/services/dar/dar_const_i.h @ 940:0fb9b7f2ef87

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gsm-fw/services/ffs/drv.c: Intel single bank flash driver hooked in
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Sat, 31 Oct 2015 23:39:41 +0000
parents 81bee6125882
children
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1 /****************************************************************************/
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2 /* */
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3 /* File Name: dar_const_i.h */
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4 /* */
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5 /* Purpose: Internal constants used by DAR instance */
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6 /* */
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7 /* */
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8 /* Version 0.1 */
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9 /* */
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10 /* Date Modification */
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11 /* ------------------------------------ */
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12 /* 26 Septembre 2001 Create */
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13 /* */
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14 /* Author Stephanie Gerthoux */
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15 /* */
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16 /* */
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17 /* (C) Copyright 2001 by Texas Instruments Incorporated, All Rights Reserved*/
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18 /****************************************************************************/
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19
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20 #include "../../riviera/rv/rv_defined_swe.h"
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21
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22 #ifdef RVM_DAR_SWE
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23
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24 #ifndef __DAR_CONST_I_H_
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25 #define __DAR_CONST_I_H_
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26
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27 #ifdef __cplusplus
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28 extern "C"
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29 {
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30 #endif
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31
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32 /* Define a mask used to identify the events */
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33 #define DAR_EVENT_EXTERN (0x0C00)
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34 #define DAR_EVENT_INTERN (0x0300)
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35
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36 /* The DAR task run without any time out */
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37 #define DAR_NOT_TIME_OUT (0)
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38
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39 /* The DAR entity processes only the messages send to the following
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40 mail box */
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41 #define DAR_MBOX (RVF_TASK_MBOX_0)
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42
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43 /* The DAR entity takes into account only the following events: */
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44 #define DAR_TASK_MBOX_EVT_MASK (RVF_TASK_MBOX_0_EVT_MASK)
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45
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46 /* The DAR entity waits all event type */
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47 #define DAR_ALL_EVENT_FLAGS (0xFFFF)
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48
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49 /* The DAR use max group elements used */
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50 #define DAR_MAX_GROUP_NB (4)
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51
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52 /* RAM max buffer size */
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53 #define DAR_MAX_BUFFER_SIZE (3000)
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54
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55 /* Recovery data max buffer size */
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56 #define DAR_RECOVERY_DATA_MAX_BUFFER_SIZE (50)
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57
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58 /* Dar invalid value */
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59 #define DAR_INVALID_VALUE (0xFFFF)
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60
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61 /* Dar initialization */
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62 #define DAR_INITIALIZATION_VALUE (0x0000)
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63
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64 /* Define the Watchdog timer register mode */
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65 #define WATCHDOG_TIM_MODE (0xFFFFF804)
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66
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67
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68 #if (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11)
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69 /* Define the Debug Unit register mode */
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70 #define DAR_DEBUG_UNIT_REGISTER (0x03C00000)
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71 #elif (CHIPSET == 12)
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72 /* Define the Debug Unit register mode */
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73 #define DAR_DEBUG_UNIT_REGISTER (0x09F00000)
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74 #endif
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75
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76 /* Mask to enable the Debug Unit Module */
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77 #define ENABLE_DU_MASK (0xF7FF)
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78
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79 /* Mask to disable the Debug Unit Module */
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80 #define DISABLE_DU_MASK (0x0800)
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81
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82 /* Extra Control register CONF Adress */
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83 #define DAR_DU_EXTRA_CONTROL_REG (0xFFFFFB10)
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84
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85 /* Define the size of the Debug Unit register */
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86 /* This size is 64 words of 32 bits = 64*4 bytes */
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87 /* Size in bytes */
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88 #define DEBUG_UNIT_BYTES_SIZE (256)
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89 /* Define the size in words */
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90 #define DEBUG_UNIT_WORD_SIZE (64)
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91
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92 /* Define the size of the X_dump _buffer */
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93 /* This size is specified in the gsm_cs_amd4_lj3_test.cmd
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94 (in "system" directory) */
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95 /* Its size is 38*32 bits = 38*4 bytes = 152 bytes */
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96 #define DAR_X_DUMP_BUFFER_SIZE (152)
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97
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98 /* Define the exceptions */
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99 #define DAR_NO_ABORT_EXCEPTION (0)
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100 #define DAR_EXCEPTION_DATA_ABORT (1)
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101 #define DAR_EXCEPTION_PREFETCH_ABORT (2)
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102 #define DAR_EXCEPTION_UNDEFINED (3)
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103 #define DAR_EXCEPTION_SWI (4)
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104 #define DAR_EXCEPTION_RESERVED (5)
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105
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106 #ifdef __cplusplus
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107 }
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108 #endif
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109 #endif /* __DAR_CONST_I_H_ */
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110 #endif /* #ifdef RVM_DAR_SWE */