FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/nucleus/demo/caltimer.h @ 726:105ac33aa5a1

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
mm_regf.c compiles
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 04 Oct 2014 21:45:54 +0000
parents afceeeb2cba1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
79
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1 /*
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2 * Definitions for Calypso general-purpose timer registers
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3 * Added to the FreeNucleus Calypso port by Spacefalcon the Outlaw.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
4 *
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
5 * This header is usable from both .c and .S source files.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
6 */
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
7
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
8 #ifndef _CALYPSO_TIMER_H
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
9 #define _CALYPSO_TIMER_H
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
10
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
11 #define TIMER1_BASE_ADDR 0xFFFE3800
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
12 #define TIMER2_BASE_ADDR 0xFFFE6800
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
13
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
14 #ifdef __ASSEMBLER__
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
15
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
16 /*
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
17 * Assembly source with cpp
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
18 *
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
19 * The most convenient way to access registers like these from ARM
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
20 * assembly is to load the base address of the register block in some
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
21 * ARM register, using only one ldr rN, =xxx instruction and only one
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
22 * literal pool entry, and then access various registers in the block
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
23 * from the same base using the immediate offset addressing mode.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
24 *
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
25 * Here we define the offsets for the usage scenario above.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
26 */
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
27
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
28 #define CNTL_TIM 0x00
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
29 #define LOAD_TIM 0x02
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
30 #define READ_TIM 0x04
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
31
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
32 #else
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
33
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
34 /*
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
35 * C source
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
36 *
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
37 * For access from C, we define the layout of each timer register block
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
38 * as a struct, and then define a pleudo-global-var for easy "volatile"
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
39 * access to each of the 2 timers.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
40 */
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
41
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
42 struct timer_regs {
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
43 unsigned char cntl;
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
44 unsigned char pad;
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
45 unsigned short load;
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
46 unsigned short read;
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
47 };
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
48
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
49 #define TIMER1_REGS (*(volatile struct timer_regs *) TIMER1_BASE_ADDR)
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
50 #define TIMER2_REGS (*(volatile struct timer_regs *) TIMER2_BASE_ADDR)
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
51
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
52 #endif
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
53
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
54 /* CNTL register bit definitions */
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
55 #define CNTL_START 0x01
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
56 #define CNTL_AUTO_RELOAD 0x02
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
57 #define CNTL_CLOCK_ENABLE 0x20
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
58
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
59 #endif /* include guard */