freecalypso-sw: gsm-fw/L1/cfile/Makefile annotate

annotate gsm-fw/L1/cfile/Makefile @ 923:10b4bed10192

gsm-fw/L1: fix for the DSP patch corruption bug The L1 code we got from the LoCosto fw contains a feature for DSP CPU load measurement. This feature is a LoCosto-ism, i.e., not applicable to earlier DBB chips (Calypso) with their respective earlier DSP ROMs. Most of the code dealing with that feature is conditionalized as #if (DSP >= 38), but one spot was missed, and the MCU code was writing into an API word dealing with this feature. In TCS211 this DSP API word happens to be used by the DSP code patch, hence that write was corrupting the patched DSP code.

author	Mychaela Falconia <falcon@ivan.Harhan.ORG>
date	Mon, 19 Oct 2015 17:13:56 +0000
parents	5f93a9a8f9a0
children	3f178b3ac50a

rev	line source
546 c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1 CC= arm-elf-gcc
c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2 CPPFLAGS=-I../../include -I../include -I../audio_include -I../audio_cust0 \
557 3bb11261b9fe L1: started work on l1_func.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 555 diff changeset	3 -I../tm_include -I../tm_cust0 -I../cust0 -I../tpudrv \
3bb11261b9fe L1: started work on l1_func.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 555 diff changeset	4 -DMOVE_IN_INTERNAL_RAM
546 c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	5 CFLAGS= -O2 -fno-builtin -mthumb-interwork
571 8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 569 diff changeset	6 ASFLAGS=-mthumb-interwork
546 c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	7 LD= arm-elf-ld
551 2e662daa7441 L1: l1_cmplx.c compiles for IRAM Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 550 diff changeset	8 INTSED= ../intram.sed
546 c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	9
565 335f9b00f8fc L1: l1_mfmgr.c compiles Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 563 diff changeset	10 IOBJS= l1_api_hisr.o l1_cmplx_intram.o l1_ctl.o l1_drive.o l1_func.o \
600 3fea71719423 L1: l1_isr_glue.c moved to cfile directory; compiles successfully Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 575 diff changeset	11 l1_mfmgr.o l1_small_asm.o l1_sync_intram.o l1_isr_glue.o
571 8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 569 diff changeset	12 XOBJS= l1_afunc.o l1_async.o l1_cmplx.o l1_init.o l1_pwmgr.o l1_small_defs.o \
602 5f93a9a8f9a0 L1: [rt]x_tch_data() stubs implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 600 diff changeset	13 l1_sync.o l1_trace.o dummy_tch_data.o
546 c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	14
575 1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 574 diff changeset	15 all: iramcode.o xipcode.o
546 c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	16
c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	17 ${XOBJS}: %.o : %.c
c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	18 ${CC} ${CFLAGS} ${CPPFLAGS} -mthumb -c $<
c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	19
551 2e662daa7441 L1: l1_cmplx.c compiles for IRAM Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 550 diff changeset	20 l1_cmplx_intram.c: l1_cmplx.c ${INTSED}
2e662daa7441 L1: l1_cmplx.c compiles for IRAM Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 550 diff changeset	21 sed -n -f ${INTSED} l1_cmplx.c > $@
2e662daa7441 L1: l1_cmplx.c compiles for IRAM Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 550 diff changeset	22
569 9df89f93d311 L1: l1_sync.c compiles for IRAM Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 568 diff changeset	23 l1_sync_intram.c: l1_sync.c ${INTSED}
9df89f93d311 L1: l1_sync.c compiles for IRAM Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 568 diff changeset	24 sed -n -f ${INTSED} l1_sync.c > $@
9df89f93d311 L1: l1_sync.c compiles for IRAM Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 568 diff changeset	25
575 1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 574 diff changeset	26 iramcode.o: ${IOBJS}
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 574 diff changeset	27 ${LD} -r -o $@ ${IOBJS}
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 574 diff changeset	28
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 574 diff changeset	29 xipcode.o: ${XOBJS}
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 574 diff changeset	30 ${LD} -r -o $@ ${XOBJS}
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 574 diff changeset	31
546 c7e53436c451 L1: starting to compile core C files Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	32 clean:
551 2e662daa7441 L1: l1_cmplx.c compiles for IRAM Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 550 diff changeset	33 rm -f .[oa] l1__intram.c .out errs

FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/L1/cfile/Makefile @ 923:10b4bed10192