FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/bsp/abb+spi/Makefile @ 923:10b4bed10192
gsm-fw/L1: fix for the DSP patch corruption bug
The L1 code we got from the LoCosto fw contains a feature for DSP CPU load
measurement. This feature is a LoCosto-ism, i.e., not applicable to earlier
DBB chips (Calypso) with their respective earlier DSP ROMs. Most of the
code dealing with that feature is conditionalized as #if (DSP >= 38),
but one spot was missed, and the MCU code was writing into an API word
dealing with this feature. In TCS211 this DSP API word happens to be
used by the DSP code patch, hence that write was corrupting the patched
DSP code.
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Mon, 19 Oct 2015 17:13:56 +0000 |
parents | 6fd70825db76 |
children |
rev | line source |
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154 | 1 CC= arm-elf-gcc |
2 CFLAGS= -O2 -fno-builtin -mthumb-interwork -mthumb | |
3 LD= arm-elf-ld | |
4 | |
590
05342cadbaf1
gsm-fw/bsp/abb+spi: abb_core_inth.c compiles with L1 enabled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
157
diff
changeset
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5 sinclude ../../include/config.mk |
05342cadbaf1
gsm-fw/bsp/abb+spi: abb_core_inth.c compiles with L1 enabled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
157
diff
changeset
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6 |
157
e48ea5875df7
gsm-fw: SPI task code compiles and links
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
154
diff
changeset
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7 OBJS= abb.o spi_api.o spi_drv.o spi_env.o spi_process.o spi_task.o |
154 | 8 |
590
05342cadbaf1
gsm-fw/bsp/abb+spi: abb_core_inth.c compiles with L1 enabled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
157
diff
changeset
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9 ifeq (${CONFIG_INCLUDE_L1},1) |
591
6fd70825db76
gsm-fw/bsp/abb+spi: abb_inth.c compiles with L1 enabled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
590
diff
changeset
|
10 OBJS+= abb_core_inth.o abb_inth.o |
590
05342cadbaf1
gsm-fw/bsp/abb+spi: abb_core_inth.c compiles with L1 enabled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
157
diff
changeset
|
11 endif |
05342cadbaf1
gsm-fw/bsp/abb+spi: abb_core_inth.c compiles with L1 enabled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
157
diff
changeset
|
12 |
154 | 13 HDRS= abb.h abb_core_inth.h abb_inline.h abb_inth.h spi_api.h spi_drv.h \ |
14 spi_env.h spi_pool_size.h spi_process.h spi_task.h | |
15 | |
16 all: xipcode.o | |
17 | |
18 ${OBJS}: ${HDRS} | |
19 | |
20 xipcode.o: ${OBJS} | |
21 ${LD} -r -o $@ ${OBJS} | |
22 | |
23 clean: | |
24 rm -f *.[oa] *errs |