freecalypso-sw: gsm-fw/bsp/armio.c annotate

annotate gsm-fw/bsp/armio.c @ 923:10b4bed10192

gsm-fw/L1: fix for the DSP patch corruption bug The L1 code we got from the LoCosto fw contains a feature for DSP CPU load measurement. This feature is a LoCosto-ism, i.e., not applicable to earlier DBB chips (Calypso) with their respective earlier DSP ROMs. Most of the code dealing with that feature is conditionalized as #if (DSP >= 38), but one spot was missed, and the MCU code was writing into an API word dealing with this feature. In TCS211 this DSP API word happens to be used by the DSP code patch, hence that write was corrupting the patched DSP code.

author	Mychaela Falconia <falcon@ivan.Harhan.ORG>
date	Mon, 19 Oct 2015 17:13:56 +0000
parents	383abdbc5d35
children	4c80a6e6723f

rev	line source
93 45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2 * ARMIO.C
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	3 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	4 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	5 * Control diagnostic bits
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	6 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	7 * Reference : GCS207
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	8 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	9 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	11
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	12 #include "../include/config.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	13 #include "../include/sys_types.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	14
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	15 #include "mem.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	16 #include "iq.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	17 #include "armio.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	18
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	19 #if 0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	20 /* FreeCalypso: abb.h hasn't been integrated yet */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	21 #include "abb.h" // for AI_Power function : to be removed, use ABB_Power_Off in abb.c file instead !!!
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	22 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	23
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	24 #if (CHIPSET != 12)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	25 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	26 * AI_EnableBit
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	27 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	28 * Enable ARMIO input/output bit (see CLKM module specification)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	29 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	30 void AI_EnableBit(int bit)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	31 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	32 ((volatile SYS_UWORD16 ) CLKM_IO_CNTL) \|= (1<<bit);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	33 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	34
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	35 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	36 * AI_DisableBit
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	37 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	38 * Disable ARMIO input/output bit (see CLKM module specification)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	39 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	40 void AI_DisableBit(int bit)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	41 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	42 ((volatile SYS_UWORD16 ) CLKM_IO_CNTL) &= ~(1<<bit);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	43 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	44
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	45 #endif /* CHIPSET != 12 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	46
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	47 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	48 * AI_SetBit
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	49 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	50 * Switch-on one bit
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	51 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	52 void AI_SetBit(int bit)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	53 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	54 ((volatile SYS_UWORD16 ) ARMIO_OUT) \|= (1<<bit);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	55 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	56
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	57 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	58 * AI_ResetBit
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	59 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	60 * Switch-off one bit
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	61 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	62 void AI_ResetBit(int bit)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	63 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	64 ((volatile SYS_UWORD16 ) ARMIO_OUT) &= ~(1<<bit);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	65 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	66
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	67 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	68 * AI_ConfigBitAsOutput
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	69 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	70 * Set this bit as an output
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	71 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	72 void AI_ConfigBitAsOutput(int bit)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	73 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	74 ((volatile SYS_UWORD16 ) ARMIO_IO_CNTL) &= ~(1<<bit);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	75 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	76
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	77 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	78 * AI_ConfigBitAsInput
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	79 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	80 * Set this bit as an input
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	81 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	82 void AI_ConfigBitAsInput(int bit)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	83 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	84 ((volatile SYS_UWORD16 ) ARMIO_IO_CNTL) \|= (1<<bit);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	85 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	86
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	87
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	88 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	89 * AI_ReadBit
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	90 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	91 * Read value in register
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	92 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	93 SYS_BOOL AI_ReadBit(int bit)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	94 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	95 if ((((volatile SYS_UWORD16 ) ARMIO_IN)) & (1<<bit))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	96 return (1);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	97 else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	98 return (0);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	99 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	100
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	101 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	102 * AI_Power
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	103 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	104 * Switch-on or off the board
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	105 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	106 * Parameters : SYS_UWORD8 power: 1 to power-on (maintain power)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	107 * 0 to power-off
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	108 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	109 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	110 // #if (!OP_L1_STANDALONE)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	111 #if 0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	112 void AI_Power(SYS_UWORD8 power)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	113 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	114 if (power == 0)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	115 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	116 ABB_Power_Off();
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	117 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	118 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	119 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	120
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	121 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	122 * AI_ResetIoConfig
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	123 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	124 * Reset all default IO configurations
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	125 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	126 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	127 void AI_ResetIoConfig(void)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	128 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	129 ((volatile SYS_UWORD16 ) ARMIO_IO_CNTL) = 0xFFFF; // all bits are inputs
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	130 #if (CHIPSET != 12)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	131 ((volatile SYS_UWORD16 ) CLKM_IO_CNTL) = 0; // default config
110 325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	132 #endif /* CHIPSET != 12 */
93 45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	133 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	134
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	135
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	136 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	137 * AI_ClockEnable
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	138 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	139 * Enable ARMIO clock module
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	140 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	141 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	142 void AI_ClockEnable(void)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	143 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	144 ((volatile SYS_UWORD16 ) ARMIO_CNTL_REG) \|= ARMIO_CLOCKEN; // set to 1 bit 5
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	145 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	146
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	147 /*
110 325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	148 * The AI_InitIOConfig() function is target-specific.
93 45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	149 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	150
110 325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	151 #ifdef CONFIG_TARGET_GTAMODEM
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	152 /* version for the Openmoko GTA0x GSM modem */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	153 void AI_InitIOConfig(void)
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	154 {
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	155 // reset the IOs config
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	156 AI_ResetIoConfig();
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	157
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	158 /*
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	159 * The GTA0x Calypso block is a stripped-down version of the Leonardo,
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	160 * reduced to the absolute minimum that is needed for a slave modem.
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	161 * Almost all of the unused interface pins are left unconnected, only
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	162 * a few are pulled externally to GND or VIO.
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	163 *
117 e40d8661ecab nuc-fw: low-level serial code should be complete Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 110 diff changeset	164 * We handle the unused pins the way TI's code does: configure them
110 325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	165 * as GPIOs, then as outputs driving a fixed value (high for GPIOs 8+,
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	166 * low for 0-7).
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	167 */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	168
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	169 /* I'll be brave and turn the unused TSPDI input into a GPIO4 output */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	170 AI_EnableBit(0);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	171 /* Don't want to do that for the IO5 pin though, as it's wired to SIM_IO
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	172 * through a resistor like on the Leonardo. */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	173 AI_DisableBit(1);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	174 /*
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	175 * The following 2 lines are straight from the Leonardo source: enable
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	176 * GPIO6 and GPIO8. GPIO6 takes the place of an ancient VEGA3(?) compat
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	177 * pin, and GPIO8 takes the place of MCUEN1 which no Leonardo-based
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	178 * design seems to use.
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	179 *
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	180 * Note that GPIO7 is not enabled in this version, so that pin retains
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	181 * its meaning as nRESET_OUT - but it's an unused output, rather than
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	182 * a floating input, so we are fine.
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	183 */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	184 AI_EnableBit(2);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	185 AI_EnableBit(4);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	186
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	187 /*
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	188 * The GTA0x modem has no Calypso-interfaced Bluetooth, nor any other
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	189 * use for MCSI, aka the DSP backdoor interface. So we turn these 4 pins
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	190 * into GPIOs driving high output state like TI's code does in the
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	191 * sans-BT configuration.
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	192 */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	193 AI_EnableBit(5);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	194 AI_EnableBit(6);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	195 AI_EnableBit(7);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	196 AI_EnableBit(8);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	197
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	198 /* ditto for MCUEN2 turned GPIO 13 */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	199 AI_EnableBit(9);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	200
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	201 // ARMIO_OUT register configuration :
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	202 // set IOs 8,9,10,11,12 and 13 as high
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	203 // set IOs 0 to 7 as low
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	204 // Falcon's note: the BP->AP interrupt line gets set low as desired
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	205 ((volatile SYS_UWORD16 ) ARMIO_OUT) = 0x3F00;
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	206
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	207 // ARMIO_CNTL_REG register configuration :
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	208 // set IOs 0,1,6,8,9,10,11,12 and 13 as outputs.
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	209 // Falcon's addition: set 2, 3 and 4 as outputs too,
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	210 // as they are no-connects on the board.
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	211
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	212 AI_ConfigBitAsOutput(0);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	213 AI_ConfigBitAsOutput(1);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	214 AI_ConfigBitAsOutput(2);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	215 AI_ConfigBitAsOutput(3);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	216 AI_ConfigBitAsOutput(4);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	217 AI_ConfigBitAsOutput(6);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	218 AI_ConfigBitAsOutput(8);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	219 AI_ConfigBitAsOutput(9);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	220 AI_ConfigBitAsOutput(10);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	221 AI_ConfigBitAsOutput(11);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	222 AI_ConfigBitAsOutput(12);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	223 AI_ConfigBitAsOutput(13);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	224 }
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	225 #endif
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	226
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	227 #ifdef CONFIG_TARGET_PIRELLI
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	228 /* version for Pirelli DP-L10 */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	229 void AI_InitIOConfig(void)
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	230 {
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	231 // reset the IOs config
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	232 AI_ResetIoConfig();
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	233
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	234 /*
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	235 * In the case of the Pirelli, our understanding of the hardware
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	236 * is severely crippled by the lack of schematics and the difficulty of
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	237 * reverse engineering from steve-m's PCB layer grind-down scans.
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	238 *
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	239 * The folllowing ARMIO configuration has been copied from OsmocomBB.
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	240 */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	241 AI_EnableBit(0);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	242 AI_EnableBit(1);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	243 AI_EnableBit(2);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	244 AI_EnableBit(3);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	245 AI_EnableBit(4);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	246 AI_EnableBit(9);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	247 /* GPIO out all zeros */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	248 ((volatile SYS_UWORD16 ) ARMIO_OUT) = 0x0000;
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	249 /* setup outputs like OsmocomBB does */
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	250 AI_ConfigBitAsOutput(1);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	251 AI_ConfigBitAsOutput(4);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	252 AI_ConfigBitAsOutput(7);
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	253 }
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	254 #endif
325bbadc0c9c nuc-fw/bsp: per-target ARMIO init implemented Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 93 diff changeset	255
513 383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	256 #ifdef CONFIG_TARGET_COMPAL
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	257 /* same for all C1xx variants */
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	258 void AI_InitIOConfig(void)
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	259 {
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	260 // reset the IOs config
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	261 AI_ResetIoConfig();
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	262
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	263 /*
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	264 * I don't feel like scrutinizing every Calypso signal on the C139
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	265 * and C155 schematics right now, so for now we'll use a GPIO
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	266 * configuration based on OsmocomBB.
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	267 */
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	268 /* GPIO out all zeros */
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	269 ((volatile SYS_UWORD16 ) ARMIO_OUT) = 0x0000;
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	270 /* make GPIOs 1 and 3 outputs */
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	271 AI_ConfigBitAsOutput(1);
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	272 AI_ConfigBitAsOutput(3);
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	273 }
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	274 #endif
383abdbc5d35 gsm-fw/bsp/armio.c: Compal configuration added Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 143 diff changeset	275
93 45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	276 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	277 * AI_SelectIOForIT
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	278 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	279 * Select which IO will be used to generate an interrupt.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	280 * 'Edge' specifies if interrup must be detected on falling or rising edge.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	281 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	282 * Warning: parameters are not checked.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	283 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	284
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	285 void AI_SelectIOForIT (SYS_UWORD16 Pin, SYS_UWORD16 Edge)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	286 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	287 #if (CHIPSET == 12)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	288 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	289 * Update INTERRUPT_LEVEL_REG with Edge configuration on Pin selection
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	290 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	291 GPIO_INTERRUPT_LEVEL_REG = (Edge & 0x0001) << Pin;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	292
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	293 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	294 * Update INTERRUPT_MASK_REG to enable interrupt generation on Pin selection
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	295 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	296 GPIO_INTERRUPT_MASK_REG = 1 << Pin;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	297 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	298 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	299 * Bit SET_GPIO_EVENT_MODE (bit 0) is set to enable the GPIO event mode.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	300 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	301
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	302 ((volatile SYS_UWORD16 ) ARMIO_GPIO_EVENT_MODE) = (Pin << 1) + (Edge << 5) + 1;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	303 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	304 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	305
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	306 #if (CHIPSET != 12)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	307 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	308 * AI_CheckITSource
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	309 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	310 * Check if the interrupt specified by 'Source' is active or not.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	311 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	312 * Output: 0: IT is not active
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	313 * 1: IT is active
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	314 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	315 * Warning: parameters are not checked.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	316 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	317 * Warning: If the keypad and GPIO interrupts may occur the GPIO interrupt
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	318 * must be checked first because the GPIO status bit is reset when
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	319 * the register is read.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	320 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	321
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	322 int AI_CheckITSource (SYS_UWORD16 Source)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	323 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	324 return (((volatile SYS_UWORD16 ) ARMIO_KBD_GPIO_INT) & Source ? 1 : 0);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	325 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	326
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	327 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	328 * AI_UnmaskIT
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	329 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	330 * Unmask the IT specified by 'Source' (keyboard or GPIO).
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	331 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	332 * Warning: parameters are not checked.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	333 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	334
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	335 void AI_UnmaskIT (SYS_UWORD16 Source)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	336 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	337 ((volatile SYS_UWORD16 ) ARMIO_KBD_GPIO_MASKIT) &= ~Source;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	338 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	339
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	340 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	341 * AI_MaskIT
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	342 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	343 * Mask the IT specified by 'Source' (keyboard or GPIO).
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	344 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	345 * Warning: parameters are not checked.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	346 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	347
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	348 void AI_MaskIT (SYS_UWORD16 Source)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	349 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	350 ((volatile SYS_UWORD16 ) ARMIO_KBD_GPIO_MASKIT) \|= Source;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	351 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	352 #endif /* CHIPSET != 12 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	353
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	354 #if (CHIPSET == 12)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	355
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	356 void AI_MaskIT(SYS_UWORD16 d_io_number) {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	357 GPIO_INTERRUPT_MASK_REG \|= (1 << d_io_number);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	358 } /* f_gpio_mask_it() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	359
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	360 void AI_UnmaskIT(SYS_UWORD16 d_io_number) {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	361 GPIO_INTERRUPT_MASK_REG &= ~(1 << d_io_number);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	362 } /* f_gpio_unmask_it() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	363
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	364 #endif

FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/bsp/armio.c @ 923:10b4bed10192