annotate gsm-fw/bsp/irq_twiddle.S @ 923:10b4bed10192

gsm-fw/L1: fix for the DSP patch corruption bug The L1 code we got from the LoCosto fw contains a feature for DSP CPU load measurement. This feature is a LoCosto-ism, i.e., not applicable to earlier DBB chips (Calypso) with their respective earlier DSP ROMs. Most of the code dealing with that feature is conditionalized as #if (DSP >= 38), but one spot was missed, and the MCU code was writing into an API word dealing with this feature. In TCS211 this DSP API word happens to be used by the DSP code patch, hence that write was corrupting the patched DSP code.
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Mon, 19 Oct 2015 17:13:56 +0000
parents 8be182dd9218
children
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1 /*
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
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2 * TI's L1 code (and possibly other parts of the software suite) calls
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3 * functions named INT_DisableIRQ() and INT_EnableIRQ(); in the Leonardo
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4 * fw they are implemented (in a very ugly manner, as usual) in the
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5 * int.s entry point assembly module. Here we implement the same
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6 * functions in a cleaner way.
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7 */
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8
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
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9 #include "../nucleus/asm_defs.h"
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8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
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11 .code 32
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12 .text
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14 .globl INT_DisableIRQ
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15 INT_DisableIRQ:
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16 mrs r0, CPSR
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17 orr r0, r0, #LOCKOUT
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18 msr CPSR, r0
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19 bx lr
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20
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21 .globl INT_EnableIRQ
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22 INT_EnableIRQ:
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23 mrs r0, CPSR
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24 bic r0, r0, #LOCKOUT
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25 msr CPSR, r0
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26 bx lr