FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/bsp/irq_twiddle.S @ 923:10b4bed10192
gsm-fw/L1: fix for the DSP patch corruption bug
The L1 code we got from the LoCosto fw contains a feature for DSP CPU load
measurement. This feature is a LoCosto-ism, i.e., not applicable to earlier
DBB chips (Calypso) with their respective earlier DSP ROMs. Most of the
code dealing with that feature is conditionalized as #if (DSP >= 38),
but one spot was missed, and the MCU code was writing into an API word
dealing with this feature. In TCS211 this DSP API word happens to be
used by the DSP code patch, hence that write was corrupting the patched
DSP code.
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Mon, 19 Oct 2015 17:13:56 +0000 |
parents | 8be182dd9218 |
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rev | line source |
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597
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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1 /* |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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2 * TI's L1 code (and possibly other parts of the software suite) calls |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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3 * functions named INT_DisableIRQ() and INT_EnableIRQ(); in the Leonardo |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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4 * fw they are implemented (in a very ugly manner, as usual) in the |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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5 * int.s entry point assembly module. Here we implement the same |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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6 * functions in a cleaner way. |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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7 */ |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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8 |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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9 #include "../nucleus/asm_defs.h" |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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10 |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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11 .code 32 |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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12 .text |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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13 |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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14 .globl INT_DisableIRQ |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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15 INT_DisableIRQ: |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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16 mrs r0, CPSR |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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17 orr r0, r0, #LOCKOUT |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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18 msr CPSR, r0 |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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19 bx lr |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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20 |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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21 .globl INT_EnableIRQ |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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22 INT_EnableIRQ: |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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23 mrs r0, CPSR |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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24 bic r0, r0, #LOCKOUT |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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25 msr CPSR, r0 |
8be182dd9218
gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
26 bx lr |