FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/services/etm/etm_tmpwr.c @ 909:16ed75e266f2
rvinterf LCD output inversion option implemented
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Mon, 07 Sep 2015 17:25:30 +0000 |
parents | d78219c43fbf |
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rev | line source |
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1 /****************************************************************************** |
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2 * Enhanced TestMode (PWR) |
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3 * Copyright Texas Instruments, 2003 |
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4 * Svend Kristian Lindholm, skl@ti.com |
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5 * |
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6 * $Id: tmpwr.c 1.1 Wed, 20 Aug 2003 10:22:37 +0200 skl $ |
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7 * |
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8 ******************************************************************************/ |
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9 |
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10 #include "etm/etm.h" |
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11 #include "etm/etm_trace.h" |
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12 #include "etm/etm.h" |
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13 #include "etm/etm_env.h" |
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14 #include "etm/etm_api.h" |
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15 #include "etm/etm_misc.h" |
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16 |
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17 #include "rv/rv_general.h" |
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18 #include "rv/rv_defined_swe.h" |
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19 |
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20 #include "memif/mem.h" |
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21 #include <string.h> |
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22 |
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23 |
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24 #include "rv/rv_defined_swe.h" |
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25 #define TRACE_WANTED 1 |
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26 #include "lcc/lcc_api.h" |
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27 #include "lcc/lcc_cfg_i.h" |
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28 #include "lcc/lcc.h" |
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29 #include "lcc/lcc_trace.h" |
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30 #include "lcc/lcc_tm_i.h" |
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31 #include "lcc/lcc_task.h" |
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32 #include "lcc/lcc_modulate.h" |
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33 #include "ffs/ffs.h" |
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34 |
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35 /****************************************************************************** |
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36 * Globals |
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37 *****************************************************************************/ |
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38 |
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39 extern T_ETM_ENV_CTRL_BLK *etm_env_ctrl_blk; |
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40 extern T_PWR_CTRL_BLOCK *pwr_ctrl; |
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41 extern T_PWR_CFG_BLOCK *pwr_cfg; |
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42 |
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43 |
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44 /****************************************************************************** |
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45 * EMT PWR Version |
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46 *****************************************************************************/ |
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47 /* |
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48 The version of the etm pwr module can be found in the file etm_version.h |
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49 */ |
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50 |
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51 /****************************************************************************** |
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52 * ETM PWR Module |
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53 *****************************************************************************/ |
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54 // pwr uplink packet structure for pwr read/write : |
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55 // |fid|index|--data(W)--| |
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56 |
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57 int etm_pwr(uint8 *indata, int insize); |
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58 |
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59 /****************************************************************************** |
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60 * Register the PWR Module to the ETM database |
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61 *****************************************************************************/ |
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62 |
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63 int etm_pwr_init(void) |
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64 { |
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65 return etm_register("PWR", ETM_PWR, 0, 0, etm_pwr); |
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66 } |
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67 |
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68 |
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69 int etm_pwr(uint8 *buf, int insize) |
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70 { |
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71 int error = ETM_OK; |
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72 uint8 fid, size, index,i; |
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73 T_ETM_PKT *pkt = NULL; |
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74 T_FFS_STAT stat; |
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75 char name[20], id; |
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76 |
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77 ttw(pwr_ttr(TTrInit, "etm_pwr(%d)" NL, 0)); |
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78 |
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79 fid = *buf; |
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80 |
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81 ttw(pwr_ttr(TTrInit, "insize = %d " NL, insize)); |
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82 |
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83 /* Create TestMode return Packet */ |
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84 if ((pkt = (T_ETM_PKT *) etm_malloc(sizeof(T_ETM_PKT))) == NULL) { |
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85 return ETM_NOMEM; |
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86 } |
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87 |
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88 // Init. of return packet |
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89 pkt->mid = ETM_PWR; |
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90 pkt->status = ETM_OK; |
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91 pkt->size = 0; |
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92 pkt->index = 0; |
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93 etm_pkt_put8(pkt, fid); |
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94 |
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95 index = *(buf+1); |
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96 etm_pkt_put8(pkt, index); |
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97 |
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98 name[0] = 0; // FIXME: Really needed? |
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99 |
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100 for (i=0; i<insize; i++) { |
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101 ttw(ttr(TTrTmpwr, "buf[%d]=%d" NL,i, (*(buf+i)))); |
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102 } |
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103 |
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104 switch (fid) { |
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105 case 'R': |
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106 ttw(ttr(TTrTmpwr,"pwr (%d)" NL, 0)); |
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107 |
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108 // All reads start from index 2 since the fid + index is kept |
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109 switch (index) { |
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110 case PWR_CFG_ID : |
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111 // We can read different configurations swiching between them using pwtw |
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112 size = PWR_CFG_ID_SIZE; |
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113 *(buf+2) = pwr_ctrl->cfg_id; |
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114 *(buf+3) = pwr_ctrl->chg_cfg_id; |
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115 ttw(ttr(TTrTmpwr,"Using cfg_id %d" NL, *(buf+2))); |
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116 ttw(ttr(TTrTmpwr,"Using chg_cfg_id %d" NL, *(buf+3))); |
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117 |
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118 // If either the bat.cfg or the chg.cfg lacks object not found is returned |
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119 |
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120 // If (battery) file can't be stat'ed then the configuration doesn't exist |
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121 id = *(buf+2) + '0'; |
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122 build_name("/pwr/bat/bat", &id, 12, ".cfg", name); |
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123 error = ffs_stat(name, &stat); |
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124 |
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125 // If charger file can't be stat'ed then the configuration doesn't exist |
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126 id = *(buf+3) + '0'; |
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127 build_name("/pwr/chg/chg", &id, 12, ".cfg", name); |
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128 error = ffs_stat(name, &stat); |
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129 break; |
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130 case PWR_COMMON : |
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131 // Read the /pwr/common.cfg file |
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132 // NOTE: sizeof(pwr_cfg->common) = 16 <> (14 byte alignment) |
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133 size = PWR_COMMON_CFG_SIZE; |
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134 error = ffs_fread("/pwr/common.cfg", buf+2, size); |
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135 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error)); |
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136 break; |
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137 case PWR_CHG : |
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138 // Read the /pwr/chg/chg<cfgid>.cfg file |
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139 size = PWR_CHG_CFG_SIZE; |
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140 id = pwr_ctrl->chg_cfg_id + '0'; |
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141 build_name("/pwr/chg/chg", &id, 12, ".cfg", name); |
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142 error = ffs_fread(name, buf+2, size); |
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143 ttw(ttr(TTrTmpwr, "Read %d bytes " NL, error)); |
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144 break; |
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145 case PWR_BAT : |
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146 // Read the /pwr/bat/bat<cfgid>.cfg file |
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147 size = PWR_BAT_CFG_SIZE; |
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148 id = pwr_ctrl->cfg_id + '0'; |
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149 build_name("/pwr/bat/bat", &id, 12, ".cfg", name); |
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150 error = ffs_fread(name, buf+2, size); |
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151 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error)); |
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152 break; |
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153 case PWR_TEMP : |
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154 // Read the /pwr/bat/temp<cfgid>.cfg file |
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155 size = PWR_TEMP_CFG_SIZE; |
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156 id = pwr_ctrl->cfg_id + '0'; |
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157 build_name("/pwr/bat/temp", &id, 13, ".cfg", name); |
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158 error = ffs_fread(name, buf+2, size); |
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159 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error)); |
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160 break; |
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161 case PWR_MMI: |
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162 // Read the /mmi/pwr/bsie.cfg file |
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163 size = PWR_MMI_CFG_SIZE; |
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164 error = ffs_fread("/mmi/pwr/bsie.cfg", buf+2, size); |
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165 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error)); |
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166 break; |
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167 case PWR_I2V_CAL : |
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168 // Read the /pwr/i2v.cal file |
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169 size = PWR_I2V_CAL_SIZE; |
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170 error = ffs_fread("/pwr/i2v.cal", buf+2, size); |
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171 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error)); |
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172 break; |
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173 case PWR_VBAT_CAL : |
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174 // Read the /pwr/vbat.cal file |
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175 size = PWR_VBAT_CAL_SIZE; |
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176 error = ffs_fread("/pwr/vbat.cal", buf+2, size); |
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177 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error)); |
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178 break; |
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179 case PWR_MMI_TEST : |
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180 #if (TEST_PWR_MMI_INTERFACE == 1) |
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181 // Trigger MMI registration |
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182 return_path.callback_func = mmi_test_cb_function; |
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183 ttw(ttr(TTrInit,"before: &mmi_test_cb_function=(0x%x)" NL, return_path.callback_func)); |
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184 return_path.addr_id = NULL; // FIXME?? |
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185 ttw(ttr(TTrTmpwr,"MMI testing callback: %d" NL, 0x0)); |
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186 size = 1; |
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187 *(buf+2) = 0xBA; |
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188 pwr_register(&return_path, &mmi_data); |
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189 ttw(ttr(TTrInit,"after: &mmi_test_cb_function=(0x%x)" NL, pwr_ctrl->rpath.callback_func)); |
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190 ttw(ttr(TTrTmpwr,"MMI testing callback: %d" NL, 0xFF)); |
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191 #endif |
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192 break; |
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193 case PWR_DYNAMIC : |
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194 // Dump 'dynamic' configuration data to trace |
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195 size = PWR_DYNAMIC_SIZE; |
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196 *(buf+2) = 0xBA; |
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197 ttr(TTrAll,"*PWR Module Version = 0x%x" NL, PWRVERSION ); |
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198 ttr(TTrAll,"*bat_id = %d" NL, pwr_cfg->data.bat_id ); |
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199 ttr(TTrAll,"*state = %d" NL, pwr_ctrl->state); |
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200 ttr(TTrAll,"*chg_id = %d" NL, pwr_cfg->data.chg_id ); |
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201 ttr(TTrAll,"*Vbat = %d" NL, pwr_cfg->data.Vbat); |
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202 ttr(TTrAll,"*Vbat_avg = %d" NL, pwr_cfg->data.Vbat_avg); |
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203 ttr(TTrAll,"*Vbat_avg_mV = %d" NL, pwr_cfg->data.Vbat_avg_mV); |
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204 ttr(TTrAll,"*Tbat = %d" NL, pwr_cfg->data.Tbat); |
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205 ttr(TTrAll,"*Tbat_avg = %d" NL, pwr_cfg->data.Tbat_avg); |
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206 ttr(TTrAll,"*Vchg = %d" NL, pwr_cfg->data.Vchg); |
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207 ttr(TTrAll,"*Ichg = %d" NL, pwr_cfg->data.Ichg); |
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208 ttr(TTrAll,"*Cbat = %d" NL, pwr_cfg->data.Cbat); |
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209 ttr(TTrAll,"*cfg_id = %d" NL, pwr_cfg->data.cfg_id); |
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210 ttr(TTrAll,"*chg_cfg_id = %d" NL, pwr_cfg->data.chg_cfg_id); |
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211 ttr(TTrAll,"*bforce = %d" NL, pwr_cfg->data.bforce); |
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212 ttr(TTrAll,"*cforce = %d" NL, pwr_cfg->data.cforce); |
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213 ttr(TTrAll,"*k = %d" NL, pwr_cfg->data.k); |
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214 ttr(TTrAll,"*T4 = %d" NL, pwr_cfg->data.T4); |
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215 ttr(TTrAll,"*T1 elapsed = %d" NL, pwr_ctrl->time_elapsed_T1); |
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216 ttr(TTrAll,"*T2 elapsed = %d" NL, pwr_ctrl->time_elapsed_T2); |
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217 ttr(TTrAll,"*T3 elapsed = %d" NL, pwr_ctrl->time_elapsed_T3); |
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218 ttr(TTrAll,"*MMI timer elapsed = %d" NL, pwr_ctrl->time_elapsed_mmi_rep); |
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219 error = PWR_OK; |
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220 break; |
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221 case PWR_TRACE_MASK: |
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222 // Read the trace mask of the PWR module |
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223 size = PWR_TMASK_SIZE; |
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224 memcpy(buf+2, &pwr_ctrl->tmask, size); |
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225 ttw(ttr(TTrTmpwr,"tmask: 0x%x" NL, pwr_ctrl->tmask)); |
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226 break; |
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227 default : |
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228 { |
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229 // Unknown index |
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230 error = PWR_INDEX; |
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231 ttr(TTrWarning, "Unknown index! %d" NL, index); |
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232 } |
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233 } |
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234 |
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235 etm_pkt_putdata(pkt, buf+2 , size); |
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236 break; |
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237 case 'W': |
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238 |
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239 ttw(ttr(TTrTmpwr,"pww (%d)" NL, 0)); |
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240 switch (index) { |
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241 case PWR_CFG_ID : |
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242 // Write the configuration id to be used |
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243 pwr_ctrl->cfg_id = *(buf+2); |
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244 pwr_ctrl->chg_cfg_id = *(buf+3); |
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245 pwr_cfg->data.cfg_id = pwr_ctrl->cfg_id + '0'; |
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246 pwr_cfg->data.chg_cfg_id = pwr_ctrl->chg_cfg_id + '0'; |
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247 ttw(ttr(TTrTmpwr,"Switched to bat id=%d" NL, pwr_ctrl->cfg_id)); |
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248 ttw(ttr(TTrTmpwr,"Switched to chg id=%d" NL, pwr_ctrl->chg_cfg_id)); |
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249 break; |
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250 case PWR_COMMON : |
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251 // Write the /pwr/common.cfg file |
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252 // Blocking version of ffs_fwrite is used since this is a test mode command |
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253 error = ffs_fwrite("/pwr/common.cfg", buf+2, PWR_COMMON_CFG_SIZE); |
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254 ttw(ttr(TTrTmpwr,"Wrote %d bytes" NL, error)); |
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255 break; |
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256 case PWR_CHG : |
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257 // Write the /pwr/chg/chg<cfgid>.cfg file |
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258 size = PWR_CHG_CFG_SIZE; |
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259 id = pwr_ctrl->chg_cfg_id + '0'; |
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260 build_name("/pwr/chg/chg", &id, 12, ".cfg", name); |
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261 error = ffs_fwrite(name, buf+2, size); |
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262 ttw(ttr(TTrTmpwr, "Wrote %d bytes = %d" NL, error)); |
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263 break; |
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264 case PWR_BAT : |
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265 // Write the /pwr/bat/bat<cfgid>.cfg file |
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266 size = PWR_BAT_CFG_SIZE; |
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267 id = pwr_ctrl->cfg_id + '0'; |
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268 build_name("/pwr/bat/bat", &id, 12, ".cfg", name); |
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269 error = ffs_fwrite(name, buf+2, size); |
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270 ttw(ttr(TTrTmpwr, "Wrote %d bytes = %d" NL, error)); |
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|
271 break; |
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272 case PWR_TEMP : |
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273 // Write the /pwr/bat/temp<cfgid>.cfg file |
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274 size = PWR_TEMP_CFG_SIZE; |
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275 id = pwr_ctrl->cfg_id + '0'; |
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276 build_name("/pwr/bat/temp", &id, 13, ".cfg", name); |
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277 error = ffs_fwrite(name, buf+2, size); |
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278 ttw(ttr(TTrTmpwr, "Wrote %d bytes = %d" NL, error)); |
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279 break; |
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280 case PWR_MMI: |
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281 // Write the /mmi/pwr/bsie.cfg file |
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282 size = PWR_MMI_CFG_SIZE; |
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283 error = ffs_fwrite("/mmi/pwr/bsie.cfg", buf+2, size); |
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284 ttw(ttr(TTrTmpwr, "Wrote %d bytes = %d" NL, error)); |
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|
285 break; |
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|
286 case PWR_I2V_CAL : |
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287 // Write the /pwr/i2v.cal file |
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288 error = ffs_fwrite("/pwr/i2v.cal", buf+2, PWR_I2V_CAL_SIZE); |
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289 ttw(ttr(TTrTmpwr,"Wrote %d bytes" NL, PWR_I2V_CAL_SIZE)); |
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|
290 break; |
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291 case PWR_VBAT_CAL: |
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292 // Write the /pwr/vbat.cal file |
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293 error = ffs_fwrite("/pwr/vbat.cal", buf+2, PWR_VBAT_CAL_SIZE); |
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|
294 ttw(ttr(TTrTmpwr,"Wrote %d bytes" NL, PWR_VBAT_CAL_SIZE)); |
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|
295 break; |
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|
296 case PWR_MMI_TEST : |
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|
297 break; |
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|
298 case PWR_TRACE_MASK: |
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|
299 // Write the trace mask of the PWR module |
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300 memcpy(&pwr_ctrl->tmask, buf+2, sizeof(pwr_ctrl->tmask)); |
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|
301 ttw(ttr(TTrTmpwr,"Wrote tmask 0x%x" NL, pwr_ctrl->tmask)); |
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302 pwr_ttr_init(pwr_ctrl->tmask); |
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|
303 break; |
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|
304 default : |
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|
305 { |
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306 // Unknown index |
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307 error = PWR_INDEX; |
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308 ttr(TTrWarning, "Unknown index! %d" NL, index); |
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309 } |
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310 } |
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311 |
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312 size = 0; // Size of write message reply is always 0 |
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313 |
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314 break; |
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315 default: |
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316 pwr_ttr(TTrWarning, "etm_pwr: fid unknown (%d)" NL, fid); |
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317 error = ETM_NOSYS; |
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318 break; |
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319 } |
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320 |
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321 for (i=0; i<size+2; i++) { |
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322 ttw(ttr(TTrTmpwr, "buf[%d]=0x%x" NL, i, (*(buf+i)))); |
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323 } |
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324 |
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325 if (error < 0) { |
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326 pwr_ttr(TTrWarning, "etm_pwr: error %d" NL, error); |
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327 pkt->status = -error; |
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328 |
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329 } |
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330 |
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331 pkt->size += size; |
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332 |
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333 etm_pkt_send(pkt); |
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334 etm_free(pkt); |
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335 |
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336 ttw(pwr_ttr(TTrInit, "etm_pwr(%d)" NL, 0xFF)); |
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337 return ETM_OK; |
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338 } |