FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/L1/cfile/l1_small.c @ 1030:194967e11b2b
fc-shell: tch record and tch play reworked for libgsm-compatible file format
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 31 May 2016 18:39:06 +0000 |
parents | 96a96ec34139 |
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rev | line source |
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1 |
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2 |
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3 #include "l1sw.cfg" |
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4 #if (OP_L1_STANDALONE == 0) |
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5 #include "debug.cfg" |
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6 #include "rv_swe.h" |
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7 #endif |
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8 #if (OP_L1_STANDALONE == 1) |
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9 #include "general.h" |
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10 #endif |
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11 #include "l1_macro.h" |
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12 #include "l1_confg.h" |
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13 |
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14 #if (CODE_VERSION == SIMULATION) |
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15 #include <string.h> |
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16 #include "l1_types.h" |
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17 #include "sys_types.h" |
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18 #include "l1_const.h" |
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19 #include "l1_time.h" |
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20 #if TESTMODE |
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21 #include "l1tm_defty.h" |
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22 #endif |
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23 #if (AUDIO_TASK == 1) |
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24 #include "l1audio_const.h" |
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25 #include "l1audio_cust.h" |
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26 #include "l1audio_defty.h" |
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27 #endif |
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28 #if (L1_GTT == 1) |
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29 #include "l1gtt_const.h" |
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30 #include "l1gtt_defty.h" |
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31 #endif |
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32 #if (L1_MP3 == 1) |
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33 #include "l1mp3_defty.h" |
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34 #endif |
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35 #if (L1_MIDI == 1) |
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36 #include "l1midi_defty.h" |
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37 #endif |
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38 #if (L1_AAC == 1) |
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39 #include "l1aac_defty.h" |
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40 #endif |
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41 #include "l1_defty.h" |
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42 #include "l1_varex.h" |
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43 #include "cust_os.h" |
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44 #include "l1_msgty.h" |
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45 |
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46 #include <stdio.h> |
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47 #include "sim_cfg.h" |
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48 #include "sim_cons.h" |
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49 #include "sim_def.h" |
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50 #include "sim_var.h" |
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51 |
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52 #else |
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53 #include <string.h> |
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54 |
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55 #include "l1_types.h" |
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56 #include "sys_types.h" |
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57 #include "l1_const.h" |
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58 #include "l1_time.h" |
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59 |
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60 #if TESTMODE |
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61 #include "l1tm_defty.h" |
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62 #endif |
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63 #if (AUDIO_TASK == 1) |
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64 #include "l1audio_const.h" |
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65 #include "l1audio_cust.h" |
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66 #include "l1audio_defty.h" |
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67 #endif |
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68 #if (L1_GTT == 1) |
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69 #include "l1gtt_const.h" |
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70 #include "l1gtt_defty.h" |
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71 #endif |
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72 #if (L1_MP3 == 1) |
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73 #include "l1mp3_defty.h" |
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74 #endif |
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75 #if (L1_MIDI == 1) |
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76 #include "l1midi_defty.h" |
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77 #endif |
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78 #if (L1_AAC == 1) |
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79 #include "l1aac_defty.h" |
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80 #endif |
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81 #include "l1_defty.h" |
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82 #include "l1_varex.h" |
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83 #include "cust_os.h" |
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84 #include "l1_msgty.h" |
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85 #include "tpudrv.h" |
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86 |
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87 #endif |
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88 |
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89 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1) |
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90 #include "sys_memif.h" |
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91 #endif |
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92 |
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93 #if (CHIPSET == 15) |
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94 #include "sys_inth.h" |
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95 #include "bspI2c.h" |
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96 #include "clkm.h" |
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97 |
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98 // This could be removed if i2c_pwr_interface is functional |
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99 extern volatile Bool bspI2c_busLocked[BSP_I2C_NUM_DEVICES] ; |
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100 #endif |
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101 |
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102 /* NEW COMPILER MANAGEMENT |
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103 * With compiler V3.00, the .text section must be explicitely |
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104 * defined. |
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105 * Else the following code will be put in the .cinit section. |
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106 * The change is applied to all compilers. |
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107 */ |
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108 asm(" .sect \".text\" "); |
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109 |
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110 |
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111 UWORD8 *mode_authorized = &(l1s.pw_mgr.mode_authorized); |
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112 UWORD8 *switch_PWR_MNGT = &(l1_config.pwr_mngt); |
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113 |
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114 #if (W_A_CALYPSO_BUG_01435 == 1) |
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115 |
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116 asm("SMALL_SLEEP .equ 01h"); |
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117 asm("BIG_SLEEP .equ 02h"); |
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118 asm("DEEP_SLEEP .equ 03h"); |
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119 |
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120 void f_arm_sleep_cmd(UWORD8 d_sleep_mode) |
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121 { |
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122 asm(" LDR R3, MPU_FREE_REG"); |
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123 |
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124 // here below the C code: |
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125 // if ((d_sleep_mode == SMALL_SLEEP) || (d_sleep_mode == BIG_SLEEP)) |
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126 // * (volatile UWORD16 *) 0xfffffd00 &= 0xfffe; |
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127 // else |
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128 // if (d_sleep_mode == DEEP_SLEEP) |
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129 // * (volatile UWORD16 *) 0xfffffd00 &= 0xefff; |
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130 |
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131 asm(" CMP R0, #SMALL_SLEEP"); |
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132 asm(" BEQ Small_or_Big_Sleep"); |
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133 asm(" CMP R0, #BIG_SLEEP"); |
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134 asm(" BEQ Small_or_Big_Sleep"); |
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135 asm(" CMP R0, #DEEP_SLEEP"); |
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136 asm(" BXNE LR"); |
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137 |
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138 asm("Deep_Sleep: "); |
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139 asm(" LDR R0, CLKM_CNTL_ARM_CLK_REG"); |
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140 asm(" LDRH R12, [R0, #0]"); |
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141 asm(" AND R1, R12, #255"); |
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142 asm(" AND R12, R12, #61184"); |
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143 asm(" ORR R12, R1, R12"); |
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144 asm(" STRH R12, [R0, #0]"); |
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145 asm(" STMIA R3!, {R4-R7}"); |
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146 asm(" B End_Sleep"); |
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147 |
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148 asm("Small_or_Big_Sleep: "); |
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149 asm(" LDR R12, CLKM_CNTL_ARM_CLK_REG"); |
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150 asm(" LDRH R0, [R12, #0]"); |
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151 asm(" MOV R0, R0, LSL #16"); |
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152 asm(" MOV R0, R0, LSR #17"); |
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153 asm(" MOV R0, R0, LSL #1"); |
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154 asm(" STRH R0, [R12, #0]"); |
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155 asm(" STMIA R3!, {R4-R7}"); |
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156 |
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157 asm("End_Sleep: "); |
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158 |
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159 } /* f_arm_sleep_cmd() */ |
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160 |
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161 asm("MPU_FREE_REG .word 0xffffff20"); |
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162 asm("CLKM_CNTL_ARM_CLK_REG .word 0xfffffd00"); |
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163 #endif |
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164 |
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165 #if (CHIPSET == 15) |
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166 void init_small_sleep() |
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167 { |
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168 |
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169 /* Should not disable bridge_clk during small sleep when an I2C transaction is pending |
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170 |
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171 In Locosto without BRIDGE_CLK, I2C interrupt is not generated */ |
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172 |
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173 // This could be removed if i2c_pwr_interface is functional |
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174 |
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175 Uint8 sts=0, camera_sts = 0; |
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176 |
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177 sts=i2c_pwr_interface(0); |
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178 #ifdef RVM_CAMD_SWE |
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179 #if(LOCOSTO_LITE == 0) |
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180 #if (OP_L1_STANDALONE == 0) |
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181 camera_sts = camera_pwr_interface(0); |
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182 #endif |
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183 #endif |
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184 #endif |
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185 |
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186 if (sts != 0 |
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187 #if(LOCOSTO_LITE == 0) |
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188 || camera_sts != 0 |
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189 #endif |
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190 ) |
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191 { |
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192 sts=i2c_pwr_interface(2);//enable |
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193 *((volatile UINT16 *) CLKM_CNTL_CLK) &= ~CLKM_BRIDGE_DIS; |
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194 } |
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195 else |
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196 { |
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197 sts=i2c_pwr_interface(1);//disable |
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198 *((volatile UINT16 *) CLKM_CNTL_CLK) |= CLKM_BRIDGE_DIS; |
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199 F_INTH_ENABLE_ONE_IT(C_INTH_UART_WAKEUP_IT); |
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200 } |
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201 } |
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202 |
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203 |
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204 |
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205 void exit_small_sleep() |
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206 |
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207 { |
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208 i2c_pwr_interface(2); |
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209 return; |
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210 } |
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211 |
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212 |
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213 #endif |
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214 |
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215 /*-------------------------------------------------------*/ |
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216 /* INT_Small_Sleep() */ |
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217 /*-------------------------------------------------------*/ |
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218 /* */ |
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219 /* Description: small sleep */ |
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220 /* ------------ */ |
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221 /* Called by TCT_Schedule main loop of Nucleus */ |
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222 /*-------------------------------------------------------*/ |
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223 |
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224 |
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225 asm(" .def INT_Small_Sleep "); |
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226 asm("INT_Small_Sleep "); |
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227 |
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228 /* NEW COMPILER MANAGEMENT |
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229 * _switch_PWR_MNGT and _mode_authorized must be .def and not .ref |
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230 * as they are both defined in this file. |
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231 */ |
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232 asm(" .def _switch_PWR_MNGT "); |
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233 asm(" .def _mode_authorized "); |
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234 asm("SMALL_SLEEP .equ 01h "); |
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235 asm("ALL_SLEEP .equ 04h "); |
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236 asm("PWR_MNGT .equ 01h "); |
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237 #if (OP_L1_STANDALONE == 0) |
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238 // This code log the number of time the Small sleep |
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239 // function has been invoked |
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240 #if (TI_PROFILER == 1) |
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241 asm(" ldr r0, profiler_counter "); // pick counter |
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242 asm(" mov r1,#0 "); |
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243 asm(" str r1,[r0] "); |
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244 #endif |
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245 |
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246 #if (TI_NUC_MONITOR == 1) |
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247 // Push registers on statck because R3 and R4 must not be modified |
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248 asm(" STMFD sp!,{r0-r5}"); |
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249 asm(" .global _ti_nuc_monitor_sleep "); |
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250 asm(" BL _ti_nuc_monitor_sleep"); |
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251 asm(" LDMFD sp!,{r0-r5}"); |
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252 #endif |
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253 // End log call |
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254 #endif // OP_L1_STANDALONE |
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255 //asm(" .ref TCT_Schedule_Loop "); |
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256 //asm(" B TCT_Schedule_Loop "); |
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257 |
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258 asm(" ldr r0,Switch "); // pick up sleep mode |
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259 asm(" ldr r0,[r0] "); // take the current value of the register |
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260 asm(" ldrb r1,[r0] "); // take the current value of the register |
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261 asm(" cmp r1,#PWR_MNGT "); // take the current value of the register |
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262 asm(" bne End_small_sleep "); |
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263 |
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264 asm(" ldr r0,Mode "); // pick up sleep mode |
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265 asm(" ldr r0,[r0] "); // take the current value of the register |
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266 asm(" ldrb r1,[r0] "); // take the current value of the register |
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267 asm(" cmp r1,#SMALL_SLEEP "); // take the current value of the register |
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268 asm(" beq Small_sleep_ok "); |
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269 asm(" cmp r1,#ALL_SLEEP "); // take the current value of the register |
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270 asm(" bne End_small_sleep "); |
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271 |
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272 asm("Small_sleep_ok "); |
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273 |
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274 // ***************************************************** |
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275 // CQ19599: For Calypso+ chipset, extended page mode |
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276 // shall be disabled before entering deep sleep and |
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277 // restored at wake up |
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278 // ***************************************************** |
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279 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1) |
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280 asm(" .ref _f_memif_extended_page_mode_read_bit "); |
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281 asm(" .ref _f_memif_extended_page_mode_disable "); |
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282 |
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283 asm(" BL _f_memif_extended_page_mode_read_bit"); //read state of extended page mode |
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284 asm(" STMFD sp!,{r2}"); //save r2 in stack in case it was used before |
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285 asm(" MOV r2,r0"); //store the state in r2 |
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286 asm(" BL _f_memif_extended_page_mode_disable"); //disable extended page mode |
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287 #endif |
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288 |
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289 #if (CHIPSET == 15) |
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290 //// Disable IRQs |
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291 asm(" MRS r1, CPSR "); |
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292 // asm(" MOV r2,r1"); // Copy the contents on CPSR register to r2 |
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293 asm(" STMFD sp!,{r1}"); // Push r2 in the stack |
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294 asm(" ORR r1,r1,#00c0h "); // Disable IRQs |
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295 asm(" MSR CPSR,r1 "); |
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296 |
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297 asm(" .ref _init_small_sleep"); |
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298 asm(" BL _init_small_sleep"); |
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299 #endif |
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300 |
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301 // ***************************************************** |
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302 //reset the DEEP_SLEEP bit 12 of CNTL_ARM_CLK register |
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303 // (Cf BUG_1278) |
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304 asm(" ldr r0,addrCLKM "); // pick up CNTL_ARM_CLK register address |
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305 asm(" ldrh r1,[r0] "); // take the current value of the register |
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306 asm(" orr r1,r1,#1000h "); // reset the bit |
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307 asm(" strh r1,[r0] "); //store the result |
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308 |
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309 asm(" ldr r0,addrCLKM "); // pick up CLKM clock register address |
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310 asm(" ldrh r1,[r0] "); // take the current value of the register |
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311 asm(" bic r1,r1,#1 "); // disable ARM clock |
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312 asm(" strh r1,[r0] "); |
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313 // ***************************************************** |
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314 |
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315 #if (CHIPSET == 15) |
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316 asm(" .ref _exit_small_sleep"); |
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317 asm(" BL _exit_small_sleep"); |
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318 //Enable IRQs |
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319 asm(" LDMFD sp!,{r1}"); //restore r2 from stack |
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320 //asm(" MOV r1,r2"); // Move r2 to r1 |
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321 asm(" MSR CPSR,r1 "); // Copy the contents of r1 to CPSR register |
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322 #endif |
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323 |
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324 #if (W_A_CALYPSO_BUG_01435 == 1) |
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325 asm(" MOV R0, #SMALL_SLEEP"); |
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326 asm(" BL _f_arm_sleep_cmd"); |
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327 #endif |
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328 |
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329 // ***************************************************** |
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330 // CQ19599: For Calypso+ chipset, restore the extended |
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331 // page mode if it was enabled before entering sleep |
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332 // ***************************************************** |
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333 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1) |
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334 asm(" .ref _f_memif_extended_page_mode_enable "); |
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335 asm(" CMP r2,#0"); //check if extended page mode was enabled |
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336 asm(" BEQ extended_page_mode_restored "); //if not, do nothing |
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337 asm(" BL _f_memif_extended_page_mode_enable"); //else restore it |
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338 asm("extended_page_mode_restored "); |
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339 asm(" LDMFD sp!,{r2}"); //restore r2 |
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340 #endif |
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341 |
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342 asm(" .ref TCT_Schedule_Loop "); |
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343 asm("End_small_sleep "); |
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344 asm(" B TCT_Schedule_Loop "); // Return to TCT_Schedule main loop |
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345 |
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346 asm("addrCLKM .word 0xfffffd00 ");//CLKM clock register address |
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347 |
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348 asm("Mode .word _mode_authorized "); |
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349 asm("Switch .word _switch_PWR_MNGT "); |
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350 #if (OP_L1_STANDALONE == 0) |
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351 #if (TI_PROFILER == 1) |
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352 asm(" .ref _ti_profiler_nb_sleep_call "); |
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353 asm("profiler_counter .word _ti_profiler_nb_sleep_call "); |
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354 #endif |
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355 #endif // OP_L1_STANDALONE |
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356 |